Commit graph

56,286 commits

Author SHA1 Message Date
Julien Massot
c472075b5a boards: arm: rcar h3ulcb: Add OpenOCD configuration
On R-Car the Cortex R7 is usually not the boot processor.
This configuration file make use of the Cortex A57 processor,
to initialize the Cortex R7.

It boils down to few steps:
 - Apply power to the Cortex R7
 - Set the boot address for the Cortex R7
 - loading a firmware
 - releasing the Cortex R7 reset

This configuration file also rely on A57 bootloaders,
to initialize device, memory, and security groups.

This file has been tested on openocd 0.10.0+dev-01508-gf79c90268-dirty,
shipped with zephyr sdk 0.12.4, and on openocd master
65c9653cc768f77a5e8cf2af73e0f40d614bdec2.

Thread awareness is possible thanks to this patch:
http://openocd.zylin.com/#/c/6369/

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-07-29 08:28:27 -05:00
Krzysztof Kopyściński
779e67c0fc Bluetooth: host: disallow MPS decrease for multiple CIDs in Reconf Req
When in le_ecred_reconf_req multiple CIDs are received host should
return  0x0002 error (Reconfiguration failed - reduction in size of
MPS not allowed for more than one channel at a time).

This affects test L2CAP/ECFC/BI-04-C

Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
2021-07-29 15:21:10 +02:00
Krzysztof Kopyściński
4f80fe814c Bluetooth: host: introduce timeout in limited advertising
In limited advertising advertising should end after certain timeout.
Previously, limited advertising was just general advertising with
BT_LE_AD_LIMITED flag set. Now, if this flag is set the work is
scheduled, that will disable advertising after timeout.

This affects tests GAP/DISC/LIMM/BV-03-C and GAP/DISC/LIMM/BV-04-C

Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
2021-07-29 15:20:54 +02:00
Erwan Gouriou
193bba75ab west.yml: hal_stm32: Add stm32u5 support
Required for:
- STM32U5 cube package addition
- STM32U5 *-pinctrl.dtsi adition

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
89b8a80188 boards/arm: nucleo_u575zi_q: Minimal board description
Introduce nucleo_u575zi_q board with minimal description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
69c37a73b9 dts/bindings: flash_controller: Add u5 flash controller binding
Just do it.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
06b94f20aa drivers: gpio & interrupt_controller: Add stm32 u5 support
Add changes to STM32 GPIO and Interrupt controller driver
to support stm32u5 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
9e351db03e drivers/clock_control: stm32: Add stm32u5 support
Add clock_control driver to stm32u5 support.
For this series, now deprecated STM32 clock Kconfig symbols
are not added.
Due to a divergence in MSI clock definition, PLL1 use
instead of PLL and lack of sufficient abstraction abstraction
for these a dedicated file has been added.
This should be reshuffled:
- once a better abstraction is provided by LL API for these
- when some stm32 clock control driver rework will be done
after complete removal of Kconfig STM32 clock symbols.

Tested in MSI, HSI, PLL based HSI and PLL based MSI.
Not tested on HSE due to lack of compatible hardware.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
1e6a643cbb dts/arm/st: u5: Add serial nodes
Add serial nodes on u5 series

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
644a1e22fe dts/arm/st: u5: Add GPIO and exti nodes
Add gpio and exti nodes to u5.dtsi

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
96b179663e soc/arm: st_stm32: Add stm32u5 SoC series
Add minimal support for STM32U5 series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Erwan Gouriou
93c005de3e dts/arm/st: Add stm32u5 base and initial device
Add initial basic description for Cortex-M33 based
stm32u5 soc series.
This encompass description for base nodes, such as:
- cpu
- flash
- clocks
- sram

Additionally, provide description for variant stm32u575Xi.

Related to clocks nodes, added bindings for stm32u5 specific
rcc node as well as msi and pll clocks.

Header file stm32_clock_control.h was also updated to support
these new bindings.
Note that for compatibility with existing definitions, clock
node describing main pll clock, known as "PLL1", was given two
labels: "pll" and "pll1".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00
Omkar Kulkarni
6c41bf6135 bsim_bt: mesh: persistence storage testing
Adds support for testing of persistence storage
for mesh Babblesim tests. Adds a sample test
for testing provisioning data.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2021-07-29 13:29:03 +02:00
Francois Ramu
718c77a4cd dts: arm: stm32f0 soc serie has dma of type V2bis
The type of DMA for the stm32f0 devices was wrong
Its DMA is of type V2bis where the peripheral request is fixed.
The corresponding DMA cell has 2 elements.
The stm32f091 has two DMA instances.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-28 21:11:06 -04:00
Dino Li
f2cd50d8ea gpio: it8xxx2: disable irq before configuring pin interrupt
Fixed the following assertion causing by high level functions
enable gpio interrupt at the same pin at least two times:

ASSERTION FAIL [!arch_irq_is_enabled(irq)]
@ ZEPHYR_BASE/arch/common/sw_isr_common.c:84 IRQ xxx is enabled

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-07-28 21:10:40 -04:00
Glauber Maroto Ferreira
e945ff2314 west: update hal espressif revision
update to newer hal espressif revision.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-28 21:09:27 -04:00
Glauber Maroto Ferreira
ed63e2a562 soc: esp32s2: add initial soc support files for esp32s2
by adding specific soc files for esp32s2 bring-up, such as:
- linker script
- soc initialization code
- initial device tree source files
- esp32s2 saola board support.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-28 21:09:27 -04:00
Martí Bolívar
bcdaaa055f boards: add deprecations for various 'ns' TF-M boards
Various non-secure variants of boards with SoCs that have Trusted
Firmware M support were recently renamed without any deprecations
added for the old names. This unnecessarily breaks the build for out
of tree users.

Fix that by adding the following deprecations (deprecated name ->
replacement name):

  bl5340_dvk_cpuappns        -> bl5340_dvk_cpuapp_ns
  mps2_an521_nonsecure       -> mps2_an521_ns
  musca_b1_nonsecure         -> musca_b1_ns
  musca_s1_nonsecure         -> musca_s1_ns
  nrf5340dk_nrf5340_cpuappns -> nrf5340dk_nrf5340_cpuapp_ns
  nrf9160dk_nrf9160ns        -> nrf9160dk_nrf9160_ns

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-07-28 21:09:11 -04:00
Marcin Niestroj
301243ed06 drivers: wifi: esp_at: fix race condition when waiting for 'SEND OK'
This is more or less the flow of AT+CIPSEND:

  RX                         TX
  --                         --
                             AT+CIPSEND=<...>
  OK
  >
                             <data to be sent>
  SEND OK / SEND FAIL

'sem_response' semaphore is released by receiving 'OK'. Then after
receiving '>' (which releases 'sem_tx_ready' semaphore) actual data is
sent. Waiting for 'SEND OK' or 'SEND FAIL' is implemented by waiting on
'sem_response' (the same as for 'OK'), which mean that resetting this
semaphore just after sending all data is racy.

Fix that race condition by resetting 'sem_response' just after receiving
'OK', so that neither 'SEND OK' nor 'SEND FAIL' will appear yet (they
will not be sent as long as we won't send whole payload).

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-07-28 21:08:51 -04:00
Marcin Niestroj
01852138ae drivers: wifi: esp_at: fix race condition when waiting for '>'
Sending AT+CIPSEND=<...> command results in following reply:

  OK
  >

modem_cmd_send_nolock() invocation was setting command handlers for '>',
but as 'OK' was received first, it was handled as a generic reply. After
receiving 'OK' this function was unsetting command handlers. Then
modem_cmd_handler_update_cmds() was called once again in order to
register '>' handler once again. There was a small period of time where
'>' was not being handled at all.

Fix that race condition by using just introduced modem_cmd_send_ext(),
which allows to leave commands handlers in place and get rid of race
condition where expected command could be missed.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-07-28 21:08:51 -04:00
Marcin Niestroj
1a4cb7e0e3 drivers: modem: add modem_cmd_send_ext()
There are currently modem_cmd_send() and modem_cmd_send_nolock()
functions, each with slightly different behavior regarding acquiring (or
not) sem_tx_lock. Introduce a generic function that will allow caller to
select behavior using flags.

While at it, add possibility to disable setting and unsetting command
handlers. This will be useful in situations when there are multiple
replies expected one after the other coming as a response to single
command. This is the case for example with ESP-AT driver, which expects
following data as response to AT+CIPSEND command:

  OK
  >

where 'OK' is handled by static CMD_RESP (so releasing response
semaphore right away), while '>' is handled by dynamic
CMD_HANDLER (which is releasing another semaphore). Keeping command
handlers in place allows to receive '>' without race condition because
of small period of time where command handlers are not set.

Convert modem_cmd_send_nolock() and modem_cmd_send() to static inline
functions, as they are just a specific invocation of
modem_cmd_send_ext() function.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-07-28 21:08:51 -04:00
Ioannis Glaropoulos
ca5623d288 arm: swap: cleanup an #ifdef statement in swap routine
Cleanup an #ifdef statement in swap_helper.S; use
ARMV6_M_ARMV8_M_BASELINE instead of listing all
Cortex-M baseline implementation variants. This
fixes an issue with Cortex-M23 whose Kconfig
define was not included in the original list.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
453ce7b593 tests: arm: adding a new test-suite for HardFault validation
Adding a new test-suite for HardFault validation,
for Cortex-M Mainline architecture.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
f795672743 arm: cortex-m: enhance information dump during HardFault escalation
When inside an escalated HardFault, we would like to get
more information about the reason for this escalation. We
first check if the reason for thise escalation is an SVC,
which occurs within a priority level that does not allow
it to trigger (e.g. fault or another SVC). If this is true
we set the error reason according to the provided argument.

Only when this is not a synchronous SVC that caused the HF,
do we check the other reasons for HF escalation (e.g. a BF
inside a previous BF).

We also add a case for a debug event, to complete going through
the available flags in HFSR.

Finally we ASSERT if we cannot find the reason for the escalation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
7930829826 arm: cortex-m: move synchronous SVC assessment in a separate function
Move the assessment of a synchronous SVC error into a
separate function. This commit does not introduce any
behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
a8d6c14d30 arm: cortex-m: clean up some more hard-coded constants in swap_helper
Clean up a few more hard-coded constants
in swap_helper.S and replace them with
CMSIS-like defines in cpu.h. No behavioral
changes in this commit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
03c4bcd920 arm: use BASEPRI_MAX instead of BASEPRI to mask interrupts
When locking interrupt in a critical session, it is
safer to do MSR BASEPRI_MAX instead of BASEPRI. The
rationale is that when writing to BASEPRI_MAX, the
writing is conditional, and is only applied if the
change is to a higher priority level. This commit
replaces BASEPRI with BASEPRI_MAX in operations that
aim to lock some specific interrupts:
- irq_lock()
- masking out PendSV
So, for example, it is not possible to actually
unmask any interrupts by doing an irq_lock operation.
The commit does not introduce behavioral changes.
However, it makes irq_lock() more robust against
future changes to the IRQ locking mechanism.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
7156183985 arm: fix the VTOR alignment requirement for Baseline Cortex-M
Baseline Cortex-M requires VTOR to be aligned on 64-word
boundary. That is because bit-7 of VTOR is also RAZ/WI.
The commit updates the vector table section alignment for
Baseline Cortex-M to reflect the implementation constraint.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
d3e1cb2b01 soc: arm: lpc: move platform init implementation in the main tree
Move the implementation of z_platform_init from the NXP Hal
into the main Zephyr tree. This function is Zephyr-specific,
is part of the Zephyr module glue code, and does not need to
reside in the module repository. We also rename the function
to z_arm_platform_init. The commit does not introduce any
behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
ebcd5de596 arm: cortex_a_r: rename z_platform_init to z_arm_platform_init
Platform specific initialization during early boot
has been a feature supported only by Cortex-M; the
Kconfig symbol is define in arch/arm Kconfig space.
We rename the z_platform_init() function to
z_arm_platform_init(), to indicate more clearly that
this is an internal, private ARM-only API.

This commit does not introduce behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
1706b4dfaa arm: rename z_platform_init to z_arm_platform_init
Platform specific initialization during early boot
has been a feature supported only by Cortex-M; the
Kconfig symbol is defined in arch/arm Kconfig space.
We rename the z_platform_init() function to
z_arm_platform_init(), to indicate more clearly that
this is an internal, private ARM-only API.

This commit does not introduce behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
ab7258a9d5 test: arm: no-multithreading: test triggering PendSV
Add a test case to verify that triggering a
PendSV will lead to a Reserved Exception and
a CPU error, in the no-multithreading case.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
70984a1587 arm: set DebugMonitor IRQ unconditionally during initialization
If the DebugMonitor extension is implemented by the core,
the interrupt may be pended and become active, even if it
is not enabled. Set the priority level of DebugMonitor upon
system initialization to the intended value unconditionally
so we do not end up in undefined behavior, if the exception
is accidentally pended. Since the priority level is set at
init, we can remove resetting the priority in DWT driver
initialization.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
6981b84550 arm: ensure SysTick IRQ level is set unconditionally
When the SoC implements SysTick, but the system
does not use it as the driver for system timing
we still need to set its interrupt level. This
is because the SysTick IRQ is always enabled,
so we must ensure the interrupt priority is set
to a level lower than the kernel interrupts (for
the assert mechanism to work properly) in case
the SysTick interrupt is accidentaly raised.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
28a59f67b9 arm: route PendSV to spurious IRQ handler if it is unused
If the PendSV interrupt is not used by Zephyr (this is
the case when we build with single-thread support) we
route the interrupt to z_arm_exc_spurious, instead of
assigning 0 to the vector table entry. This is because
the interrupt is always enabled and always exists, so
it is safer to always get the proper error report, in
case we accidentally pend the PendSV, for any reason.

We also add a comment in the PendSV priority setting,
explaining why it has to be assigned a priority level
even if it is not used.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Ioannis Glaropoulos
41d3d38aec arm: aarch32: sort the source files lists alphabetically
Re-organize the library sources list so the files
are sorted alphabetically.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Bradley Bolen
379bb70728 arch: aarch32: cortex_m/r: Add arch exception helper
Create z_arm_preempted_thread_in_user_mode to abstract the
implementation differences between Cortex-M and R to determine if an
exception came from userspace.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2021-07-28 21:08:09 -04:00
Bradley Bolen
50a6dafdc5 arch: aarch32: cortex_m/r: Add arch helper function
Create z_arm_thread_is_user_mode to abstract the implementation
differences between Cortex-M and R to determine if the current thread is
in user or kernel mode.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2021-07-28 21:08:09 -04:00
Andrzej Głąbek
954dfa755b tests: drivers: i2s_api: Allow testing on nRF52840 DK and nRF5340 DK
Provide configurations for the nRF52840 DK and nRF5340 DK boards.
Adjust the test to cover specifics of I2S peripherals on nRF SoCs
(need of starting RX and TX simultaneously, lack of internal loopback).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-28 18:41:26 -04:00
Andrzej Głąbek
5dcc876e0b samples: drivers: Add I2S echo sample
Add a sample intended to show how to use I2S drivers in processing of
audio streams. The sample starts both the RX and TX streams and adds
a simple echo effect to the received audio signal.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-28 18:41:26 -04:00
Andrzej Głąbek
cfaee96e92 twister: Add dt_nodelabel_enabled devicetree filter function
This function takes a node label (not a label property) and returns
true if a node with such label exists and the node is enabled.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-28 18:41:26 -04:00
Andrzej Głąbek
32da1078da drivers: i2s: Add support for nRF I2S peripherals
Add a shim that allows using the nrfx I2S driver via the Zephyr API.
Add also missing devicetree nodes representing the I2S peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-i2s" binding with a new property that allows
specifying the clock source to be used by the I2S peripheral (so that
it is possible to use HFXO for better accurracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-28 18:41:26 -04:00
Håkon Øye Amundsen
881b877eca modules: tfm: add configuration for disabling the RNG module
A new configuration is available in TF-M, for disabling RNG
independent from key derivation. Introduce a corresponding
Kconfig option to control the RNG API enabling/disabling from
Zephyr.

Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 20:09:58 +02:00
Ioannis Glaropoulos
f7772c404e manifest: mcuboot: update to fix error with integration platforms
Minor update to mcuboot to fix the issue with the integration
platforms and allow list in the zephyr boot sample.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
a3cf49fff2 samples: tfm_ipc: add test-variant for TF-M without BL2
We add a test variant in tfm_ipc test, to validate the
scenario where TF-M is built without BL2 (MCUboot). We
test this on QEMU only (MPS2 AN521).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
3843bf655c samples: tfm_integration: adapt DTS overlays for STM32L562 board
Due to changes in flash_layout.h for STM32L562, in the current
TF-M module update, we need to modify the DTS overlay files in
the TF-M samples where the board is supported.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
08510d5b2c tests: arm_thread_swap_tz: increase computational length for secure call
In some platforms, such as the nucleo L552ZE_Q, the hash computation
is done very fast, before the delayed work manages to trigger (and
perform the assert-based validations). Increase the length of the
computations so this race condition can be avoided.

Also, this commit adds some messages in the assert statements for
ease of debugging.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
138be0a080 modules: tf-m: allow DOWNLOAD option for mcuboot
Allow developers the option of using the DOWNLOAD option
for MCUboot in TF-M bulds with BL2. Using MCUboot from
Zephyr is still the default option.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
aa3bd927df modules: tf-m: add TFM_BL2 dependency on TFM_MCUBOOT_IMAGE_NUMBER
TFM_MCUBOOT_IMAGE_NUMBER Kconfig option should have
a dependency on TFM_BL2, since it is not applicable
otherwise.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00
Ioannis Glaropoulos
5e6503f6a7 manifest: remove mcuboot version for TF-M in Zephyr
We remove the tfm-mcuboot module in Zephyr (which hosts the
mcuboot version that is used for TF-M builds in Zephyr). We
will force TF-M builds in Zephyr to  use the MCUboot version
that any Zephyr builds are using. This will allow Zephyr to
maintain a single mcuboot module version in its default
manifest.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 19:38:35 +02:00