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arm: cortex-m: clean up some more hard-coded constants in swap_helper

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Clean up a few more hard-coded constants
in swap_helper.S and replace them with
CMSIS-like defines in cpu.h. No behavioral
changes in this commit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-06-22 22:15:51 +02:00 • committed by Christopher Friedt
commit a8d6c14d30
2 changed files with 17 additions and 6 deletions
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14
arch/arm/core/aarch32/swap_helper.S
View file

@ -20,13 +20,15 @@
#include <arch/cpu.h>
#include <syscall.h>
#if defined(CONFIG_CPU_CORTEX_M)
#include <arch/arm/aarch32/cortex_m/cpu.h>
#endif
_ASM_FILE_PROLOGUE
GTEXT(z_arm_svc)
GTEXT(z_arm_pendsv)
GTEXT(z_do_kernel_oops)
GTEXT(z_arm_do_syscall)
GDATA(_k_neg_eagain)
GDATA(_kernel)
@ -100,7 +102,7 @@ SECTION_FUNC(TEXT, z_arm_pendsv)
stmia r0, {v1-v8, ip}
#ifdef CONFIG_FPU_SHARING
/* Assess whether switched-out thread had been using the FP registers. */
tst lr, #0x10 /* EXC_RETURN & EXC_RETURN.F_Type_Msk */
tst lr, #_EXC_RETURN_FTYPE_Msk
bne out_fp_endif
/* FP context active: set FP state and store callee-saved registers.
@ -287,7 +289,7 @@ _thread_irq_disabled:
#ifdef CONFIG_FPU_SHARING
/* Assess whether switched-in thread had been using the FP registers. */
tst lr, #0x10 /* EXC_RETURN & EXC_RETURN.F_Type_Msk */
tst lr, #_EXC_RETURN_FTYPE_Msk
beq in_fp_active
/* FP context inactive for swapped-in thread:
* - reset FPSCR to 0
@ -309,7 +311,7 @@ in_fp_active:
in_fp_endif:
/* Clear CONTROL.FPCA that may have been set by FP instructions */
mrs r3, CONTROL
bic r3, #0x4 /* CONTROL.FPCA Msk */
bic r3, #_CONTROL_FPCA_Msk
msr CONTROL, r3
isb
#endif
@ -408,7 +410,7 @@ SECTION_FUNC(TEXT, z_arm_svc)
* MSP or PSP
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
movs r0, #0x4
movs r0, #_EXC_RETURN_SPSEL_Msk
mov r1, lr
tst r1, r0
beq _stack_frame_msp
@ -418,7 +420,7 @@ _stack_frame_msp:
mrs r0, MSP
_stack_frame_endif:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
tst lr, #0x4 /* did we come from thread mode ? */
tst lr, #_EXC_RETURN_SPSEL_Msk /* did we come from thread mode ? */
ite eq /* if zero (equal), came from handler mode */
mrseq r0, MSP /* handler mode, stack frame is on MSP */
mrsne r0, PSP /* thread mode, stack frame is on PSP */

9
include/arch/arm/aarch32/cortex_m/cpu.h
View file

@ -10,12 +10,21 @@
#ifdef _ASMLANGUAGE
#define _SCS_BASE_ADDR _PPB_INT_SCS
/* ICSR defines */
#define _SCS_ICSR (_SCS_BASE_ADDR + 0xd04)
#define _SCS_ICSR_PENDSV (1 << 28)
#define _SCS_ICSR_UNPENDSV (1 << 27)
#define _SCS_ICSR_RETTOBASE (1 << 11)
#define _SCS_MPU_CTRL (_SCS_BASE_ADDR + 0xd94)
/* CONTROL defines */
#define _CONTROL_FPCA_Msk (1 << 2)
/* EXC_RETURN defines */
#define _EXC_RETURN_SPSEL_Msk (1 << 2)
#define _EXC_RETURN_FTYPE_Msk (1 << 4)
#endif
#endif