arm: fix the VTOR alignment requirement for Baseline Cortex-M

Baseline Cortex-M requires VTOR to be aligned on 64-word
boundary. That is because bit-7 of VTOR is also RAZ/WI.
The commit updates the vector table section alignment for
Baseline Cortex-M to reflect the implementation constraint.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2021-06-22 10:53:26 +02:00 committed by Christopher Friedt
commit 7156183985

View file

@ -12,10 +12,19 @@
* described below.
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* VTOR bits 0:7 are reserved (RES0). This requires that the base address
* of the vector table is 64-word aligned.
*/
. = ALIGN( 1 << LOG2CEIL(4 * 64) );
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* VTOR bits 0:6 are reserved (RES0). This requires that the base address
* of the vector table is 32-word aligned.
*/
. = ALIGN( 1 << LOG2CEIL(4 * 32) );
#else
#error "Unsupported architecture variant"
#endif
/* When setting TBLOFF in VTOR we must align the offset to the number of
* exception entries in the vector table. The minimum alignment of 32 words