arm: fix the VTOR alignment requirement for Baseline Cortex-M
Baseline Cortex-M requires VTOR to be aligned on 64-word boundary. That is because bit-7 of VTOR is also RAZ/WI. The commit updates the vector table section alignment for Baseline Cortex-M to reflect the implementation constraint. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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@ -12,10 +12,19 @@
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* described below.
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*/
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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/* VTOR bits 0:7 are reserved (RES0). This requires that the base address
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* of the vector table is 64-word aligned.
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*/
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. = ALIGN( 1 << LOG2CEIL(4 * 64) );
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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/* VTOR bits 0:6 are reserved (RES0). This requires that the base address
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* of the vector table is 32-word aligned.
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*/
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. = ALIGN( 1 << LOG2CEIL(4 * 32) );
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#else
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#error "Unsupported architecture variant"
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#endif
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/* When setting TBLOFF in VTOR we must align the offset to the number of
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* exception entries in the vector table. The minimum alignment of 32 words
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