Commit graph

117121 commits

Author SHA1 Message Date
Fabrice DJIATSA
994efc0b92 drivers: spi: update error type to skip word_size testcases
Workaround to avoid getting the -EFAULT (14) error when running
the test_spi_word_size_x (x = 7, 9, 24) test cases:
Since these testcase configurations aren't supported, update
the error type to ENOTSUP to allow skipping the test cases using ztest.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-16 14:03:05 -04:00
Fabrice DJIATSA
cc4e2f526a tests: drivers: spi: spi_loopback: handle rx/tx buffers nocache memory
Place transfer buffers in non-cacheable memory when
CONFIG_NOCACHE_MEMORY=y. This change ensures that DMA transfer
buffers are allocated in non-cacheable memory on platforms where
CONFIG_NOCACHE_MEMORY is enabled. This avoids potential cache
coherence issues that are not handled by the SPI driver.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-16 14:03:05 -04:00
Fabrice DJIATSA
5daad8f7c1 tests: drivers: spi_loopback: add latency tolerance for some boards
Set a convenient latency for each platform, since each platform
reacts differently to the driver.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-16 14:03:05 -04:00
Fabrice DJIATSA
c5f5fc1fa8 tests: drivers: spi: spi_loopback: enable nucleo_c071rb to run test again
Due to RAM overflow by 3200 bytes, decrease size of SPI_LARGE_BUFFER.

signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-06-16 14:03:05 -04:00
c37abf115d drivers: dma: fix the WCH DMA transfer width
The driver treats the `source_data_size` and `dest_data_size` as a
width in bits and converts 8 bits to 1, 16 bits to 2, and 32 bits to 3.

This should be a width in bytes with 1 byte mapping to 0, 2 bytes to
1, and 4 bytes to 3.

Note that this preserves the current behaviour of silently accepting
invalid transfer bit widths.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-06-16 14:01:54 -04:00
dc57eda4ca boards: wch: add dma to the supported list so the build tests run
This adds `tests/drivers/dma/chan_blen_transfer` and
`tests/drivers/dma/loop_transfer` as build tests to any manual Twister
run.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-06-16 14:01:54 -04:00
Andrej Butok
f062012f84 boards: mimxrt1060_evk: set LinkServer as the default runner
Sets LinkServer as the default runner for the mimxrt1060-evk board,
as the board is configured for CMSIS-DAP by default.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-06-16 14:00:32 -04:00
Tien Nguyen
8507859371 tests: drivers: gpio: Add support for RZ/V2N-EVK
Add support for RZ/V2N-EVK

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
2025-06-16 14:00:22 -04:00
Tien Nguyen
5599bc2ecb drivers: gpio: Add support for RZ/V2N
Add support for RZ/V2N

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
2025-06-16 14:00:22 -04:00
Tien Nguyen
05289f40a7 drivers: pinctrl: Add support for RZ/V2N
Add support for RZ/V2N

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
2025-06-16 14:00:22 -04:00
Hieu Nguyen
7f0a895ea8 boards: renesas: Add minimal support for Renesas RZ/V2N-EVK
Add minimal support for Renesas RZ/V2N-EVK

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-06-16 14:00:22 -04:00
Hieu Nguyen
b431204a6d dts: arm: renesas: Add support for Renesas RZ/V2N
Add devicetree to support for Renesas RZ/V2N

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-06-16 14:00:22 -04:00
Hieu Nguyen
73c63f9ca6 soc: renesas: Add initial support for Renesas RZ/V2N
Add initial support for Renesas RZ/V2N

Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-06-16 14:00:22 -04:00
Khaoula Bidani
8144a6638a dts: bindings: flash: add STM32U3 flash controller
Add the Device Tree binding for the STM32U3 flash controller.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
70ebb0a6a3 drivers: flash: add stm32u3 devices
Introduce the stm32u3 serie to the the existing flash driver
It is based on the stm32l5 model.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
a9aa341ed5 drivers: gpio: fix gpio warning
Implement conditional compilation to avoid the warning:
- Use LL_PWR_EnableVDDIO2() for STM32U3 series.
- Use LL_PWR_EnableVddIO2() for other series.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
9b23a73184 dts: bindings: clock: add STM32U3 MSI
Add the Device Tree bindings for the
MSI clock of STM32U3 series.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
6ac4b20e2b drivers: clock_control: Add STM32U3XX clock support
add clock support for STM32U3X SoC series.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
5673dc162f include: zephyr: Add the stm32u3 clock control and the reset register
Add the stm32u3 clock control and the RCC bus reset register offset

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
6e7b5bbdf1 boards: st: add nucleo_u385rg_q board support
add board support for nucleo_u385rg_q

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
496517c032 dts: arm: st: add stm32u385 dtsi files
Provide support for the ST32U385 series

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Khaoula Bidani
85e6cc421e soc: st: stm32: Add series stm32u3
Add STM32U3 familly support

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-06-16 13:59:38 -04:00
Amneesh Singh
2f59ccfb63 samples: adc_dt: add overlay for am2434 r5f0_0 core
Add DT overlay for am243x_evm/am2434/r5f0_0 in one of the ADC samples

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Amneesh Singh
3a886d2f84 boards: ti: am243x_evm: add documentation
Add documentation for am243x_evm and while at it, add the openocd
configuration as well.

Co-authored-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Amneesh Singh
807d81b5cb boards: arm: ti: k3: add am243x_evm
Add board support for am2434_evm board

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Amneesh Singh
274436c761 boards: reflect changes from am64x_m4.dtsi
Reflect changes from the new am64x_m4.dtsi file.

Affected boards:
- phyboard_electra
- sk_am64

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Amneesh Singh
c7a21c3da5 soc: ti: k3: add AM2434 support
Add SoC support and device trees for Texas Instruments AM2434 SoC. Both R5
and M4 cores are supported here.

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Amneesh Singh
9814590eb3 drivers: pinctrl: make ti_k3 multi-instance
Some devices have multiple pinctrl regions; for instance, main pinctrl and
mcu pinctrl. Currently there can only be a single pinctrl instance picked
form a DT label. This patch makes the pinctrl driver initialise one
instance for each node with correct compatible string.

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-06-16 13:59:09 -04:00
Benjamin Cabé
c2d52c7f4b drivers: ethernet: remove stray semicolon vnd,ethernet
Fix trivial typo

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 10:43:20 -04:00
Benjamin Cabé
bc03f23d50 drivers: dma: fix off-by-one error in silabs LDMA
Channel numbers are 0-based so a channel number equal to the number of
channels is invalid.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 10:43:00 -04:00
Alvis Sun
2027d97dac drivers: clock_control: add validation for SYS_CLOCK_HW_CYCLES_PER_SEC
Check whether the value of SYS_CLOCK_HW_CYCLES_PER_SEC is valid.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-06-16 14:13:55 +02:00
Alvis Sun
d789d13ec0 soc: nuvoton: npcx: update default SYS_CLOCK_HW_CYCLES_PER_SEC
Added support for deriving `SYS_CLOCK_HW_CYCLES_PER_SEC` from the
Device Tree by reading the `clock-frequency` property in the `itim` node.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-06-16 14:13:55 +02:00
Alvis Sun
35faf60c94 dts: timer: npcx: add clock-frequency property
Add clock-frequency property for SYS_CLOCK_HW_CYCLES_PER_SEC .

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-06-16 14:13:55 +02:00
Sylvio Alves
fd1987c185 west.yml: fix ble issue in hal_espressif
Fix wrong address in BT adapter file that causes bt_disable
to crash. Make sure interrupt handler pointer gets proper value.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-06-16 14:13:46 +02:00
Alexandre Rey
0c22a981e6 doc: fix links
Fix link to the issue templates.

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-06-16 14:13:34 +02:00
Tomasz Bursztyka
3703027b42 i2c: Add target related commands to the shell module
For testing/debugging purposes, it will be possible then to register
or unregister an i2c target.

Signed-off-by: Tomasz Bursztyka <tobu@bang-olufsen.dk>
Co-authored-by: Hans Binderup <habi@bang-olufsen.dk>
2025-06-16 14:13:13 +02:00
Tim Lin
a62f157118 drivers/espi: ite: Add it51xxx compatibility with it8xxx2 support retained
The driver originally supported only it8xxx2 series. This updates
introduces compatibility allow it to also support it51xxx series
with minimal changes.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-06-16 14:12:44 +02:00
Van Petrosyan
b12717bee1 sensor: lis2dh: add device runtime PM support
Registers driver with pm_device_driver_init(). Moved
chip init routine into separate function to be called
from PM_DEVICE_ACTION_TURN_ON. Added a delay after
power-up.

Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
2025-06-16 14:12:32 +02:00
Jacky Lee
47e43d552e drivers: serial: ns16550: Fix TX IRQ not triggered when FIFO is empty
When uart_ns16550_irq_tx_enable() is called and the TX FIFO is already
empty, no new interrupt is generated, causing data transmission to stall
in some cases. This patch introduces a workaround to simulate an ISR
callback if the FIFO is empty when enabling the TX IRQ.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-06-16 14:12:12 +02:00
Rene Colato
7fa815c929 regulator: Updated function call use flag that initalizes GPIO.
Fixes bug where GPIO_ACTIVE_LOW would not initialize properly.

Signed-off-by: Rene Colato <rcolato@boston-engineering.com>
2025-06-16 14:12:03 +02:00
Benjamin Cabé
179045e5a5 net: mdns_responder: fix wrong context when rescheduling IPv6 probe
Use ipv6 context, not ipv4

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 08:31:32 +02:00
Ruibin Chang
962d8dfd18 drivers/counter/it8xxx2: fix loss timer interrupt potential risk
1.correct timer register control flow
2.select timer interrupt rising edge trigger, instead of default
level trigger

Stress test: top timer fires interrupt every 300ms for 18 hours.
The result is that we don't lose any interrupts.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-06-16 08:31:17 +02:00
The Nguyen
b150b3df4b samples: counter: alarm: fix CI build fail
Exclude mimxrt1060_evk from build as this board does not support
this sample yet

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-06-16 08:30:06 +02:00
Piotr Krzyzanowski
c67db3fd36 tests: drivers: spi: spi_loopback: Add NULL spi_buf_set test
Add the test_spi_null_tx_rx_buf_set

Signed-off-by: Piotr Krzyzanowski <piotr.krzyzanowski@nordicsemi.no>
2025-06-16 08:29:56 +02:00
Benjamin Cabé
453d2367ef net: dhcpv6: fix typo in macro name
DHVP -> DHCP

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 08:29:47 +02:00
Benjamin Cabé
c7e7d977c2 input: input_utils: use proper sizeof
Would have not directly caused issues, but better to fix it :)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 04:27:44 +02:00
Benjamin Cabé
9652ac5d16 input: input_hid: add missing const qualifier
HID lookup table can live in Flash and save some RAM (quite a bit
actually, as it's quite large!).

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 04:27:44 +02:00
Benjamin Cabé
f3c43cc393 drivers: hwinfo: esp32: fix reset cause handling for ESP_RST_PANIC
Added a missing break statement for the ESP_RST_PANIC case.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-16 04:27:33 +02:00
Anas Nashif
bb5a929c62 doc: contrib guidelines: modify rule about adding links
Clarify linking issues in PRs and Commit messages and address the issue
of ambiguity across multiple github repos.

Not allowing links in commit messages so that forks can be happy is not
great.

Forks on Github have no problem with linking, however,
disconnected forks seem to not link correctly, but then why does this
matter?

If someone is taking Zephyr and developing it as their own, they
can for sure do that, but why this should force the Zephyr project to
manage traceability differently and make it more difficult for
developers to add such information in the git metadata directly and not
relying on pull requests.

Most developers use git directly and rely less on pull request and
github UI when browsing changes in the code base.. We need to be able to
see by looking at git commits and git
history if a commit is associated with a bug, some PRs might fix
multiple issues, so the context is important and by looking at each
commit the trace can be established immesiately without going back to
github pull requests.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-06-16 04:27:25 +02:00
Benjamin Cabé
ea2990702f input: adopt SHELL_HELP
Adopt SHELL_HELP macro for input shell

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-06-14 12:37:41 -04:00