Commit graph

118 commits

Author SHA1 Message Date
Mathieu Choplain
97e2dd28b3 soc: st: stm32: hsem: sort hardware semaphore IDs by value
Reorder the HSEM semaphore ID definitions to be sorted by ascending value.
The dummy defines are also changed to be sorted in the same order. The
definitions for STM32MP1 are already in an order that follows this order
so they don't need to be changed.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-06-10 12:08:35 +02:00
Adam Mitchell
dcf94aaf7b dts: arm: st: h7: Add support for STM32H742
Adds base Devicetree files for H742Xi/g variants

Signed-off-by: Adam Mitchell <adam.mitchell@brillpower.com>
2025-06-10 08:51:45 +02:00
Harris Tomy
d280d89214 dts/kconfig: stm32u5: add f9 and clean up dts node locations
Adds skeleton dtsi for u5f9 for u5g9 to inherit from

Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-06-09 14:26:11 -07:00
Henrik Lindblom
24b4ce189f drivers: stm32: dma: fix external dcache support
Several drivers checked for the presense and availability of data cache
through Kconfig symbol. This is supported according to the current
documentation, but the symbol DCACHE masks two types of cache devices: arch
and external caches. The latter is present on some Cortex-M33 chips, like
the STM32U5xx. The external dcache is bypassed when accessing internal
SRAM and only used for external memories.

In commit a2dd232410 ("drivers: adc: stm32: dma support") the rationale
for gating dcache for adc_stm32 behind STM32H7X is only hinted at, but
reason seems to be that it was the only SOC the change was tested on. The
SOC configures DCACHE=y so it is most likely safe to swap the SOC gate for
DCACHE.

The DCACHE ifdefs are now hidden inside the shared stm32_buf_in_nocache()
implementation.

Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
2025-06-06 10:19:58 +02:00
Francois Ramu
ad0466f423 soc: st: stm32 Kconfig to retrieve the external Flash Base address
This commit is retrieving the config FLASH_BASE_ADDRESS
from the XSPI node of the stm32 device dtsi <reg> property of the
"st,stm32-xspi" node. For example the CONFIG_FLASH_BASE_ADDRESS
 is 0x90000000 and application is linked for that address.
Size is given by the size property of the "st,stm32-xspi-nor" node.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-05-21 17:35:06 +02:00
Oleh Kravchenko
4f69acc3d4 soc: stm32f1x: Add support for stop/standby modes
Add config and overlay to samples for testing stop/standby modes:

- samples/boards/st/power_mgmt/blinky
- samples/boards/st/power_mgmt/wkup_pins

I've measured consumption for each low-power mode:
- stop (regulator in run mode) ~217 uA
- stop (regulator in low-power mode) ~206 uA
- standby mode ~3.5 uA

Low-power mode wakeup timings from the datasheet,
but it barely meets these in reality:
- stop (regulator in run mode) 3.6 us
- stop (regulator in low-power mode) 5.4 us
- standby 50 us

It's possible to use RTC as idle timer to exit from stop mode.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
2025-05-20 10:16:20 +02:00
Harris Tomy
e31a6be0b0 soc: st: add stm32u535 support
Adds the u535 soc, similar to the u545 except without the AES HW
accelerator

signed-off-by: Harris Tomy <harristomy@gmail.com>
2025-05-14 19:36:26 +02:00
Conny Marco Menebröcker
fa53d93107 soc: add stm32l100xb
This patch adds support for the stm32l100 SoC. Tested on private board.

Signed-off-by: Conny Marco Menebröcker <c-m-m@gmx.de>
2025-05-08 01:57:52 +02:00
Guillaume Gautier
83e0ca82b6 soc: st: stm32n6: add arm v8.1 mvei and mvef kconfig
STM32N6 supports M-Profile Vector Extension (MVE) integer and
floating-point instruction set.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-05-06 15:31:51 +02:00
Martin Jäger
70947968d4 soc: stm32: common: wkup_pins: fix log output
Remove newline in log output and simplify log message.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 09:15:59 +02:00
Martin Jäger
bb0e580be4 soc: stm32g0x: add poweroff implementation
Same implementation as stm32c0x and stm32l4x. This is required
for wake-up from sleep.

Signed-off-by: Martin Jäger <martin@libre.solar>
2025-05-02 01:17:02 +02:00
Henrik Lindblom
9de3d6bf64 soc: stm32: use cache peripheral driver
Use the Zephyr cache API in soc initialization code instead of calling the
HAL directly. The change does not modify the pre-existing cache settings,
just changes the path they are enabled.

Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
2025-04-25 11:04:37 +02:00
Erwan Gouriou
b4c1dc63a8 soc: stm32h7r/s: smps is supported on all SoCs
Remove the sanity check between Cube HAL SMPS symbol and Kconfig SMPS
configuration.
SMPS is available on all STM32H7R/S SoC, so misalignment isn't possible.

Additionally, point to the hal commit which revert the fix which was done
on hal_stm32 to add this symbol.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-04-24 10:39:34 +02:00
Ricardo Rivera-Matos
2b553ba74f soc: stm32: Adds support for STM32F401XD variants
Introduces config file entries for STM32F401XD variants. The
STM32F401XD family is related to the STM32F401XE family but with a
reduced flash memory.

Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
2025-04-24 01:27:43 +02:00
Guillaume Gautier
9f02634d3f soc: st: stm32n6: configure regulator for best performance
Configure the main internal Regulator output voltage for best performance
on STM32N6.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-04-22 14:03:22 +02:00
Arnaud Pouliquen
cea2487d3d soc: st: stm32mp13: add missing arm_mmu.h include
The samples/subsys/llext/shell_loader test fails when running as a
twister test on the stm32mp135f_dk/stm32mp135fxx platform, with the
following error:

soc/st/stm32/stm32mp13x/soc.c:46:36:
error: array type has incomplete element type 'struct arm_mmu_region'
   46 | static const struct arm_mmu_region mmu_regions[] = {

This commit adds the missing arm_mmu.h include to fix the build issue.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-04-16 17:08:37 +02:00
Charles Dias
389c9e7b67 soc: st: stm32: add support for stm32u5g9xx
Add Kconfig and YML SoC configurations for STM32U5G9xx.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2025-04-16 01:10:06 +02:00
Francois Ramu
82d0c7aa5c soc: stm32: Adds the STM32WBA65x device.
This commit adds support for the STM32WBA65x MCU.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-04-15 15:33:15 +02:00
Tomáš Juřena
d700943d29 soc: st: stm32: Add poweroff to F4 family
Allows F4 MCUs to enter standby mode which behave similar to the poweroff
mode.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-04-11 06:33:56 +02:00
Tomáš Juřena
315ea56fef soc: st: common: Rename STM32_PWR_WKUP_PIN_SRC_x
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match
their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED)
for SoCs without wake-up mux support.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-04-09 15:22:59 +02:00
Tomáš Juřena
f1e3784b9d soc: st: stm32: poweroff uses stm32_wkup_pins
Update the poweroff code to use stm32_pwr_wkup_pin_cfg_pupd if enabled.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-04-08 11:45:24 +02:00
Christopher Cichiwskyj
7dcec3384e soc: add support for STM32F479
This chip shares its design with STM32F469, but with
an added cryptography accelerator.

Signed-off-by: Christopher Cichiwskyj <cichiwskyj@gmail.com>
2025-04-04 12:06:29 +02:00
Julien Racki
c099e27c06 soc: st: stm32: Provide basic support for STM32MP13 series
Enable basic support to STM32MP13, in single core configuration (A7)
with I and D cache enabled.

Signed-off-by: Julien Racki <julien.racki@st.com>
2025-04-04 09:35:03 +02:00
Fin Maaß
d139d84338 drivers: ethernet: stm32: make mac a child like the mdio node
mac and mdio are now on the same level, this way
phy-handle can be used.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-04-02 10:31:34 +02:00
Georgij Cernysiov
b2b6b9be7e soc: st: h7: m7: remove voltage scale setting
The voltage scaling is set during h7 clock initialization.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2025-03-31 21:59:28 +02:00
Mathieu Anquetin
bd0de75090 soc: st: stm32: add support for stm32f439
STM32F439 SoC is an STM32F429 with an integrated crypto/hash processor
providing hardware acceleration for encryption (AES and TDES) and hash
(MD5, SHA-1 and SHA-2).

Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
2025-03-28 16:09:50 +01:00
Nidhal BEN OTHMEN
9a82e95d72 soc: stm32wbax: hci_if: Re-write enable/disable IRQs
Migrate LINKLAYER_PLAT_EnableIRQ and LINKLAYER_PLAT_DisableIRQ
from linklayer_plat.c (hal/stm32 module).

Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
2025-03-20 14:22:21 +01:00
Nidhal BEN OTHMEN
b357f81ce9 soc: stm32wbax: hci_if: Re-write enable/disable Radio IRQ with irq API
Migrate LINKLAYER_PLAT_EnableRadioIT and LINKLAYER_PLAT_DisableRadioIT
from linklayer_plat.c (hal/stm32 module) and adapt it using irq
Zephyr APIs.
Correct casting of irq type between using NVIC APIs or irq Zephyr APIs

Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
2025-03-20 14:22:21 +01:00
Nidhal BEN OTHMEN
1b3feecfd8 soc: stm32wbax: hci_if: Increase the link layer thread priority
Increase the link layer thread priority to be more than the BLE CTRL
thread and more than the Zephyr BLE stack threads.

Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
2025-03-20 14:22:21 +01:00
Nidhal BEN OTHMEN
43c00e5b6c soc: stm32wbax: hci_if: Clean code
Clean the code, rename some constants and variables for more
consistency.

Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
2025-03-20 14:22:21 +01:00
Guillaume Gautier
a8ae1dcdcc soc: st: stm32: n6: set vddio voltage
Set VddIO 2 and 3 voltage to 1.8V

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-03-20 12:17:32 +01:00
Jordan Yates
65bc07c95e soc: st: stm32: build warning for STM32_ENABLE_DEBUG_SLEEP_STOP
Add a warning in the build system if both `CONFIG_PM` and
`STM32_ENABLE_DEBUG_SLEEP_STOP` are enabled at the same time. The first
is likely only enabled if the SoC is intended to be driven into low
power states to save power, while the later prevents the SoC from being
as low power as it can be.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-03-19 17:14:19 +01:00
Robin Kastberg
ddd1063715 soc: stm32: handle CCM in LINKER_GENERATOR
Currently, the soc/stm32/ccm.ld is not handled in
CMAKE_LINKER_GENERATOR.

This commit adds support, making STM32 supportable by
alternative linkers such as AC6 and IAR.

This commit also renames a variable to match all other
LOADADDR symbols.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
2025-03-07 19:54:24 +01:00
Erwan Gouriou
329df07a67 soc: stm32n6: CMakelists.txt: Fix signing tool if/else
If/else does fit here.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-02-21 15:13:11 +00:00
Erwan Gouriou
8c415f8e62 soc: stm32n6: Image signing: Refer to board documentation
Update missing signing tool warning to redirect to board doc.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-02-21 15:13:11 +00:00
Benjamin Cabé
703313aa54 soc: st: stm32: fix spelling of "corresponding"
s/correspending/corresponding/

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-02-19 18:51:13 +01:00
Alexander Kozhinov
2f211f415b soc: st: stm32: stm32h7x
This change splits eth sram region name definition
and configuration.
In the end the configuration is stored only once
er declared name.
This name shall increase readability and maintainability

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-02-14 10:43:00 +01:00
Guillaume Gautier
a024d5b984 soc: st: stm32n6: add missing kconfig for init hook
Add missing SOC_EARLY_INIT_HOOK Kconfig to STM32N6.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-02-11 03:07:12 +01:00
Erwan Gouriou
3d04068393 soc: stm32n6: Generate a warning when signing tool is not available
Generate a proper Cmake warning when signing tool isn't available.
This also allows not to fail in Github CI.


Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-02-03 19:56:49 +01:00
Erwan Gouriou
3c097d8662 soc: stm32n6: Add Boot serial option
This option should be used to load and run binary using "serial boot"
configuration for boot ROM.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-02-03 19:56:49 +01:00
Guillaume Gautier
25dea79d4c soc: st: stm32: stm32n6x: add signing tool
Generate signed binary necessary to start a program from Flash on STM32N6

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Guillaume Gautier
722310e6b1 soc: st: stm32: add a comment for kconfig source priority
Add a comment describing Kconfig source order priority to prevent
future questions (after overriding SYS_CLOCK_HW_CYCLES_PER_SEC config
for STM32N6).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Guillaume Gautier
016d048ded soc: st: stm32: add stm32n6 series
Add STM32N6 series

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Ali Hozhabri
e4389a2921 soc: st: stm32wb0x: Increase main stack size for BLE applications
Increase the size of the main stack for BLE applications to avoid
stack overflow on STM32WB0x series. Beacon sample was considered as
a reference for the size increase.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
2025-01-22 15:50:41 +01:00
Mathieu Choplain
db8a47a2ec soc: stm32wb0: replace SYS_INIT with early init hook
STM32WB0 series was missed when SoC initialization code was migrated
from SYS_INIT routines to the new soc_early_init_hook method
(c.f. commit c6a03606c2)

Update that series' initialization code to align it with all others.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-01-15 15:05:23 +01:00
Fabian Blatz
910ec595a0 boards: stm32h7b3i_dk: Move LV_DRAW_DMA2D_HAL_INCLUDE to the soc
Moves the LV_DRAW_DMA2D_HAL_INCLUDE to the soc instead of the development
kit since the hal include is the same across all boards using the soc.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-01-08 23:49:52 +01:00
Grzegorz Runc
9fcb17400b soc: stm32: add support for stm32h757
Add support for STM32H757 SoC, which shares its design
with STM32H747 with added cryptography peripherals.

Signed-off-by: Grzegorz Runc <g.runc@grinn-global.com>
2025-01-06 17:12:55 +00:00
Fabio Baltieri
d532d58316 Revert "soc: st: warn if running with debug on sleep enabled"
This reverts commit b33b3b17f7, turns out
it's causing issues in CI all over the place, the condition needs more
thinking.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-12-22 18:19:49 +00:00
Fabrice DJIATSA
12703bf633 soc: st: stm32: add soc for stm32c071
select soc for stm32c071 and irq configuration

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2024-12-20 12:37:00 +01:00
Fabio Baltieri
b33b3b17f7 soc: st: warn if running with debug on sleep enabled
Add a compiler warning when building for an STM32 series MCU with PM
enabled but STM32_ENABLE_DEBUG_SLEEP_STOP=y. That option greatly
increases the power consumption during sleep, which is probably
undesirable when building with PM=y, and it can be activated silently
as a side effect of other options (namely RTT) making it tricky to find
out.

Add a warning to expose the situation.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-12-20 00:50:10 +01:00