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soc: st: h7: m7: remove voltage scale setting

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The voltage scaling is set during h7 clock initialization.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
This commit is contained in:
Georgij Cernysiov 2025-03-19 11:01:38 +01:00 • committed by Benjamin Cabé
commit b2b6b9be7e
1 changed files with 0 additions and 3 deletions
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3
soc/st/stm32/stm32h7x/soc_m7.c
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@ -89,9 +89,6 @@ void soc_early_init_hook(void)
#else
LL_PWR_ConfigSupply(LL_PWR_LDO_SUPPLY);
#endif
LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
while (LL_PWR_IsActiveFlag_VOS() == 0) {
}
/* Errata ES0392 Rev 8:
* 2.2.9: Reading from AXI SRAM may lead to data read corruption