The STM32 DMA LL api differ between the STM32F7 and the STM32L4
in order to get the CHANNEL instance information. For that
reason, enclose within preproc statements STM32F7 specific code
and add STM32L4 code related to the DMA configuration for the
DCMI peripheral.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
This commit fixes an error introduced by commit c0dae0c9ac
("video: stm32: dcmi: perform config based on endpoint properties")
in which incorrect instance was being access leading to usage of
the default value for pixel clock / hsync / vsync polarities and bus
width.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Updates the file summary on the various arch-specific kernel
interfaces to accomplish two things:
1. Fix the path in the comment
2. Standardize on language/format.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
On TF-M platforms the PSA_WANT_xxx above do not enable the legacy
MBEDTLS_ECP_C build symbol which is required to enable the
mbedtls_pk_ec() function used in uOSCORE/uEDHOC.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Bring in the following changes from the rust module:
dd73abc242e zephyr: work: Allow struct to have a additional fields
898662c0889 zephyr-sys: Handle deflected GPIO constants
174ded53bd6 ci-manifest.yml: Add cmsis_6
This should fix CI for Rust. In addition, the allowing struct to have
addition fields should unblock #88345.
Signed-off-by: David Brown <david.brown@linaro.org>
Check if the actual velocity pointer is NULL or not, if its null return
-EINVAL in order to avoid null pointer dereferencing later in code
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
This commit resolves incorrect results in the interface status response.
The parameter for `sl_wifi_get_wireless_info` has changed following the
HAL Silabs update to version 3.5.0.
In AP mode, the implementation now correctly uses the `mac_address`
variable instead of `bssid`.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Power save is not supported in AP mode. This commit ensures that
`-EINVAL` is returned instead of success, preventing incorrect behavior.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Commit `2844850` inadvertently omitted
`SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_160MHZ`. This commit restores
the missing flag to ensure proper SOC clock setup.
Additionally, `SL_SI91X_CUSTOM_FEAT_LIMIT_PACKETS_PER_STA` is now enabled
as the default setting, aligning with the driver Kconfig.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
Add a dts overlay file for the STM32F4-DISCO to enable ADC ch testing
with the adc_api test.
Signed-off-by: Ajith Anandhan <ajithanandhan0406@gmail.com>
Add a board-specif dts overlay file for the adc_dt sample on the
STM32F4-DISCO board to enable for ADC channel support.
Signed-off-by: Ajith Anandhan <ajithanandhan0406@gmail.com>
At runtime, `cbprintf` outputs a warning of the type check of the
print format.
Added a cast to avoid this warning to the first argument of
`device_map()` to `void*`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
CONF_FILE parameter in testcase.yaml overwrites board
specific configurations. Change it to EXTRA_CONF_FILE
to apply both configurations.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
Adds support for the M5Stack Fire. Board files are adapted from those
used for the M5Stack Core2.
Aside from the 2 newest revisions the device also contains a BMM150
magnetometer which is not supported.
The LED strips on the sides are also not supported because Zephyr
does not support fast GPIO switching, see: #11917.
The IP5306 charger works by itself but doesn't have a driver written for
it thus it's not able to be interfaced with.
Signed-off-by: Jakub Novák <jakubnovak.cz@outlook.cz>
Add resolving the requested clock spec and getting the startup time
of the clock for given clock spec to the nordic specific
clock_control sample.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Introduce get_startup_time API which allows users to request
clocks specs to be met in time for an event.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Introduce API which allows users to determine what the actual
minimum spec will be resulting from a requested minimum spec. This
is useful for optimizing code as the requested minimum may be
way worse than what will actually be applied.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add minimal support for Renesas RZ/V2H-EVK M33 core
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Add devicetree to support for Renesas RZ/V2H M33 core
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
In the commit 573a712bed patch "arm64:
reset: disable cache and MMU for safety", it disables D-Cache and MMU
for safety, but in some cases, for example the code is loaded into memory
by hardware debugger, we need to flush D-Cache before disable it in
order to make sure the data is coherent in the system, otherwise it
will report "Synchronous Abort" when D-Cache is disabled.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This reverts commit 573a712bed.
The original patch disable cache and MMU, but in some cases, for example
the code is loaded into memory by hardware debugger, we need to flush
D-Cache before disable it in order to make sure the data is coherent
in the system, otherwise it will report "Synchronous Abort" when D-Cache
is disabled.
This patch revert the old one and the following patch will flush
the cache before disable it.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Added new configuration item to optionally enable APIs for operation
all data cache, by default these APIs are disabled.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
In order to clean and invalidate all D-Cache, so reverts commit:
867ba172b4.
Although no software broadcast between different CPU Cores for D-Cache
maintaining operation, but the hardware bus system should make sure it
is safety for all CPU Cores, because it is common for other SMP OS.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add driver for the microchip MCP3561/2/4R ADC. Registers lock and
CRCCFG protection mecanism is not implemented. Tested on an MCP3564R.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
