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arm64: reset: disable cache and MMU for safety

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When Zephyr boot from EL2, D-Cache, I-Cache and MMU should be disabled
by default, but in some cases, for example use U-Boot "go" command
to boot Zephyr Image, Cache and MMU are already been enabled by U-Boot.
So disable them at reset code to make it safety when the code goes
into C code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan 2025-02-27 16:15:07 +08:00 • committed by Benjamin Cabé
commit 573a712bed
1 changed files with 3 additions and 2 deletions
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5
arch/arm64/core/reset.S
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@ -58,9 +58,10 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__reset_prep_c)
b out
#endif /* CONFIG_ARMV8_R */
2:
/* Disable alignment fault checking */
/* Disable alignment fault checking, disable D-Cache, I-Cache, MMU for safety */
mrs x0, sctlr_el2
bic x0, x0, SCTLR_A_BIT
mov x1, #(SCTLR_A_BIT | SCTLR_C_BIT | SCTLR_M_BIT | SCTLR_I_BIT)
bic x0, x0, x1
msr sctlr_el2, x0
isb