michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: imx: disable dcache until mmu is enabled during booting

Browse source 
Enable CONFIG_ARM64_BOOT_DISABLE_DCACHE for i.MX Cortex-A platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan 2025-05-15 15:53:31 +08:00 • committed by Benjamin Cabé
commit e624cffd9b
6 changed files with 41 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

8
soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53
View file

@ -1,4 +1,4 @@
# Copyright 2021-2023 NXP
# Copyright 2021-2023, 2025 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX8ML8_A53
@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
config GIC_SAFE_CONFIG
default y
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
config NUM_IRQS
default 240

8
soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53
View file

@ -1,4 +1,4 @@
# Copyright 2020-2024 NXP
# Copyright 2020-2025 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX8MM6_A53
@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
config GIC_SAFE_CONFIG
default y
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
config NUM_IRQS
default 240

8
soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53
View file

@ -1,4 +1,4 @@
# Copyright 2022-2024 NXP
# Copyright 2022-2025 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX8MN6_A53
@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
config GIC_SAFE_CONFIG
default y
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
config NUM_IRQS
default 240

6
soc/nxp/imx/imx9/imx91/Kconfig.defconfig.mimx91
View file

@ -18,4 +18,10 @@ config NUM_IRQS
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 24000000
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
endif

8
soc/nxp/imx/imx9/imx93/Kconfig.defconfig.mimx93.a55
View file

@ -1,4 +1,4 @@
# Copyright 2022-2024 NXP
# Copyright 2022-2025 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX9352_A55
@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
config GIC_SAFE_CONFIG
default y
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
config NUM_IRQS
default 240

8
soc/nxp/imx/imx9/imx95/Kconfig.defconfig.mimx95.a55
View file

@ -1,4 +1,4 @@
# Copyright 2024 NXP
# Copyright 2024-2025 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX9596_A55
@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
config GIC_SAFE_CONFIG
default y
# Disable data cache until MMU is enabled when booting from EL2
config ARM64_DCACHE_ALL_OPS
default y
config ARM64_BOOT_DISABLE_DCACHE
default y
config NUM_IRQS
default 320