soc: imx: disable dcache until mmu is enabled during booting
Enable CONFIG_ARM64_BOOT_DISABLE_DCACHE for i.MX Cortex-A platforms. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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6 changed files with 41 additions and 5 deletions
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@ -1,4 +1,4 @@
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# Copyright 2021-2023 NXP
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# Copyright 2021-2023, 2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMX8ML8_A53
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@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
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config GIC_SAFE_CONFIG
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default y
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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config NUM_IRQS
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default 240
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# Copyright 2020-2024 NXP
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# Copyright 2020-2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMX8MM6_A53
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@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
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config GIC_SAFE_CONFIG
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default y
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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config NUM_IRQS
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default 240
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# Copyright 2022-2024 NXP
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# Copyright 2022-2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMX8MN6_A53
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@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
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config GIC_SAFE_CONFIG
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default y
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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config NUM_IRQS
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default 240
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@ -18,4 +18,10 @@ config NUM_IRQS
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 24000000
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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endif
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# Copyright 2022-2024 NXP
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# Copyright 2022-2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMX9352_A55
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@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
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config GIC_SAFE_CONFIG
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default y
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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config NUM_IRQS
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default 240
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@ -1,4 +1,4 @@
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# Copyright 2024 NXP
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# Copyright 2024-2025 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMX9596_A55
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@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS
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config GIC_SAFE_CONFIG
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default y
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# Disable data cache until MMU is enabled when booting from EL2
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config ARM64_DCACHE_ALL_OPS
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default y
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config ARM64_BOOT_DISABLE_DCACHE
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default y
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config NUM_IRQS
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default 320
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