Add initial support for Renesas RZ/V2N
Signed-off-by: Hieu Nguyen <hieu.nguyen.ym@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Introduce the stm32u3 serie to the the existing flash driver
It is based on the stm32l5 model.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Implement conditional compilation to avoid the warning:
- Use LL_PWR_EnableVDDIO2() for STM32U3 series.
- Use LL_PWR_EnableVddIO2() for other series.
Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
Add documentation for am243x_evm and while at it, add the openocd
configuration as well.
Co-authored-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Add SoC support and device trees for Texas Instruments AM2434 SoC. Both R5
and M4 cores are supported here.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Some devices have multiple pinctrl regions; for instance, main pinctrl and
mcu pinctrl. Currently there can only be a single pinctrl instance picked
form a DT label. This patch makes the pinctrl driver initialise one
instance for each node with correct compatible string.
Signed-off-by: Amneesh Singh <a-singh7@ti.com>
Added support for deriving `SYS_CLOCK_HW_CYCLES_PER_SEC` from the
Device Tree by reading the `clock-frequency` property in the `itim` node.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
For testing/debugging purposes, it will be possible then to register
or unregister an i2c target.
Signed-off-by: Tomasz Bursztyka <tobu@bang-olufsen.dk>
Co-authored-by: Hans Binderup <habi@bang-olufsen.dk>
The driver originally supported only it8xxx2 series. This updates
introduces compatibility allow it to also support it51xxx series
with minimal changes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Registers driver with pm_device_driver_init(). Moved
chip init routine into separate function to be called
from PM_DEVICE_ACTION_TURN_ON. Added a delay after
power-up.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
When uart_ns16550_irq_tx_enable() is called and the TX FIFO is already
empty, no new interrupt is generated, causing data transmission to stall
in some cases. This patch introduces a workaround to simulate an ISR
callback if the FIFO is empty when enabling the TX IRQ.
Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
1.correct timer register control flow
2.select timer interrupt rising edge trigger, instead of default
level trigger
Stress test: top timer fires interrupt every 300ms for 18 hours.
The result is that we don't lose any interrupts.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
HID lookup table can live in Flash and save some RAM (quite a bit
actually, as it's quite large!).
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Clarify linking issues in PRs and Commit messages and address the issue
of ambiguity across multiple github repos.
Not allowing links in commit messages so that forks can be happy is not
great.
Forks on Github have no problem with linking, however,
disconnected forks seem to not link correctly, but then why does this
matter?
If someone is taking Zephyr and developing it as their own, they
can for sure do that, but why this should force the Zephyr project to
manage traceability differently and make it more difficult for
developers to add such information in the git metadata directly and not
relying on pull requests.
Most developers use git directly and rely less on pull request and
github UI when browsing changes in the code base.. We need to be able to
see by looking at git commits and git
history if a commit is associated with a bug, some PRs might fix
multiple issues, so the context is important and by looking at each
commit the trace can be established immesiately without going back to
github pull requests.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The optee suite was failing in test_suspend() after a call to
k_aligned_alloc() which returns -ENOMEM. The alignment requirement is
4096 bytes, which seems reasonable, but what is odd about that is
that the alignment fails in spite of
CONFIG_SRAM_SIZE=145131134582784
and
CONFIG_HEAP_MEM_POOL_SIZE=270044
So there is plenty of memory available for this test and alignment
considerations should not be an issue.
Removing `CONFIG_DEBUG=y` solved the problem for me.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Ensure that qemu_x86 (the integration platform) is on the allow list
for `sample.net.sockets.socketpair.s32k148_evb`.
```
INFO: Error found: sample.net.sockets.socketpair.s32k148_evb on
qemu_x86/atom (Not in testsuite platform allow list but is one of the
integration platforms)
```
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
This test fails sporadically on SMP, so make it run only on one CPU.
Related to zephyrproject-rtos/zephyr#91620
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
It seems there is no functional impact, but it makes sense to also update
the state of the interface when AP is started/stopped.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
The interface was properly set "dormant" on disconnect. However on startup,
it arrived in the system with "awake" status. Hence, some configuration
frames were sent before the interface was connected. Then, when the
interface was marked awake after the connection, the frames were not sent
again since the operational mode did not changed.
Therefore, Router Solicitations were not send, the Router Advertisements
were not received and the IPv6 address was not set.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Disable support to local ISR declaration on Espressif SoCs.
Code relocation is not yet supported, causing build fail.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
gpio_rpi_isr() always addressed io_bank0->proc0_irq_ctrl, so any
interrupts taken while code was running on core 1 were invisible and
left pending.
Use get_core_num() to pick proc1_irq_ctrl when the ISR executes on core
1, ensuring callbacks fire from both cores.
Also fix stray `iobank0_hw` symbol for the correct `io_bank0_hw`.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
