Commit graph

141 commits

Author SHA1 Message Date
Kumar Gala
bc8bdebca7 Revert "gpio: Add GPIO voltage overrides"
This reverts commit 4c888ed25b.

This change wasn't ready, so lets back it out for now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-06-11 17:41:48 +02:00
Tim Lin
8ea58d4389 ite: drivers/adc: create pinmux phandle to the ADC driver node
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-11 15:47:25 +02:00
Denis Brockus
4c888ed25b gpio: Add GPIO voltage overrides
Add GPIO_flag values for GPIO DTS creation that
allows for pins that do not use the default
voltage.  IT8xxx2 supports setting voltage
levels for each pin. The default for this SoC
is 3P3 but they can be set individually to
1P8.

This will be used, for example:

	i2c_c_scl {
		gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
		enum-name = "GPIO_I2C_C_SCL";
		label = "I2C_C_SCL";
	};

Signed-off-by: Denis Brockus <dbrockus@google.com>
2021-06-10 17:12:08 -04:00
Eug Krashtan
2b8c123a3b drivers: adc: Define max acquisition time
Required in STM32 tempereture sensor asquisition.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Hake Huang
d7edd375bd adc: add sim opt for adc hw trigger
add sim opt setting for adc hw trigger

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-05-07 08:23:49 -05:00
Tim Lin
caa3328cc7 ite: drivers/pinmux: modify pinmux driver
Modify the pinmux control method and add support the fun3
& fun4 alternation function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-05 08:45:16 -04:00
Keith Short
e7a9775cca adc: Move ADC acquisition time macros
Move the ADC acquisition time macros so that they can be utiliized by
devicetrees.

Signed-off-by: Keith Short <keithshort@google.com>
2021-04-29 09:50:18 -04:00
Dino Li
0ab51ff657 drivers: gpio: ite_it8xxx2: enable more gpio groups
This change enables A, C, D, E, G, H, I, J, K, and L groups,
and fix gpio interrupt function.

This change also pull (and rename) dt-bindings/irq.h to
dt-bindings/interrupt-controller/ite-intc.h, because it is
chip-specific.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ifee039981c2cc4cf5980e663702a9921e629fc1e
2021-04-23 06:31:56 -04:00
Julien Massot
877c050599 include: Add Renesas clock control driver
DTS bindings file for Renesas RCar CPG clock control.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-04-22 10:38:45 +02:00
Henrik Brix Andersen
a865b1bb49 soc: arm: nxp: ke1xf: use clock nodes for NXP Kinetis SCG clocks
Use a combination of fixed-clock and fixed-factor-clock devicetree
nodes for describing the clock dividers/multipliers of the NXP Kinetis
System Clock Generator (SCG) present in the KE1xF SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-03-31 11:56:13 -05:00
Mulin Chao
12a30dce19 dts: psl: npcx: add PSL pads support for ultra-low-power mode.
This CL introduces the Power Switch Logic (PSL) pads which detect the
wake-up events and turn on/off core power supply (VCC1) for ultra-low
-power consumption in npcx device-tree file.

By adding PSL input-pad objects, psl_in1, psl_in2, and so on, into
'psl-in-pads' property and configuring their 'flag' properties, the
related driver will configure them via soc specific functions later.

For example, if PSL input 1 pad that is plan to detect a 'falling edge'
event, this property should be:
	vsby-psl-in-list {
		psl-in-pads = <&psl_in1>;
	};

And the flag property in psl_in1 should change to
	&psl_in1 {
		flag = <NPCX_PSL_FALLING_EDGE>;
	};

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-26 07:11:59 -04:00
Mikkel Jakobsen
93dc7e9b44 drivers: clock_control: mcux_mcg: add MCGOUTCLK define
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
2021-03-08 12:18:33 -06:00
Mulin Chao
7c9d3f44f0 driver: sensor: npcx: add tachometer sensor support.
In NPCX7 series, it contains two tachometer (TACH) modules that contains
two Independent timers (counter 1 and 2). They are used to capture a
counter value when an event is detected via the external pads (TA or
TB).

The CL also includes:
— Add npcx tachometer device tree declarations.
— Zephyr sensor api implementation for tachometer.
— Enable "tach1" device in npcx7m6fb.dts for testing.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-02-22 17:56:19 -05:00
Johan Hedberg
d01fa56f6a drivers: pcie: Introduce API to look up devices by ID
In some cases we cannot know the BDF up-front, so provide a way to
look it up based on the vendor and device ID.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-02-15 08:23:05 -05:00
Anas Nashif
37d1ed8b4d intc: mvic: remove unused header
File is not being used anymore, mvic interrupt controller was dropped
long time ago.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-11 08:05:16 -05:00
Hake Huang
2a8a580825 clocks: add clock api for gpt
add clock api for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Henrik Brix Andersen
77b8440fd1 drivers: pwm: add API for capturing pwm pulse width and period
Extend the PWM API with optional API functions for capturing PWM pulse
width and period cycles.

Fixes #26026.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-01-12 19:43:06 +01:00
Cheryl Su
54ef3c55bb include/de-bindings: create a irq.h for devicetree
This file define the interrupt trigger mode
It's can be used for parsing devicetree
interrupt-control flag setting.

Signed-off-by: Cheryl Su <Cheryl.su@ite.com.tw>
2020-12-16 08:47:36 -05:00
Mulin Chao
507f31472c driver: clock_controller: return values of clock_control apis directly.
return values of clock_control_on()/clock_control_get_rate() directly in
case overwriting error codes.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-12-07 12:11:17 -05:00
Gerard Marull-Paretas
e671d363b8 drivers: memc: stm32: initial support for stm32 FMC
This commit adds a new driver category for memory controller
peripherals. There is no API involved for now, as it has not been found
necessary for first implementation.

STM32 Flexible Memory Controller (FMC) is the only controller supported
for now. This peripheral allows to access multiple types of external
memories, e.g. SDRAM, NAND, NOR Flash...

The initial implementation adds support for the SDRAM controller only.
The HAL API is used, so the implementation should be portable to other
STM32 series. It has only been tested on H7 series, so for now it can
only be enabled when working on H7.

Linker facilities have also been added in order to allow applications to
easily define a variable in SDRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-24 16:33:17 +01:00
Gerard Marull-Paretas
acb0cd65ca drivers: display: ili9xxx: generalize ILI display driver
Make driver generic for multiple ILI displays. The adopted strategy is
to share all driver code except register initialization, which has been
found to have some specific registers/values depending on the
controller.

The driver has been adjusted to support multiple compatibles.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-10 15:52:12 -06:00
Gerson Fernando Budke
9b43ac7c76 include: dt-bindings: Add macros entry point for DTS preprocessor
Introduce <dt-bindings/dt-util.h> file.  It wraps <sys/util_macro.h>
file exposing all macro base definitions to DTS preprocessor.  Once it
contains only prepocessor macros, it can be safely included in DTS,
similar way the <dts/arm/<manufacturer>/pinctrl_<manufacturer>_<soc>.h
files are included.

This provides necessary background to elaborate complex constructions
like variable length macros with zero or more elements.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-10-23 09:38:55 -05:00
Mahesh Mahadevan
b50d0ebfcb include: Add NXP LPC clock control driver
DTS bindings file for NXP LPC clock control driver that
uses the MCUX SDK drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-15 11:17:24 -05:00
Mulin Chao
be217e4a3a drivers: eSPI: add eSPI driver support for NPCX7 series.
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.

Becisdes introducing eSPI device in npcx7, this CL also includes:

1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
   Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-02 11:33:15 +02:00
Erwan Gouriou
029d749446 include/dt-bindings: Add include binding for st,stm32f1-pinctrl
Add header to allow use of STM32F1_PINMUX macros described
for st,stm32f1-pinctrl binding.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Erwan Gouriou
b023dbe8b3 include/dt-bindings/pinctrl: stm32f1: No pull-up/down on output mode
On stm32f1 series, in output mode, there is no way to enable
pull-up/down resistors.
Clean these settings from helper defines.

Additionally add helper define to shorten few lines.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Erwan Gouriou
e45757ffb1 include/dt-bindings/pinctrl: stm32: Move non F1 compatible definitions
Macro STM32_PINMUX and related definitions are not compatible with
stm32f1 series and then should not be provided in -common.h.
Move them to stm32-pinctrl.h

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Erwan Gouriou
e9eec5a5d1 include/dt-bindings/pinctrl: stm32: Rename stm32-pinctrlf1
Rename header file stm32-pinctrlf1.h to more appropriate
stm32f1-pinctrl.h

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Erwan Gouriou
b48ba090e4 include/dt-bindings: stm32: provide stm32-pinctrl-common.h binding
Provide stm32-pinctrl-common.h matching st,stm32-pinmux binding.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-01 11:08:42 -05:00
Gerard Marull-Paretas
347e0f2bdc drivers: display: ili9340: add support for configuring pixel format
Move pixel format setting (RGB565/RGB888) to DeviceTree. Add support for
changing pixel format at runtime.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-09-29 14:18:05 -05:00
Nicolai Glud
bc72b67a5d dts: clocks: kinetis: set pllfll and er32k clock settings from dts
Setup osc clock settings from dts.

Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2020-09-29 14:05:50 -05:00
Rick Talbott
60e5e79ca1 drivers: mcux: imx rt flexcan support
Adds imx rt support.
Allows n-number of can interfaces based on device-tree.
Adds a "common" irq name.
Added CAN bus pins and dts for 1060 and 1064 EVK.

Signed-off-by: Rick Talbott <rtalbott@fastmail.com>
2020-09-29 14:03:10 -05:00
Simon Guinot
9d729acc37 dts: introduce binding for LED controllers
The led-controller DT binding gathers some common properties for LED
controllers and for the LED child nodes.

One notable property is "color-mapping" which allows to define a channel
to color mapping for multicolor LEDs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-08-28 15:04:35 +02:00
Kwon Tae-young
2aeed81202 drivers: dac: Added driver for TI DACx0508
TI's DACx0508 is a DAC chip that supports SPI.
Gain and Reference can be set through the register.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-08-26 12:24:43 +02:00
Manivannan Sadhasivam
1118428abb drivers: clock_control: Add support for MCUX CCM IUART clock
Add support for controlling the MCUX CCM IUART clock.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2020-08-14 14:51:50 -05:00
Mulin Chao
0245a27bc5 driver: clock: Add clock controller support in NPCX series.
Add clock controller support for Nuvoton NPCX series. This CL includes:

1. Add clock controller device tree declarations.
2. Introduce clock-cells in yaml file clock tree to get module's source
clock and turn off/on the its clock
3. Clock controller driver implementation.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-08-13 16:42:20 +02:00
Maxime Bittan
1724bf49be dts: arm: nxp: Add node and bindings for lpc11u6x clock controller
This commit adds a bindings for the clock controller used in lpc11u6x
MCUs. It also adds a clock-controller node for the lpc11u6x soc series.

Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
2020-07-29 20:12:24 +02:00
Simon Guinot
6eb7841bf3 dts: lpc11u6x: add pinmux node and binding
This patch adds the DT nodes and binding for the pinmux registers,
aka IOCON (I/O control), found on the LPC11U6x MCUs.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2020-07-29 20:12:24 +02:00
Andreas Sandberg
3d1fa70e80 dts: bindings: Add bindings for Semtech SX126x
Add device tree bindings for the Semtech SX1261 and SX1262
radios. These will be used by Zephyr's LoRa drivers.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
2020-07-02 08:32:37 -04:00
Sandeep Tripathy
739bc24fc2 interrupt_controller: gic: update default priority
Use '0xa0' as default priority to be consistent with the V1/V2 and
V3 drivers default priority init.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-07-01 08:02:57 -04:00
Piotr Mienkowski
4b194eb4fc gpio: remove deprecated API functions/macros
This commit removes API functions and macros which were deprecated in
2.2 release. GPIO drivers are updated accordingly.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-06-16 19:13:05 +02:00
Mohamed ElShahawi
4acac3e9ef drivers: esp32/clock_control: Add Clock Driver
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).

- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-06-16 09:00:51 -05:00
Hake Huang
5582c2f00b dt-bindings: dts/arm/nxp : add MCUX EDMA Support
add MCUX EDMA support for dts binding

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-06-12 13:03:28 -05:00
Zide Chen
f32eeba925 dts: x86: configure different IO APIC delivery modes for various devices
For HPET devices, configure it with fixed delivery mode because HPET
timer interrupt is needed to fuel the scheduler for all CPUS.

For all other type of devices, like UART, I2C, GPIO, Ethernet, etc.
configure them as lowest priority delivery mode, in which IO APIC
delivers the interrupt to the processor core that is executing at the
lowest priority among all the processors listed in the specified
destination. In this case, the device drivers can avoid the trouble of
handling repeated interrupts delivered to all CPUS.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-05-08 22:32:39 -04:00
Parthiban Nallathambi
84da7e362f stm32_pinctrl: remove duplicate definition
remove duplicate definition of STM32PIN

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-05-04 19:49:14 +02:00
Francois Ramu
35b7a5dc34 include: bindings: dma define the bindings for stm32 soc series
This defines the configuration for the DMA client
as specifed in the ./dts/bindings/dma/st,stm32-dma.yaml

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-04-17 03:13:02 -05:00
Abe Kohandel
861548f12f drivers: dma: i2s: stm32: I2S Master DMA support
When configuring the I2S peripheral as a master, the DMA channel
direction must be configured to transfer data from memory to the
peripheral.

Currently the configuration of channel direction is always set for
peripheral to memory regardless of whether it is the TX or the RX
channel.

Signed-off-by: Abe Kohandel <abe@electronshepherds.com>
2020-04-09 19:57:08 +02:00
Kumar Gala
e6a1dc9674 soc: arm: nxp_imx: Convert from Kconfig to DT_NODELABEL
As prep for drivers being converted to utilize DT_INST and removal of
per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL
instead.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-04 09:34:00 -05:00
Peter Bigot
fe266f9d2c gpio: restore missing legacy devicetree direction flag
GPIO_DIR_OUT is deprecated but allowed in devicetree bindings because
some in-tree bindings provided it in the past.  GPIO_DIR_IN was the
former explicit way of representing the default direction.  Put it
back so symmetry is maintained.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-13 22:50:45 +02:00
Peter Bigot
52aa8edbd0 gpio: support logic-level output at initialization
Extend the physical level GPIO_OUTPUT_{HIGH,LOW} configuration with
GPIO_OUTPUT_{ACTIVE,INACTIVE} for logic level initialization.

This enables use of device-tree configuration flags in calls to
gpio_pin_configure() to set the logic level without having to
determine the corresponding physical level.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00