Enable the bandgap buffer on the NXP Kinetis K6x SoC series Power
Management Controller (PMC) if the internal temperature sensor is in
use.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.
Signed-off-by: Roland Ma <rolandma@yahoo.com>
Refactors the mcux wdog driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux rtc driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux dspi driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpsci driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux uart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from kinetis socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The counter_basic_api test was broken for i.mx rt boards when we
refactored the mcux gpt driver to use generated device tree macros in
commit b8ad9969ef.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux igpio driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpuart driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Refactors the mcux lpi2c driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt and kinetis
socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adding Kconfig settings to warn anyone trying to build for this
platform of its pending deprecation in 2.2.0.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32fg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit adds support for the on-board flash MX25R8035F that is
directly connected to the efr32mg soc.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit relocates the exception vector table address range
configuration routine that was previously implemented as part of
Cortex-R architecture reset function to SoC platform-specific
initialisation routine.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The Xilinx ZynqMP SoC embeds both Cortex-R "RPU" and Cortex-A "APU"
cores.
Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within the same project, the RPU and APU should be
considered separate platforms and handled accordingly.
This commit re-purposes the SOC_XILINX_ZYNQMP symbol as a helper symbol
indicating that Xilinx ZynqMP SoC is used, and adds a new symbol,
SOC_XILINX_ZYNQMP_RPU, for specifying the actual build target platform.
When Cortex-A support is added in the future, SOC_XILINX_ZYNQMP_APU
symbol should be added and used to conditionally handle APU-specific
code.
For more details, refer to the issue #20217.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Make sure light sleep hook function is compile when needed
This solves linking error for shippable test that only enable
light sleep.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This patch adds a temporary workaround for the incorrect initialization
of the SystemCoreClock global variable that is done for the application
core of nRF5340 (see system_nrf5340_application.c) and that results in
k_busy_wait() producing delays of twice the requested time.
The problem is that the call to SystemCoreClockUpdate() that is done
at the end of SystemInit() correctly sets the value of SystemCoreClock
to reflect the hardware state after reset (HFCLK128M divided by 2),
but then the SystemCoreClock variable is initialized (by z_data_copy()
called from z_arm_prep_c()) to the __SYSTEM_CLOCK value that is defined
as 128000000. This in turn results in nrfx_coredep_delay_us() (used by
k_busy_wait() by default for nRF SoCs) delaying for twice the requested
number of microseconds.
The temporary workaround is to call SystemCoreClockUpdate() at a later
stage of the system initialization, in its nRF53 specific part.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The RTC peripheral found in the SAMD5x/SAME5x MCUs is very
simmilar to the one found in existing sam0 devices with only
a few changes to register names and the clock source selection.
Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.
There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
The current GIC configuration scheme is designed to support only one
specific type and version of GIC (i.e. GIC-400 that implements the
GICv2 interface).
This commit adds a set of GIC version configuration symbols that can
be selected by the SoC configuration to specify which version of GIC
interface is implemented in the SoC.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
nrf51 and nrf52 by default was enabling temperature sensor if sensor
API was enabled. It was causing code size increase even when
temperature sensor was not touched by anyone. Removed default enabling
of temperature sensor for both series.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.
Changes:
- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test
Test: spi_loopback test passed
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Setting EEPROM_STM32 with `default y` under `if SOC_FAMILY_STM32`
overrides `depends on SOC_SERIES_STM32L1X` in EEPROM_STM32
definition.
Then, if ever EEPROM is set in any file (as in
tests/drivers/build_all`), EEPROM_STM32 will be indeed set,
with potential issues on series where driver is not yet correctly
handled.
Fix this by removing EEPROM_STM32 definition in STM32 generic
file and set `default y` along with the `depends on` to keep
it effective.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 94bed60abea53818c8cd723e233799a77c4b4e4b introduced separate
DT symbols for SPI and SPIM. Update dts_fixup.h for all nRF chips
to align with those changes.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Commit a8a85c21cff7319e80af16688ea6076594fab7c8 introduced separate
DT symbols for TWI and TWIM. Update dts_fixup.h for all nRF chips
to align with those changes.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Uses the generated device tree macros, DT_NXP_LPC_USART_USART_*, in the
mcux flexcomm driver and removes the now unused dts fixups from the
lpc54xxx and lpc55xxx socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Renames the lpc usart shim driver to more accurately reflect the
flexcomm hardware IP and to prepare for instantiating it on an SoC
outside the LPC family.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
