The `xlnx,ttcps` binding, despite having the file name of
`xlnx,ttcps.yaml`, had the compatible property of `cdns,ttc`.
While it is true that the Xilinx ZynqMP platform embeds the Cadence
Triple Timer Counter (TTC) IP core, its TTC differs from the original
Cadence core in that it implements 32-bit counters, instead of the
16-bit counters defined in the original; hence, the Xilinx variant is
not compatible with the original Cadence version and should be treated
as a different device.
This commit changes the `xlnx,ttcps.yaml` compatible property to
`xlnx,ttcps` for the above reasons.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Add a fixed clock to the qemu-virt-a53.dtsi to match how the musca dts
files work so we get the clock DT info in the same way in the driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add entropy driver based on GECKO TRNG module along with device
tree support for EFM32PG and EFR32MG SOCs.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
Convert usb_stm32 driver to use of DT_INST macros.
Since driver is compatible with 3 different dt compatibles and
compatible string is included in DT_INST macros, I've kept the
DT_USB_ compatible agnostic macros based on DT_INST ones, which
allowed to remove fixup definitions.
Use of DT_USB symbols is now limited to usb_dc_stm32.
Additionally, compatible "st,stm32-otgfs" is removed from list
of compatibles for usbotg_hs ips.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32 spi devices, there are 2 main IP variants, with and w/o
fifo. Fifo is not really used today, but still there is some
additional code handling fifo. Today this code is protected under
Kconfig symbol SPI_STM32_HAS_FIFO.
This code carries redundant information vs dedicated compatible
"st,stm32-spi-fifo", which is provided as unique driver compatible
for devices supporting this IP as opposed to use of "st,stm32-spi"
when fifo is not supported.
Having these 2 compatibles defined exclusively is not convenient for
migration to DT_INST as DT_INST macros contain compatible string and
hence it cannot be used to provide common compatible code for devices
defining different compatibles.
Based on these observations, review stm32 spi devices compatible
declarations. Devices supporting fifo will now declare both
compatibles, as proposed by dt spec: "[compatible] property value
consists of a concatenated list of null terminated strings,
from most specific to most general". Hence field will now be:
"st,stm32-spi-fifo", "st,stm32-spi"
This way, fifo enabled stm32 spi devices will generate both:
DT_INST_STM32_SPI_FOO and DT_INST_STM32_SPI_FIFO_FOO
As well as:
DT_COMPAT_ST_STM32_SPI and DT_COMPAT_ST_STM32_SPI_FIFO
So, DT_INST_STM32_SPI_FOO could be used for device initialization.
Also DT_COMPAT_ST_STM32_SPI_FIFO could be used for FIFO handling
code inside driver. Hence use it to replace Kconfig symbol
SPI_STM32_HAS_FIFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a property to the nxp,kinetis-gpio binding that related the GPIO
node to the pinmux PORT node.
For the kl25z we add the pinmux nodes as well since they didn't exist.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Enable counter driver support for H7 series. Tested with H743ZI MCU
using samples/drivers/counter/alarm.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Change to code to use the automatically generated DT_INST_*
defines and remove the now unneeded configs and fixups.
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Introduction of tachometer device nodes for the Microchip
MEC1501 SOC. In addition, dts bindings for are also introduced.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
LPC55S69 CPU1 definition added.
Dual Core is not enabled!
Definitions related to dual core split of SoC's CPUs.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add girq and girq-bit to encode per device information. This allows the
driver to get any device unique info from device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines. Replace dts_fixup.h use
for DT_RTC_0_NAME with DT_INST_0_NXP_KINETIS_RTC_LABEL to be
consistent. Also, remove the aliases that had been used for this
driver in various nxp_k*.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert driver to use DT_INST_ defines and remove Kconfig per instance
enablement in favor of DT_INST_ define existing. Also, remove the
aliases that had been used for this driver in nxp_rt.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32g0 SoC. Enable the independent watchdog
for the stm32g0 series for use with this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
On stm32f302/3 series, USB and CAN_1 share same IRQ lines.
To use USB and CAN_1 together, USB IRQ could be remap to other
line numbers, on which there is no conflict.
Remap the USB IRQ lines by default:
-Assign remap number in matching dtsi files
-Perform remap before usb driver init
Additionally, fix compilation issue in usb driver.
Fixes#22343
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds the following:
- EFR32FG1P SoC support for the watchdog
- efr32_slwstk6061a board support for the watchdog
Signed-off-by: Oane Kingma <o.kingma@interay.com>
This commit adds the following:
- EFR32MG SoC support for the watchdog
- efr32mg_sltb004a board support for the watchdog
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test
Signed-off-by: Oane Kingma <o.kingma@interay.com>
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The blocks were moved into the soc block in samd5x.dtsi,
so we also have to move them for the the actual SoC definitions
that inherit from that.
Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
The Silicon Labs EFM32 Jade Gecko MCU includes:
* Cortex-M3 core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
