Commit graph

7653 commits

Author SHA1 Message Date
Robert Lubos
cce9d19ca8 drivers: ieee80154_nrf5: Add support for PAN coordinator mode
Implement `IEEE802154_CONFIG_PAN_COORDINATOR` handling.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-03-26 17:42:40 +02:00
Robert Lubos
f8092789b7 drivers: ieee80154_nrf5: Add support for promiscous mode
Implement `IEEE802154_CONFIG_PROMISCUOUS` handling.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-03-26 17:42:40 +02:00
Stephanos Ioannidis
22d0a1dfb3 drivers: ethernet: sam_gmac: Do not use "NTO" typedef style
The Atmel DFP headers define two "component typedef styles": RFO and
NTO; where the latter makes use of bit field structs to access hardware
registers.

The default component typedef style assumed by the DFP headers (i.e.
when `COMPONENT_TYPEDEF_STYLE` is not explicitly defined) is "RFO" and
this is indeed the component typedef style used throughout the Zephyr
Atmel SAM drivers, except in the particular instance which this commit
addresses.

The use of `GMAC_TA_Type` bit field struct, which is an "NTO" style
construct, is no longer possible with the latest DFPs because
conditional compilation checks for the bit field struct definitions
were added to restrict the use of such constructs to only when the
global component typedef style is set to "NTO".

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-26 09:23:48 -05:00
Stephanos Ioannidis
c4479d0643 drivers: usb_dc_sam: Use mode-specific interrupt register fields
The new Atmel DFP USBHS component headers provide mode-specific
interrupt register field definitions that replace the generic
definitions (e.g. `USBHS_DEVEPTISR_RXSTPI` for a control endpoint is
now `USBHS_DEVEPTISR_CTRL_RXSTPI`).

This commit updates the Zephyr SAM USBHS driver to use the new
mode-specific interrupt register field definitions.

In addition, it maps the generic definitions to the mode-specific
definitions, as the revision A variant headers (e.g. same70a) in the
latest DFPs, at the time of writing, still provide only the generic
definitions.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-03-26 09:23:48 -05:00
Kumar Gala
8ea8925ebe drivers: esp32: Convert esp32 drivers to new DT_INST macros
Convert older DT_INST_ macro use in esp32 drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 08:49:11 -05:00
Kumar Gala
b99ee328f8 drivers: serial: esp32: rename fake DT define
Rename DT_INST_{0,1,2}_ESPRESSIF_ESP32_UART_IRQ_0 defines to something
non-DT prefixed.  This way we know which defines are one's we generate
and which ones are driver created.  It should be easy enough to replace
these INST_{0,1,2}_ESPRESSIF_ESP32_UART_IRQ_0 define with DTS generated
one macros once esp32 has interrupt controller support in DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 08:49:11 -05:00
Kumar Gala
4cb0a5d992 drivers: silabs: Convert silabs drivers to new DT_INST macros
Convert older DT_INST_ macro use in silab drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 05:26:23 -05:00
Kumar Gala
e7df99d4ee drivers: cc13xx_cc26xx: Convert drivers to new DT_INST macros
Convert older DT_INST_ macro use in cc13xx_cc26xx drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 05:20:19 -05:00
Kumar Gala
3bc3f2af80 drivers: led_strip: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 05:19:00 -05:00
Kumar Gala
59379f9d53 drivers: kscan: ft5336: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:41:35 -05:00
Kumar Gala
4b9fe8a24e drivers: mcux: Convert MCUX drivers to new DT_INST macros
Convert older DT_INST_ macro use in MCUX drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:40:09 -05:00
Kumar Gala
aa5adf3c79 drivers: stellaris: Convert stellaris drivers to new DT_INST macros
Convert older DT_INST_ macro use in stellaris drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:39:11 -05:00
Kumar Gala
0bf9e0da94 drivers: can: can_mcp2515: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:34:37 -05:00
Kumar Gala
5f3154ceff drivers: led: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:32:26 -05:00
Kumar Gala
a6e94a38b3 drivers: gpio: ht16k33: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:31:28 -05:00
Kumar Gala
27bb8b9513 drivers: led: ht16k33: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:31:28 -05:00
Kumar Gala
227d5b1395 drivers: interrupt_controller: ioapic: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:29:23 -05:00
Kumar Gala
4c5f8acf4a drivers: timer: hpet: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:29:23 -05:00
Kumar Gala
16054e6d0f drivers: gpio: intel_apl: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 03:29:23 -05:00
Daniel Leung
4b4593e76b interrupt_controller: cavs: add CPU offset for intel_apl_adsp
This adds the per CPU address offset for intel_apl_adsp, so
the correct base address can be calculated under SMP.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
492e890cd6 ipm: add driver for the CAVS DSP Intra-DSP Communication (IDC)
This adds a rather primitive driver for use with the Intra-DSP
Communication (IDC) on the DSP on certain Intel SoCs. The IDC
generates interrupts from one core to another by writing to
certain registers. This is also being utilized as
the scheduler IPI since it can interrupt other cores.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
6d49e7c692 timer: add CAVS DSP wall clock timer for Intel SoC
The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).

This uses the RISCV timer as base as it is using 64-bit
counter.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
e6d468ac22 interrupt_controller: cavs: add support in ISR for SMP
The CAVS interrupt controller has different base addresses for
each CPU. When running under SMP, the driver needs to look at
the correct address for the CPU the ISR is running so interrupts
can be dispatched correctly. This adds a function to calculate
the correct base address. Note that each supported SoC may have
different offsets so per SoC config will need to added. Support
for intel_s1000 is added as an example.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
b4a7eed82e interrupt_controller/dw_ictl: need to be initialized earlier
The dw_ictl interrupt controller is an interrupt aggregator
supporting multi-level interrupts. Therefore, it needs to be
initialized earlier than any downstream interrupt controllers
and devices.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Daniel Leung
518f329b3a interrupt_controller/cavs_ictl: need to be initialized earlier
The cavs_ictl interrupt controller is an interrupt aggregator
supporting multi-level interrupts. Therefore, it needs to be
initialized earlier than any downstream interrupt controllers
and devices.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-03-25 19:07:28 -04:00
Vincent Wan
c806947d87 drivers: i2c: cc13xx_cc26xx: reset pin type when entering low power mode
It was observed that leaving the pin type configured for i2c for SDA
and SCL results in higher power consumption during standby. So we are
resetting the pin type when bringing the i2c into low power mode, and
setting it back to the correct type when exiting low power mode.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Vincent Wan
f23940c678 drivers: i2c: cc13xx_cc26xx: add power management support
Add a dependency on the I2C resource in the TI Power module,
reconfigure the peripheral upon CPU exiting standby, and add
support for device PM.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Vincent Wan
ddfb1b5ec7 drivers: spi: cc13xx_cc26xx: add power management support
Add a dependency on the SSI resource in the TI Power module, and add
support for device PM.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Vincent Wan
e21bb3a812 drivers: serial: cc13xx_cc26xx: add power management support
Add a dependency on the UART resource in the TI Power module,
reconfigure the UART upon CPU exiting standby, and add support
for device PM.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Vincent Wan
d2cf6c4a74 drivers: gpio: cc13xx_cc26xx: add power management support
Adding a dependency on the GPIO resource in the TI Power module, and
configuring the edge detection on pads as a wakeup source.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2020-03-25 16:21:33 -04:00
Christian Hirsch
6380c24626 drivers: sensor: BME280: add forced sampling mode
add the forced sampling mode, to take just a single
measurement when fatching a sample

Signed-off-by: Christian Hirsch <christian.hirsch@tuwien.ac.at>
2020-03-25 14:52:07 -05:00
Flavio Ceolin
81d96d6e9b drivers: counter: Fix get_value verification handler
z_vrfy_counter_get_value should check the size of memory pointed to
ticks and not the size of the pointer.

Fixes: #22431
Coverity CID :207984

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-03-25 16:25:45 +01:00
Kumar Gala
9ede3c9a97 drivers: serial: uart_pl011: remove shared irq support
The shared irq support isn't needed in this driver.  We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts.  We can just ifdef that based on
DT_NUM_IRQS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-25 08:34:40 -05:00
Jukka Rissanen
b50dabb9fd drivers: eth: enc28j60: Add VLAN support
Add Virtual LAN support to enc28j60 Ethernet driver.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-03-25 15:06:38 +02:00
Ismael Fillonneau
6fd5dd894e drivers: i2c: nrfx: Fix power management assert
Calling device_set_power_state() with DEVICE_PM_SUSPEND_STATE then
DEVICE_PM_OFF_STATE creates an assert in nrf driver

Signed-off-by: Ismael Fillonneau <ismael.fillonneau@stimio.fr>
2020-03-24 14:36:15 -05:00
Alexander Wachter
802552414c drivers: flash: stm32g4: Fix erase on wrong bank
In the default configuration of the stm32g4 is the dual bank mode.
In dual bank mode, the flash is split into two banks with 256k each.
The erase pages have a range form 0 to 127, where each page has 2k.
If one wants to erase an area above 256k, the driver has to switch
to bank 2 befor erasing. Otherwise it will erase the page moulo 127.

Signed-off-by: Alexander Wachter <alexander.wacher@leica-geosystems.com>
2020-03-24 14:25:47 -05:00
Alexander Wachter
7b9320beed drivers: flash: stm32: Introduce logs in the flash code
This commit introduces some logs in the stm32 flash implementation.
Thith the logs it is easier to locate problems when they arrise.

Signed-off-by: Alexander Wachter <alexander.wacher@leica-geosystems.com>
2020-03-24 14:25:47 -05:00
Peter A. Bigot
93309317d0 uart: sifive: fix interrupt-driven transmission
A txcnt of zero prevents transmission, as transmit requires the number
of entries in the transmit fifo to be strictly less than the txcnt
value.  Set the default to 1.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-03-24 13:28:58 -04:00
Piotr Mienkowski
8a9df52943 drivers: gpio_gecko: convert to DT_INST defines
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-03-24 10:14:21 -05:00
Kumar Gala
8d2f22f9ea drivers: sensor: fxos8700: convert to new DT API
Use the new devicetree.h API instead of the legacy macros.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-24 10:11:20 -05:00
Kumar Gala
8f84520130 drivers: serial: uart_sifive: convert to new DT API
Use the new devicetree.h API instead of the legacy macros.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-24 10:11:20 -05:00
Martí Bolívar
ffcf7cad6a drivers: spi: convert spi_nrfx_spim.c to new DT API
This allows us to start using DT_NODELABEL() to access SPIMs that way,
instead of via an alias.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-24 10:11:20 -05:00
Martí Bolívar
f50b0689b5 drivers: serial: convert uart_nrfx_uart to new DT API
Use the new devicetree.h API instead of the legacy macros.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-03-24 10:11:20 -05:00
Jose Alberto Meza
04e190ab87 drivers: peci: xec: Re-add error recovery handling
Using temp variable to avoid coverity issue without breakin
error recovery.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-03-23 17:16:46 -07:00
Flavio Ceolin
f0a4cb059d drivers: uart: Add uart_configure verification handler
uart_configure verification handler was missing what would cause a crash
if called from a user thread.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-03-23 15:23:50 -04:00
Flavio Ceolin
017c142fd2 drivers: uart: Add config_get verification handler
uart_config_get API was broken in USERSPACE because was lacking the
verification handler.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-03-23 15:23:50 -04:00
Anas Nashif
24f77ca167 drivers: peci: remove self-assignment
Assigning "base->ERROR" to itself has no effect.

Fixes #23586

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-03-23 14:10:58 -04:00
Pooja Karanjekar
558b904d80 drivers: entropy: gecko: Implement ISR specific get entropy call
Add the get_entropy_isr API function for the gecko entropy
driver. When the function is invoked without the ENTROPY_BUSYWAIT
flag, it returns whatever data is available in a non-blocking manner.

Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
2020-03-23 18:42:46 +01:00
Armand Ciejak
6c1afb0779 drivers: eth: mcux: Write correct data into PHY_CONTROL2_REG register
Starting a SMI write operation without waiting for completion of the
preceding SMI read operation cause the write operation to fail if
the time between the 2 operations it too short. This leads to the
PHY being in an unusable state on the MIMRT1060-EVK eval board.

In addition the value of the register was not used, as consequence
some bits were not preserved.

The solution is to do a read/modify/write to set only the
ref clock bit, which sets the PHY into 50MHz clock mode,
and keep the value of the other bits.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-03-23 09:05:17 -05:00
Armand Ciejak
c168f45e60 drivers: eth: mcux: Prevent PHY entering factory test mode
Force PHY normal operation in eth_mcux_phy_setup in case strap-in
pins configure the PHY in factory test mode.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-03-23 09:01:15 -05:00