drivers: mcux: Convert MCUX drivers to new DT_INST macros
Convert older DT_INST_ macro use in MCUX drivers to the new include/devicetree.h DT_INST macro APIs. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
parent
aa5adf3c79
commit
4b9fe8a24e
18 changed files with 277 additions and 241 deletions
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@ -7,6 +7,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_kinetis_adc12
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#include <drivers/adc.h>
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#include <fsl_adc12.h>
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@ -252,26 +254,26 @@ static const struct adc_driver_api mcux_adc12_driver_api = {
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#define TO_ADC12_CLOCK_SRC(val) _DO_CONCAT(kADC12_ClockSourceAlt, val)
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#define TO_ADC12_CLOCK_DIV(val) _DO_CONCAT(kADC12_ClockDivider, val)
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#if DT_INST_0_NXP_KINETIS_ADC12
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#if DT_HAS_DRV_INST(0)
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static void mcux_adc12_config_func_0(struct device *dev);
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ASSERT_WITHIN_RANGE(DT_INST_0_NXP_KINETIS_ADC12_CLK_SOURCE, 0, 3,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(0, clk_source), 0, 3,
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"Invalid clock source");
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_0_NXP_KINETIS_ADC12_CLK_DIVIDER,
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_PROP(0, clk_divider),
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"Invalid clock divider");
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ASSERT_WITHIN_RANGE(DT_INST_0_NXP_KINETIS_ADC12_SAMPLE_TIME, 2, 256,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(0, sample_time), 2, 256,
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"Invalid sample time");
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static const struct mcux_adc12_config mcux_adc12_config_0 = {
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.base = (ADC_Type *)DT_INST_0_NXP_KINETIS_ADC12_BASE_ADDRESS,
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_0_NXP_KINETIS_ADC12_CLK_SOURCE),
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.base = (ADC_Type *)DT_INST_REG_ADDR(0),
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_PROP(0, clk_source)),
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.clock_div =
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TO_ADC12_CLOCK_DIV(DT_INST_0_NXP_KINETIS_ADC12_CLK_DIVIDER),
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#if DT_INST_0_NXP_KINETIS_ADC12_ALTERNATE_VOLTAGE_REFERENCE == 1
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TO_ADC12_CLOCK_DIV(DT_INST_PROP(0, clk_divider)),
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#if DT_INST_PROP(0, alternate_voltage_reference) == 1
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.ref_src = kADC12_ReferenceVoltageSourceValt,
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#else
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.ref_src = kADC12_ReferenceVoltageSourceVref,
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#endif
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.sample_clk_count = DT_INST_0_NXP_KINETIS_ADC12_SAMPLE_TIME,
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.sample_clk_count = DT_INST_PROP(0, sample_time),
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.irq_config_func = mcux_adc12_config_func_0,
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};
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@ -281,41 +283,41 @@ static struct mcux_adc12_data mcux_adc12_data_0 = {
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ADC_CONTEXT_INIT_SYNC(mcux_adc12_data_0, ctx),
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};
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DEVICE_AND_API_INIT(mcux_adc12_0, DT_INST_0_NXP_KINETIS_ADC12_LABEL,
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DEVICE_AND_API_INIT(mcux_adc12_0, DT_INST_LABEL(0),
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&mcux_adc12_init, &mcux_adc12_data_0, &mcux_adc12_config_0,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_adc12_driver_api);
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static void mcux_adc12_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_ADC12_IRQ_0,
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DT_INST_0_NXP_KINETIS_ADC12_IRQ_0_PRIORITY, mcux_adc12_isr,
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority), mcux_adc12_isr,
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DEVICE_GET(mcux_adc12_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_ADC12_IRQ_0);
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irq_enable(DT_INST_IRQN(0));
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}
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#endif /* DT_INST_0_NXP_KINETIS_ADC12 */
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#endif /* DT_HAS_DRV_INST(0) */
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#if DT_INST_1_NXP_KINETIS_ADC12
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#if DT_HAS_DRV_INST(1)
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static void mcux_adc12_config_func_1(struct device *dev);
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ASSERT_WITHIN_RANGE(DT_INST_1_NXP_KINETIS_ADC12_CLK_SOURCE, 0, 3,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(1, clk_source), 0, 3,
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"Invalid clock source");
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_1_NXP_KINETIS_ADC12_CLK_DIVIDER,
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_PROP(1, clk_divider),
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"Invalid clock divider");
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ASSERT_WITHIN_RANGE(DT_INST_1_NXP_KINETIS_ADC12_SAMPLE_TIME, 2, 256,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(1, sample_time), 2, 256,
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"Invalid sample time");
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static const struct mcux_adc12_config mcux_adc12_config_1 = {
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.base = (ADC_Type *)DT_INST_1_NXP_KINETIS_ADC12_BASE_ADDRESS,
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_1_NXP_KINETIS_ADC12_CLK_SOURCE),
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.base = (ADC_Type *)DT_INST_REG_ADDR(1),
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_PROP(1, clk_source)),
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.clock_div =
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TO_ADC12_CLOCK_DIV(DT_INST_1_NXP_KINETIS_ADC12_CLK_DIVIDER),
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#if DT_INST_1_NXP_KINETIS_ADC12_ALTERNATE_VOLTAGE_REFERENCE == 1
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TO_ADC12_CLOCK_DIV(DT_INST_PROP(1, clk_divider)),
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#if DT_INST_PROP(1, alternate_voltage_reference) == 1
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.ref_src = kADC12_ReferenceVoltageSourceValt,
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#else
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.ref_src = kADC12_ReferenceVoltageSourceVref,
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#endif
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.sample_clk_count = DT_INST_1_NXP_KINETIS_ADC12_SAMPLE_TIME,
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.sample_clk_count = DT_INST_PROP(1, sample_time),
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.irq_config_func = mcux_adc12_config_func_1,
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};
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@ -325,41 +327,41 @@ static struct mcux_adc12_data mcux_adc12_data_1 = {
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ADC_CONTEXT_INIT_SYNC(mcux_adc12_data_1, ctx),
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};
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DEVICE_AND_API_INIT(mcux_adc12_1, DT_INST_1_NXP_KINETIS_ADC12_LABEL,
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DEVICE_AND_API_INIT(mcux_adc12_1, DT_INST_LABEL(1),
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&mcux_adc12_init, &mcux_adc12_data_1, &mcux_adc12_config_1,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_adc12_driver_api);
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static void mcux_adc12_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(DT_INST_1_NXP_KINETIS_ADC12_IRQ_0,
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DT_INST_1_NXP_KINETIS_ADC12_IRQ_0_PRIORITY, mcux_adc12_isr,
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IRQ_CONNECT(DT_INST_IRQN(1),
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DT_INST_IRQ(1, priority), mcux_adc12_isr,
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DEVICE_GET(mcux_adc12_1), 0);
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irq_enable(DT_INST_1_NXP_KINETIS_ADC12_IRQ_0);
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irq_enable(DT_INST_IRQN(1));
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}
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#endif /* DT_INST_1_NXP_KINETIS_ADC12 */
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#endif /* DT_HAS_DRV_INST(1) */
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#if DT_INST_2_NXP_KINETIS_ADC12
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#if DT_HAS_DRV_INST(2)
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static void mcux_adc12_config_func_2(struct device *dev);
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ASSERT_WITHIN_RANGE(DT_INST_2_NXP_KINETIS_ADC12_CLK_SOURCE, 0, 3,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(2, clk_source), 0, 3,
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"Invalid clock source");
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_2_NXP_KINETIS_ADC12_CLK_DIVIDER,
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ASSERT_ADC12_CLK_DIV_VALID(DT_INST_PROP(2, clk_divider),
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"Invalid clock divider");
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ASSERT_WITHIN_RANGE(DT_INST_2_NXP_KINETIS_ADC12_SAMPLE_TIME, 2, 256,
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ASSERT_WITHIN_RANGE(DT_INST_PROP(2, sample_time), 2, 256,
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"Invalid sample time");
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static const struct mcux_adc12_config mcux_adc12_config_2 = {
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.base = (ADC_Type *)DT_INST_2_NXP_KINETIS_ADC12_BASE_ADDRESS,
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_2_NXP_KINETIS_ADC12_CLK_SOURCE),
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.base = (ADC_Type *)DT_INST_REG_ADDR(2),
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.clock_src = TO_ADC12_CLOCK_SRC(DT_INST_PROP(2, clk_source)),
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.clock_div =
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TO_ADC12_CLOCK_DIV(DT_INST_2_NXP_KINETIS_ADC12_CLK_DIVIDER),
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#if DT_INST_2_NXP_KINETIS_ADC12_ALTERNATE_VOLTAGE_REFERENCE == 1
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TO_ADC12_CLOCK_DIV(DT_INST_PROP(2, clk_divider)),
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#if DT_INST_PROP(2, alternate_voltage_reference) == 1
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.ref_src = kADC12_ReferenceVoltageSourceValt,
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#else
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.ref_src = kADC12_ReferenceVoltageSourceVref,
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#endif
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.sample_clk_count = DT_INST_2_NXP_KINETIS_ADC12_SAMPLE_TIME,
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.sample_clk_count = DT_INST_PROP(2, sample_time),
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.irq_config_func = mcux_adc12_config_func_2,
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};
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@ -369,17 +371,17 @@ static struct mcux_adc12_data mcux_adc12_data_2 = {
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ADC_CONTEXT_INIT_SYNC(mcux_adc12_data_2, ctx),
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};
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DEVICE_AND_API_INIT(mcux_adc12_2, DT_INST_2_NXP_KINETIS_ADC12_LABEL,
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DEVICE_AND_API_INIT(mcux_adc12_2, DT_INST_LABEL(2),
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&mcux_adc12_init, &mcux_adc12_data_2, &mcux_adc12_config_2,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&mcux_adc12_driver_api);
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static void mcux_adc12_config_func_2(struct device *dev)
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{
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IRQ_CONNECT(DT_INST_2_NXP_KINETIS_ADC12_IRQ_0,
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DT_INST_2_NXP_KINETIS_ADC12_IRQ_0_PRIORITY, mcux_adc12_isr,
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IRQ_CONNECT(DT_INST_IRQN(2),
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DT_INST_IRQ(2, priority), mcux_adc12_isr,
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DEVICE_GET(mcux_adc12_2), 0);
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irq_enable(DT_INST_2_NXP_KINETIS_ADC12_IRQ_0);
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irq_enable(DT_INST_IRQN(2));
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}
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#endif /* DT_INST_2_NXP_KINETIS_ADC12 */
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#endif /* DT_HAS_DRV_INST(2) */
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_kinetis_flexcan
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#include <zephyr.h>
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#include <sys/atomic.h>
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#include <drivers/can.h>
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@ -658,67 +660,67 @@ static const struct can_driver_api mcux_flexcan_driver_api = {
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static void mcux_flexcan_config_func_0(struct device *dev);
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static const struct mcux_flexcan_config mcux_flexcan_config_0 = {
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.base = (CAN_Type *) DT_INST_0_NXP_KINETIS_FLEXCAN_BASE_ADDRESS,
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.clock_name = DT_INST_0_NXP_KINETIS_FLEXCAN_CLOCK_CONTROLLER,
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.base = (CAN_Type *) DT_INST_REG_ADDR(0),
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.clock_name = DT_INST_CLOCKS_LABEL(0),
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.clock_subsys = (clock_control_subsys_t)
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DT_INST_0_NXP_KINETIS_FLEXCAN_CLOCK_NAME,
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.clk_source = DT_INST_0_NXP_KINETIS_FLEXCAN_CLK_SOURCE,
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.bitrate = DT_INST_0_NXP_KINETIS_FLEXCAN_BUS_SPEED,
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.sjw = DT_INST_0_NXP_KINETIS_FLEXCAN_SJW,
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.prop_seg = DT_INST_0_NXP_KINETIS_FLEXCAN_PROP_SEG,
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.phase_seg1 = DT_INST_0_NXP_KINETIS_FLEXCAN_PHASE_SEG1,
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.phase_seg2 = DT_INST_0_NXP_KINETIS_FLEXCAN_PHASE_SEG2,
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DT_INST_CLOCKS_CELL(0, name),
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.clk_source = DT_INST_PROP(0, clk_source),
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.bitrate = DT_INST_PROP(0, bus_speed),
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.sjw = DT_INST_PROP(0, sjw),
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.prop_seg = DT_INST_PROP(0, prop_seg),
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.phase_seg1 = DT_INST_PROP(0, phase_seg1),
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.phase_seg2 = DT_INST_PROP(0, phase_seg2),
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.irq_config_func = mcux_flexcan_config_func_0,
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};
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static struct mcux_flexcan_data mcux_flexcan_data_0 = {
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};
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DEVICE_AND_API_INIT(can_mcux_flexcan_0, DT_INST_0_NXP_KINETIS_FLEXCAN_LABEL,
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DEVICE_AND_API_INIT(can_mcux_flexcan_0, DT_INST_LABEL(0),
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&mcux_flexcan_init, &mcux_flexcan_data_0,
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&mcux_flexcan_config_0, POST_KERNEL,
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CONFIG_CAN_INIT_PRIORITY, &mcux_flexcan_driver_api);
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static void mcux_flexcan_config_func_0(struct device *dev)
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{
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#ifdef DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_RX_WARNING
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_RX_WARNING,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_RX_WARNING_PRIORITY,
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#if DT_INST_IRQ_HAS_NAME(0, rx_warning)
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, rx_warning, irq),
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DT_INST_IRQ_BY_NAME(0, rx_warning, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_RX_WARNING);
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irq_enable(DT_INST_IRQ_BY_NAME(0, rx_warning, irq));
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#endif
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#ifdef DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_TX_WARNING
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_TX_WARNING,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_TX_WARNING_PRIORITY,
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#if DT_INST_IRQ_HAS_NAME(0, tx_warning)
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, tx_warning, irq),
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DT_INST_IRQ_BY_NAME(0, tx_warning, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_TX_WARNING);
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irq_enable(DT_INST_IRQ_BY_NAME(0, tx_warning, irq));
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#endif
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#ifdef DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_BUS_OFF
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_BUS_OFF,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_BUS_OFF_PRIORITY,
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#if DT_INST_IRQ_HAS_NAME(0, bus_off)
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, bus_off, irq),
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DT_INST_IRQ_BY_NAME(0, bus_off, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_BUS_OFF);
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irq_enable(DT_INST_IRQ_BY_NAME(0, bus_off, irq));
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#endif
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#ifdef DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WARNING
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WARNING,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WARNING_PRIORITY,
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#if DT_INST_IRQ_HAS_NAME(0, warning)
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, warning, irq),
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DT_INST_IRQ_BY_NAME(0, warning, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WARNING);
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irq_enable(DT_INST_IRQ_BY_NAME(0, warning, irq));
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#endif
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_ERROR,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_ERROR_PRIORITY,
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, error, irq),
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DT_INST_IRQ_BY_NAME(0, error, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_ERROR);
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irq_enable(DT_INST_IRQ_BY_NAME(0, error, irq));
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP_PRIORITY,
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, wake_up, irq),
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DT_INST_IRQ_BY_NAME(0, wake_up, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP);
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irq_enable(DT_INST_IRQ_BY_NAME(0, wake_up, irq));
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IRQ_CONNECT(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15,
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DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15_PRIORITY,
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(0, mb_0_15, irq),
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DT_INST_IRQ_BY_NAME(0, mb_0_15, priority),
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mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_0), 0);
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irq_enable(DT_INST_0_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15);
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irq_enable(DT_INST_IRQ_BY_NAME(0, mb_0_15, irq));
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}
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#if defined(CONFIG_NET_SOCKETS_CAN)
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@ -760,48 +762,48 @@ NET_DEVICE_INIT(socket_can_flexcan_0, SOCKET_CAN_NAME_1, socket_can_init_0,
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static void mcux_flexcan_config_func_1(struct device *dev);
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static const struct mcux_flexcan_config mcux_flexcan_config_1 = {
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.base = (CAN_Type *) DT_INST_1_NXP_KINETIS_FLEXCAN_BASE_ADDRESS,
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.clock_name = DT_INST_1_NXP_KINETIS_FLEXCAN_CLOCK_CONTROLLER,
|
||||
.base = (CAN_Type *) DT_INST_REG_ADDR(1),
|
||||
.clock_name = DT_INST_CLOCKS_LABEL(1),
|
||||
.clock_subsys = (clock_control_subsys_t)
|
||||
DT_INST_1_NXP_KINETIS_FLEXCAN_CLOCK_NAME,
|
||||
.clk_source = DT_INST_1_NXP_KINETIS_FLEXCAN_CLK_SOURCE,
|
||||
.bitrate = DT_INST_1_NXP_KINETIS_FLEXCAN_BUS_SPEED,
|
||||
.sjw = DT_INST_1_NXP_KINETIS_FLEXCAN_SJW,
|
||||
.prop_seg = DT_INST_1_NXP_KINETIS_FLEXCAN_PROP_SEG,
|
||||
.phase_seg1 = DT_INST_1_NXP_KINETIS_FLEXCAN_PHASE_SEG1,
|
||||
.phase_seg2 = DT_INST_1_NXP_KINETIS_FLEXCAN_PHASE_SEG2,
|
||||
DT_INST_CLOCKS_CELL(1, name),
|
||||
.clk_source = DT_INST_PROP(1, clk_source),
|
||||
.bitrate = DT_INST_PROP(1, bus_speed),
|
||||
.sjw = DT_INST_PROP(1, sjw),
|
||||
.prop_seg = DT_INST_PROP(1, prop_seg),
|
||||
.phase_seg1 = DT_INST_PROP(1, phase_seg1),
|
||||
.phase_seg2 = DT_INST_PROP(1, phase_seg2),
|
||||
.irq_config_func = mcux_flexcan_config_func_1,
|
||||
};
|
||||
|
||||
static struct mcux_flexcan_data mcux_flexcan_data_1 = {
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(can_mcux_flexcan_1, DT_INST_1_NXP_KINETIS_FLEXCAN_LABEL,
|
||||
DEVICE_AND_API_INIT(can_mcux_flexcan_1, DT_INST_LABEL(1),
|
||||
&mcux_flexcan_init, &mcux_flexcan_data_1,
|
||||
&mcux_flexcan_config_1, POST_KERNEL,
|
||||
CONFIG_CAN_INIT_PRIORITY, &mcux_flexcan_driver_api);
|
||||
|
||||
static void mcux_flexcan_config_func_1(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WARNING,
|
||||
DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WARNING_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, warning, irq),
|
||||
DT_INST_IRQ_BY_NAME(1, warning, priority),
|
||||
mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_1), 0);
|
||||
irq_enable(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WARNING);
|
||||
irq_enable(DT_INST_IRQ_BY_NAME(1, warning, irq));
|
||||
|
||||
IRQ_CONNECT(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_ERROR,
|
||||
DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_ERROR_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, error, irq),
|
||||
DT_INST_IRQ_BY_NAME(1, error, priority),
|
||||
mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_1), 0);
|
||||
irq_enable(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_ERROR);
|
||||
irq_enable(DT_INST_IRQ_BY_NAME(1, error, irq));
|
||||
|
||||
IRQ_CONNECT(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP,
|
||||
DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, wake_up, irq),
|
||||
DT_INST_IRQ_BY_NAME(1, wake_up, priority),
|
||||
mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_1), 0);
|
||||
irq_enable(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_WAKE_UP);
|
||||
irq_enable(DT_INST_IRQ_BY_NAME(1, wake_up, irq));
|
||||
|
||||
IRQ_CONNECT(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15,
|
||||
DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_NAME(1, mb_0_15, irq),
|
||||
DT_INST_IRQ_BY_NAME(1, mb_0_15, priority),
|
||||
mcux_flexcan_isr, DEVICE_GET(can_mcux_flexcan_1), 0);
|
||||
irq_enable(DT_INST_1_NXP_KINETIS_FLEXCAN_IRQ_MB_0_15);
|
||||
irq_enable(DT_INST_IRQ_BY_NAME(1, mb_0_15, irq));
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CAN_1 */
|
||||
|
|
|
@ -3,6 +3,8 @@
|
|||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_imx_ccm
|
||||
#include <errno.h>
|
||||
#include <soc.h>
|
||||
#include <drivers/clock_control.h>
|
||||
|
@ -103,7 +105,7 @@ static const struct clock_control_driver_api mcux_ccm_driver_api = {
|
|||
.get_rate = mcux_ccm_get_subsys_rate,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_ccm, DT_INST_0_NXP_IMX_CCM_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_ccm, DT_INST_LABEL(0),
|
||||
&mcux_ccm_init,
|
||||
NULL, NULL,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
|
|
@ -7,6 +7,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_mcg
|
||||
|
||||
#include <drivers/clock_control.h>
|
||||
#include <dt-bindings/clock/kinetis_mcg.h>
|
||||
#include <soc.h>
|
||||
|
@ -57,7 +59,7 @@ static const struct clock_control_driver_api mcux_mcg_driver_api = {
|
|||
.get_rate = mcux_mcg_get_rate,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_mcg, DT_INST_0_NXP_KINETIS_MCG_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_mcg, DT_INST_LABEL(0),
|
||||
&mcux_mcg_init,
|
||||
NULL, NULL,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
|
|
@ -7,6 +7,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_pcc
|
||||
|
||||
#include <errno.h>
|
||||
#include <soc.h>
|
||||
#include <drivers/clock_control.h>
|
||||
|
@ -65,12 +67,12 @@ static const struct clock_control_driver_api mcux_pcc_api = {
|
|||
.get_rate = mcux_pcc_get_rate,
|
||||
};
|
||||
|
||||
#if defined(DT_INST_0_NXP_KINETIS_PCC_LABEL)
|
||||
#if DT_HAS_DRV_INST(0)
|
||||
static const struct mcux_pcc_config mcux_pcc0_config = {
|
||||
.base_address = DT_INST_0_NXP_KINETIS_PCC_BASE_ADDRESS
|
||||
.base_address = DT_INST_REG_ADDR(0)
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_pcc0, DT_INST_0_NXP_KINETIS_PCC_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_pcc0, DT_INST_LABEL(0),
|
||||
&mcux_pcc_init,
|
||||
NULL, &mcux_pcc0_config,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_OBJECTS,
|
||||
|
|
|
@ -7,6 +7,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_scg
|
||||
|
||||
#include <drivers/clock_control.h>
|
||||
#include <dt-bindings/clock/kinetis_scg.h>
|
||||
#include <soc.h>
|
||||
|
@ -92,8 +94,8 @@ static int mcux_scg_get_rate(struct device *dev,
|
|||
|
||||
static int mcux_scg_init(struct device *dev)
|
||||
{
|
||||
#ifdef DT_INST_0_NXP_KINETIS_SCG_CLKOUT_SOURCE
|
||||
CLOCK_SetClkOutSel(DT_INST_0_NXP_KINETIS_SCG_CLKOUT_SOURCE);
|
||||
#if DT_INST_NODE_HAS_PROP(0, clkout_source)
|
||||
CLOCK_SetClkOutSel(DT_INST_PROP(0, clkout_source));
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
@ -105,7 +107,7 @@ static const struct clock_control_driver_api mcux_scg_driver_api = {
|
|||
.get_rate = mcux_scg_get_rate,
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_scg, DT_INST_0_NXP_KINETIS_SCG_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_scg, DT_INST_LABEL(0),
|
||||
&mcux_scg_init,
|
||||
NULL, NULL,
|
||||
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
|
|
@ -3,6 +3,8 @@
|
|||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_sim
|
||||
#include <errno.h>
|
||||
#include <soc.h>
|
||||
#include <drivers/clock_control.h>
|
||||
|
@ -43,25 +45,25 @@ static int mcux_sim_get_subsys_rate(struct device *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef DT_INST_0_NXP_KINETIS_KE1XF_SIM
|
||||
#define NXP_KINETIS_SIM_LABEL DT_INST_0_NXP_KINETIS_KE1XF_SIM_LABEL
|
||||
#ifdef DT_INST_0_NXP_KINETIS_KE1XF_SIM_CLKOUT_SOURCE
|
||||
#if DT_HAS_NODE(DT_INST(0, nxp_kinetis_ke1xf_sim))
|
||||
#define NXP_KINETIS_SIM_LABEL DT_LABEL(DT_INST(0, nxp_kinetis_ke1xf_sim))
|
||||
#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
|
||||
#define NXP_KINETIS_SIM_CLKOUT_SOURCE \
|
||||
DT_INST_0_NXP_KINETIS_KE1XF_SIM_CLKOUT_SOURCE
|
||||
DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_source)
|
||||
#endif
|
||||
#ifdef DT_INST_0_NXP_KINETIS_KE1XF_SIM_CLKOUT_DIVIDER
|
||||
#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
|
||||
#define NXP_KINETIS_SIM_CLKOUT_DIVIDER \
|
||||
DT_INST_0_NXP_KINETIS_KE1XF_SIM_CLKOUT_DIVIDER
|
||||
DT_PROP(DT_INST(0, nxp_kinetis_ke1xf_sim), clkout_divider)
|
||||
#endif
|
||||
#else
|
||||
#define NXP_KINETIS_SIM_LABEL DT_INST_0_NXP_KINETIS_SIM_LABEL
|
||||
#ifdef DT_INST_0_NXP_KINETIS_SIM_CLKOUT_SOURCE
|
||||
#define NXP_KINETIS_SIM_LABEL DT_LABEL(DT_INST(0, nxp_kinetis_sim))
|
||||
#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_sim), clkout_source)
|
||||
#define NXP_KINETIS_SIM_CLKOUT_SOURCE \
|
||||
DT_INST_0_NXP_KINETIS_SIM_CLKOUT_SOURCE
|
||||
DT_PROP(DT_INST(0, nxp_kinetis_sim), clkout_source)
|
||||
#endif
|
||||
#ifdef DT_INST_0_NXP_KINETIS_SIM_CLKOUT_DIVIDER
|
||||
#if DT_NODE_HAS_PROP(DT_INST(0, nxp_kinetis_sim), clkout_divider)
|
||||
#define NXP_KINETIS_SIM_CLKOUT_DIVIDER \
|
||||
DT_INST_0_NXP_KINETIS_SIM_CLKOUT_DIVIDER
|
||||
DT_PROP(DT_INST(0, nxp_kinetis_sim), clkout_divider)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_imx_gpt
|
||||
|
||||
#include <drivers/counter.h>
|
||||
#include <fsl_gpt.h>
|
||||
#include <logging/log.h>
|
||||
|
@ -203,7 +205,7 @@ static const struct counter_driver_api mcux_gpt_driver_api = {
|
|||
static struct mcux_gpt_data mcux_gpt_data_ ## n; \
|
||||
\
|
||||
static const struct mcux_gpt_config mcux_gpt_config_ ## n = { \
|
||||
.base = (void *)DT_INST_## n ##_NXP_IMX_GPT_BASE_ADDRESS, \
|
||||
.base = (void *)DT_INST_REG_ADDR(n), \
|
||||
.clock_source = kCLOCK_PerClk, \
|
||||
.info = { \
|
||||
.max_top_value = UINT32_MAX, \
|
||||
|
@ -215,7 +217,7 @@ static const struct counter_driver_api mcux_gpt_driver_api = {
|
|||
\
|
||||
static int mcux_gpt_## n ##_init(struct device *dev); \
|
||||
DEVICE_AND_API_INIT(mcux_gpt ## n, \
|
||||
DT_INST_## n ##_NXP_IMX_GPT_LABEL, \
|
||||
DT_INST_LABEL(n), \
|
||||
mcux_gpt_## n ##_init, \
|
||||
&mcux_gpt_data_ ## n, \
|
||||
&mcux_gpt_config_ ## n, \
|
||||
|
@ -224,17 +226,17 @@ static const struct counter_driver_api mcux_gpt_driver_api = {
|
|||
\
|
||||
static int mcux_gpt_## n ##_init(struct device *dev) \
|
||||
{ \
|
||||
IRQ_CONNECT(DT_INST_## n ##_NXP_IMX_GPT_IRQ_0, \
|
||||
DT_INST_## n ##_NXP_IMX_GPT_IRQ_0_PRIORITY, \
|
||||
IRQ_CONNECT(DT_INST_IRQN(n), \
|
||||
DT_INST_IRQ(n, priority), \
|
||||
mcux_gpt_isr, DEVICE_GET(mcux_gpt ## n), 0); \
|
||||
irq_enable(DT_INST_## n ##_NXP_IMX_GPT_IRQ_0); \
|
||||
irq_enable(DT_INST_IRQN(n)); \
|
||||
return mcux_gpt_init(dev); \
|
||||
} \
|
||||
|
||||
#ifdef DT_INST_0_NXP_IMX_GPT
|
||||
#if DT_HAS_DRV_INST(0)
|
||||
GPT_DEVICE_INIT_MCUX(0)
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_1_NXP_IMX_GPT
|
||||
#if DT_HAS_DRV_INST(1)
|
||||
GPT_DEVICE_INIT_MCUX(1)
|
||||
#endif
|
||||
|
|
|
@ -5,6 +5,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_rtc
|
||||
|
||||
#include <drivers/counter.h>
|
||||
#include <fsl_rtc.h>
|
||||
#include <logging/log.h>
|
||||
|
@ -265,26 +267,26 @@ static struct mcux_rtc_data mcux_rtc_data_0;
|
|||
static void mcux_rtc_irq_config_0(struct device *dev);
|
||||
|
||||
static struct mcux_rtc_config mcux_rtc_config_0 = {
|
||||
.base = (RTC_Type *)DT_INST_0_NXP_KINETIS_RTC_BASE_ADDRESS,
|
||||
.base = (RTC_Type *)DT_INST_REG_ADDR(0),
|
||||
.irq_config_func = mcux_rtc_irq_config_0,
|
||||
.info = {
|
||||
.max_top_value = UINT32_MAX,
|
||||
.freq = DT_INST_0_NXP_KINETIS_RTC_CLOCK_FREQUENCY /
|
||||
DT_INST_0_NXP_KINETIS_RTC_PRESCALER,
|
||||
.freq = DT_INST_PROP(0, clock_frequency) /
|
||||
DT_INST_PROP(0, prescaler),
|
||||
.flags = COUNTER_CONFIG_INFO_COUNT_UP,
|
||||
.channels = 1,
|
||||
},
|
||||
};
|
||||
|
||||
DEVICE_AND_API_INIT(rtc, DT_INST_0_NXP_KINETIS_RTC_LABEL, &mcux_rtc_init,
|
||||
DEVICE_AND_API_INIT(rtc, DT_INST_LABEL(0), &mcux_rtc_init,
|
||||
&mcux_rtc_data_0, &mcux_rtc_config_0.info,
|
||||
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
&mcux_rtc_driver_api);
|
||||
|
||||
static void mcux_rtc_irq_config_0(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(DT_INST_0_NXP_KINETIS_RTC_IRQ_0,
|
||||
DT_INST_0_NXP_KINETIS_RTC_IRQ_0_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQN(0),
|
||||
DT_INST_IRQ(0, priority),
|
||||
mcux_rtc_isr, DEVICE_GET(rtc), 0);
|
||||
irq_enable(DT_INST_0_NXP_KINETIS_RTC_IRQ_0);
|
||||
irq_enable(DT_INST_IRQN(0));
|
||||
}
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT fsl_imx6sx_lcdif
|
||||
|
||||
#include <drivers/display.h>
|
||||
#include <fsl_elcdif.h>
|
||||
|
||||
|
@ -226,7 +228,7 @@ static const struct display_driver_api mcux_elcdif_api = {
|
|||
static void mcux_elcdif_config_func_1(struct device *dev);
|
||||
|
||||
static struct mcux_elcdif_config mcux_elcdif_config_1 = {
|
||||
.base = (LCDIF_Type *) DT_INST_0_FSL_IMX6SX_LCDIF_BASE_ADDRESS,
|
||||
.base = (LCDIF_Type *) DT_INST_REG_ADDR(0),
|
||||
.irq_config_func = mcux_elcdif_config_func_1,
|
||||
#ifdef CONFIG_MCUX_ELCDIF_PANEL_RK043FN02H
|
||||
.rgb_mode = {
|
||||
|
@ -252,7 +254,7 @@ static struct mcux_elcdif_config mcux_elcdif_config_1 = {
|
|||
|
||||
static struct mcux_elcdif_data mcux_elcdif_data_1;
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_elcdif_1, DT_INST_0_FSL_IMX6SX_LCDIF_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_elcdif_1, DT_INST_LABEL(0),
|
||||
&mcux_elcdif_init,
|
||||
&mcux_elcdif_data_1, &mcux_elcdif_config_1,
|
||||
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
@ -260,9 +262,9 @@ DEVICE_AND_API_INIT(mcux_elcdif_1, DT_INST_0_FSL_IMX6SX_LCDIF_LABEL,
|
|||
|
||||
static void mcux_elcdif_config_func_1(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(DT_INST_0_FSL_IMX6SX_LCDIF_IRQ_0,
|
||||
DT_INST_0_FSL_IMX6SX_LCDIF_IRQ_0_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQN(0),
|
||||
DT_INST_IRQ(0, priority),
|
||||
mcux_elcdif_isr, DEVICE_GET(mcux_elcdif_1), 0);
|
||||
|
||||
irq_enable(DT_INST_0_FSL_IMX6SX_LCDIF_IRQ_0);
|
||||
irq_enable(DT_INST_IRQN(0));
|
||||
}
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_trng
|
||||
|
||||
#include <device.h>
|
||||
#include <drivers/entropy.h>
|
||||
#include <random/rand32.h>
|
||||
|
@ -34,7 +36,7 @@ static const struct entropy_driver_api entropy_mcux_trng_api_funcs = {
|
|||
};
|
||||
|
||||
static struct mcux_entropy_config entropy_mcux_config = {
|
||||
.base = (TRNG_Type *)DT_INST_0_NXP_KINETIS_TRNG_BASE_ADDRESS
|
||||
.base = (TRNG_Type *)DT_INST_REG_ADDR(0)
|
||||
};
|
||||
|
||||
static int entropy_mcux_trng_init(struct device *);
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT soc_nv_flash
|
||||
|
||||
#include <kernel.h>
|
||||
#include <device.h>
|
||||
#include <string.h>
|
||||
|
@ -117,8 +119,8 @@ static int flash_mcux_write_protection(struct device *dev, bool enable)
|
|||
|
||||
#if defined(CONFIG_FLASH_PAGE_LAYOUT)
|
||||
static const struct flash_pages_layout dev_layout = {
|
||||
.pages_count = KB(CONFIG_FLASH_SIZE) / DT_INST_0_SOC_NV_FLASH_ERASE_BLOCK_SIZE,
|
||||
.pages_size = DT_INST_0_SOC_NV_FLASH_ERASE_BLOCK_SIZE,
|
||||
.pages_count = KB(CONFIG_FLASH_SIZE) / DT_INST_PROP(0, erase_block_size),
|
||||
.pages_size = DT_INST_PROP(0, erase_block_size),
|
||||
};
|
||||
|
||||
static void flash_mcux_pages_layout(struct device *dev,
|
||||
|
|
|
@ -5,6 +5,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_gpio
|
||||
|
||||
#include <errno.h>
|
||||
#include <device.h>
|
||||
#include <drivers/gpio.h>
|
||||
|
@ -280,7 +282,7 @@ static int gpio_mcux_porta_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_config gpio_mcux_porta_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_0_NXP_KINETIS_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(0, ngpios)),
|
||||
},
|
||||
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_A_BASE_ADDRESS,
|
||||
.port_base = PORTA,
|
||||
|
@ -316,7 +318,7 @@ static int gpio_mcux_portb_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_config gpio_mcux_portb_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_1_NXP_KINETIS_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(1, ngpios)),
|
||||
},
|
||||
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_B_BASE_ADDRESS,
|
||||
.port_base = PORTB,
|
||||
|
@ -352,7 +354,7 @@ static int gpio_mcux_portc_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_config gpio_mcux_portc_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_2_NXP_KINETIS_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(2, ngpios)),
|
||||
},
|
||||
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_C_BASE_ADDRESS,
|
||||
.port_base = PORTC,
|
||||
|
@ -388,7 +390,7 @@ static int gpio_mcux_portd_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_config gpio_mcux_portd_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_3_NXP_KINETIS_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(3, ngpios)),
|
||||
},
|
||||
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_D_BASE_ADDRESS,
|
||||
.port_base = PORTD,
|
||||
|
@ -424,7 +426,7 @@ static int gpio_mcux_porte_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_config gpio_mcux_porte_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_4_NXP_KINETIS_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(4, ngpios)),
|
||||
},
|
||||
.gpio_base = (GPIO_Type *) DT_NXP_KINETIS_GPIO_GPIO_E_BASE_ADDRESS,
|
||||
.port_base = PORTE,
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_imx_gpio
|
||||
|
||||
#include <errno.h>
|
||||
#include <device.h>
|
||||
#include <drivers/gpio.h>
|
||||
|
@ -217,7 +219,7 @@ static int mcux_igpio_1_init(struct device *dev);
|
|||
|
||||
static const struct mcux_igpio_config mcux_igpio_1_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_0_NXP_IMX_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(0, ngpios)),
|
||||
},
|
||||
.base = (GPIO_Type *)DT_NXP_IMX_GPIO_GPIO_1_BASE_ADDRESS,
|
||||
};
|
||||
|
@ -255,7 +257,7 @@ static int mcux_igpio_2_init(struct device *dev);
|
|||
|
||||
static const struct mcux_igpio_config mcux_igpio_2_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_1_NXP_IMX_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(1, ngpios)),
|
||||
},
|
||||
.base = (GPIO_Type *)DT_NXP_IMX_GPIO_GPIO_2_BASE_ADDRESS,
|
||||
};
|
||||
|
@ -293,7 +295,7 @@ static int mcux_igpio_3_init(struct device *dev);
|
|||
|
||||
static const struct mcux_igpio_config mcux_igpio_3_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_2_NXP_IMX_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(2, ngpios)),
|
||||
},
|
||||
.base = (GPIO_Type *)DT_NXP_IMX_GPIO_GPIO_3_BASE_ADDRESS,
|
||||
};
|
||||
|
@ -331,7 +333,7 @@ static int mcux_igpio_4_init(struct device *dev);
|
|||
|
||||
static const struct mcux_igpio_config mcux_igpio_4_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_3_NXP_IMX_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(3, ngpios)),
|
||||
},
|
||||
.base = (GPIO_Type *)DT_NXP_IMX_GPIO_GPIO_4_BASE_ADDRESS,
|
||||
};
|
||||
|
@ -369,7 +371,7 @@ static int mcux_igpio_5_init(struct device *dev);
|
|||
|
||||
static const struct mcux_igpio_config mcux_igpio_5_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_4_NXP_IMX_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(4, ngpios)),
|
||||
},
|
||||
.base = (GPIO_Type *)DT_NXP_IMX_GPIO_GPIO_5_BASE_ADDRESS,
|
||||
};
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_lpc_gpio
|
||||
|
||||
/** @file
|
||||
* @brief GPIO driver for LPC54XXX family
|
||||
*
|
||||
|
@ -353,7 +355,7 @@ static int lpc_gpio_0_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port0_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_0_NXP_LPC_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(0, ngpios)),
|
||||
},
|
||||
.gpio_base = GPIO,
|
||||
.pint_base = PINT, /* TODO: SECPINT issue #16330 */
|
||||
|
@ -364,7 +366,7 @@ static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port0_config = {
|
|||
|
||||
static struct gpio_mcux_lpc_data gpio_mcux_lpc_port0_data;
|
||||
|
||||
DEVICE_AND_API_INIT(gpio_mcux_lpc_port0, DT_INST_0_NXP_LPC_GPIO_LABEL,
|
||||
DEVICE_AND_API_INIT(gpio_mcux_lpc_port0, DT_INST_LABEL(0),
|
||||
lpc_gpio_0_init, &gpio_mcux_lpc_port0_data,
|
||||
&gpio_mcux_lpc_port0_config, POST_KERNEL,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
|
||||
|
@ -372,45 +374,45 @@ DEVICE_AND_API_INIT(gpio_mcux_lpc_port0, DT_INST_0_NXP_LPC_GPIO_LABEL,
|
|||
|
||||
static int lpc_gpio_0_init(struct device *dev)
|
||||
{
|
||||
#if defined(DT_INST_0_NXP_LPC_GPIO_IRQ_0) || \
|
||||
defined(DT_INST_0_NXP_LPC_GPIO_IRQ_1) || \
|
||||
defined(DT_INST_0_NXP_LPC_GPIO_IRQ_2) || \
|
||||
defined(DT_INST_0_NXP_LPC_GPIO_IRQ_3)
|
||||
#if DT_INST_IRQ_HAS_IDX(0, 0) || \
|
||||
DT_INST_IRQ_HAS_IDX(0, 1) || \
|
||||
DT_INST_IRQ_HAS_IDX(0, 2) || \
|
||||
DT_INST_IRQ_HAS_IDX(0, 3)
|
||||
struct gpio_mcux_lpc_data *data = dev->driver_data;
|
||||
#endif
|
||||
|
||||
gpio_mcux_lpc_init(dev);
|
||||
|
||||
#ifdef DT_INST_0_NXP_LPC_GPIO_IRQ_0
|
||||
IRQ_CONNECT(DT_INST_0_NXP_LPC_GPIO_IRQ_0,
|
||||
DT_INST_0_NXP_LPC_GPIO_IRQ_0_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(0, 0)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, 0, irq),
|
||||
DT_INST_IRQ_BY_IDX(0, 0, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port0), 0);
|
||||
irq_enable(DT_INST_0_NXP_LPC_GPIO_IRQ_0);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_0_NXP_LPC_GPIO_IRQ_0;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(0, 0, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(0, 0, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_0_NXP_LPC_GPIO_IRQ_1
|
||||
IRQ_CONNECT(DT_INST_0_NXP_LPC_GPIO_IRQ_1,
|
||||
DT_INST_0_NXP_LPC_GPIO_IRQ_1_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(0, 1)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, 1, irq),
|
||||
DT_INST_IRQ_BY_IDX(0, 1, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port0), 0);
|
||||
irq_enable(DT_INST_0_NXP_LPC_GPIO_IRQ_1);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_0_NXP_LPC_GPIO_IRQ_1;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(0, 1, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(0, 1, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_0_NXP_LPC_GPIO_IRQ_2
|
||||
IRQ_CONNECT(DT_INST_0_NXP_LPC_GPIO_IRQ_2,
|
||||
DT_INST_0_NXP_LPC_GPIO_IRQ_2_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(0, 2)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, 2, irq),
|
||||
DT_INST_IRQ_BY_IDX(0, 2, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port0), 0);
|
||||
irq_enable(DT_INST_0_NXP_LPC_GPIO_IRQ_2);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_0_NXP_LPC_GPIO_IRQ_2;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(0, 2, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(0, 2, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_0_NXP_LPC_GPIO_IRQ_3
|
||||
IRQ_CONNECT(DT_INST_0_NXP_LPC_GPIO_IRQ_3,
|
||||
DT_INST_0_NXP_LPC_GPIO_IRQ_3_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(0, 3)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, 3, irq),
|
||||
DT_INST_IRQ_BY_IDX(0, 3, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port0), 0);
|
||||
irq_enable(DT_INST_0_NXP_LPC_GPIO_IRQ_3);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_0_NXP_LPC_GPIO_IRQ_3;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(0, 3, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(0, 3, irq);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
@ -423,7 +425,7 @@ static int lpc_gpio_1_init(struct device *dev);
|
|||
|
||||
static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port1_config = {
|
||||
.common = {
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_1_NXP_LPC_GPIO_NGPIOS),
|
||||
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(1, ngpios)),
|
||||
},
|
||||
.gpio_base = GPIO,
|
||||
.pint_base = PINT,
|
||||
|
@ -434,7 +436,7 @@ static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port1_config = {
|
|||
|
||||
static struct gpio_mcux_lpc_data gpio_mcux_lpc_port1_data;
|
||||
|
||||
DEVICE_AND_API_INIT(gpio_mcux_lpc_port1, DT_INST_1_NXP_LPC_GPIO_LABEL,
|
||||
DEVICE_AND_API_INIT(gpio_mcux_lpc_port1, DT_INST_LABEL(1),
|
||||
lpc_gpio_1_init, &gpio_mcux_lpc_port1_data,
|
||||
&gpio_mcux_lpc_port1_config, POST_KERNEL,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
@ -442,45 +444,45 @@ DEVICE_AND_API_INIT(gpio_mcux_lpc_port1, DT_INST_1_NXP_LPC_GPIO_LABEL,
|
|||
|
||||
static int lpc_gpio_1_init(struct device *dev)
|
||||
{
|
||||
#if defined(DT_INST_1_NXP_LPC_GPIO_IRQ_0) || \
|
||||
defined(DT_INST_1_NXP_LPC_GPIO_IRQ_1) || \
|
||||
defined(DT_INST_1_NXP_LPC_GPIO_IRQ_2) || \
|
||||
defined(DT_INST_1_NXP_LPC_GPIO_IRQ_3)
|
||||
#if DT_INST_IRQ_HAS_IDX(1, 0) || \
|
||||
DT_INST_IRQ_HAS_IDX(1, 1) || \
|
||||
DT_INST_IRQ_HAS_IDX(1, 2) || \
|
||||
DT_INST_IRQ_HAS_IDX(1, 3)
|
||||
struct gpio_mcux_lpc_data *data = dev->driver_data;
|
||||
#endif
|
||||
|
||||
gpio_mcux_lpc_init(dev);
|
||||
|
||||
#ifdef DT_INST_1_NXP_LPC_GPIO_IRQ_0
|
||||
IRQ_CONNECT(DT_INST_1_NXP_LPC_GPIO_IRQ_0,
|
||||
DT_INST_1_NXP_LPC_GPIO_IRQ_0_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(1, 0)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(1, 0, irq),
|
||||
DT_INST_IRQ_BY_IDX(1, 0, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port1), 0);
|
||||
irq_enable(DT_INST_1_NXP_LPC_GPIO_IRQ_0);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_1_NXP_LPC_GPIO_IRQ_0;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(1, 0, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(1, 0, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_1_NXP_LPC_GPIO_IRQ_1
|
||||
IRQ_CONNECT(DT_INST_1_NXP_LPC_GPIO_IRQ_1,
|
||||
DT_INST_1_NXP_LPC_GPIO_IRQ_1_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(1, 1)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(1, 1, irq),
|
||||
DT_INST_IRQ_BY_IDX(1, 1, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port1), 0);
|
||||
irq_enable(DT_INST_1_NXP_LPC_GPIO_IRQ_1);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_1_NXP_LPC_GPIO_IRQ_1;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(1, 1, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(1, 1, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_1_NXP_LPC_GPIO_IRQ_2
|
||||
IRQ_CONNECT(DT_INST_1_NXP_LPC_GPIO_IRQ_2,
|
||||
DT_INST_1_NXP_LPC_GPIO_IRQ_2_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(1, 2)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(1, 2, irq),
|
||||
DT_INST_IRQ_BY_IDX(1, 2, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port1), 0);
|
||||
irq_enable(DT_INST_1_NXP_LPC_GPIO_IRQ_2);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_1_NXP_LPC_GPIO_IRQ_2;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(1, 2, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(1, 2, irq);
|
||||
#endif
|
||||
|
||||
#ifdef DT_INST_1_NXP_LPC_GPIO_IRQ_3
|
||||
IRQ_CONNECT(DT_INST_1_NXP_LPC_GPIO_IRQ_3,
|
||||
DT_INST_1_NXP_LPC_GPIO_IRQ_3_PRIORITY,
|
||||
#if DT_INST_IRQ_HAS_IDX(1, 3)
|
||||
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(1, 3, irq),
|
||||
DT_INST_IRQ_BY_IDX(1, 3, priority),
|
||||
gpio_mcux_lpc_port_isr, DEVICE_GET(gpio_mcux_lpc_port1), 0);
|
||||
irq_enable(DT_INST_1_NXP_LPC_GPIO_IRQ_3);
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_1_NXP_LPC_GPIO_IRQ_3;
|
||||
irq_enable(DT_INST_IRQ_BY_IDX(1, 3, irq));
|
||||
data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(1, 3, irq);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -4,6 +4,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_ftm
|
||||
|
||||
#include <drivers/clock_control.h>
|
||||
#include <errno.h>
|
||||
#include <drivers/pwm.h>
|
||||
|
@ -153,35 +155,35 @@ static const struct pwm_driver_api mcux_ftm_driver_api = {
|
|||
|
||||
#define FTM_DEVICE(n) \
|
||||
static const struct mcux_ftm_config mcux_ftm_config_##n = { \
|
||||
.base = (FTM_Type *)DT_INST_##n##_NXP_KINETIS_FTM_BASE_ADDRESS,\
|
||||
.clock_name = DT_INST_##n##_NXP_KINETIS_FTM_CLOCK_CONTROLLER, \
|
||||
.base = (FTM_Type *)DT_INST_REG_ADDR(n),\
|
||||
.clock_name = DT_INST_CLOCKS_LABEL(n), \
|
||||
.clock_subsys = (clock_control_subsys_t) \
|
||||
DT_INST_##n##_NXP_KINETIS_FTM_CLOCK_NAME, \
|
||||
DT_INST_CLOCKS_CELL(n, name), \
|
||||
.ftm_clock_source = kFTM_FixedClock, \
|
||||
.prescale = kFTM_Prescale_Divide_16, \
|
||||
.channel_count = FSL_FEATURE_FTM_CHANNEL_COUNTn((FTM_Type *) \
|
||||
DT_INST_##n##_NXP_KINETIS_FTM_BASE_ADDRESS), \
|
||||
DT_INST_REG_ADDR(n)), \
|
||||
.mode = kFTM_EdgeAlignedPwm, \
|
||||
}; \
|
||||
static struct mcux_ftm_data mcux_ftm_data_##n; \
|
||||
DEVICE_AND_API_INIT(mcux_ftm_##n, DT_INST_##n##_NXP_KINETIS_FTM_LABEL, \
|
||||
DEVICE_AND_API_INIT(mcux_ftm_##n, DT_INST_LABEL(n), \
|
||||
&mcux_ftm_init, &mcux_ftm_data_##n, \
|
||||
&mcux_ftm_config_##n, \
|
||||
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
|
||||
&mcux_ftm_driver_api)
|
||||
|
||||
#if DT_INST_0_NXP_KINETIS_FTM
|
||||
#if DT_HAS_DRV_INST(0)
|
||||
FTM_DEVICE(0);
|
||||
#endif /* DT_INST_0_NXP_KINETIS_FTM */
|
||||
#endif /* DT_HAS_DRV_INST(0) */
|
||||
|
||||
#if DT_INST_1_NXP_KINETIS_FTM
|
||||
#if DT_HAS_DRV_INST(1)
|
||||
FTM_DEVICE(1);
|
||||
#endif /* DT_INST_1_NXP_KINETIS_FTM */
|
||||
#endif /* DT_HAS_DRV_INST(1) */
|
||||
|
||||
#if DT_INST_2_NXP_KINETIS_FTM
|
||||
#if DT_HAS_DRV_INST(2)
|
||||
FTM_DEVICE(2);
|
||||
#endif /* DT_INST_2_NXP_KINETIS_FTM */
|
||||
#endif /* DT_HAS_DRV_INST(2) */
|
||||
|
||||
#if DT_INST_3_NXP_KINETIS_FTM
|
||||
#if DT_HAS_DRV_INST(3)
|
||||
FTM_DEVICE(3);
|
||||
#endif /* DT_INST_3_NXP_KINETIS_FTM */
|
||||
#endif /* DT_HAS_DRV_INST(3) */
|
||||
|
|
|
@ -5,6 +5,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_wdog
|
||||
|
||||
#include <drivers/watchdog.h>
|
||||
#include <drivers/clock_control.h>
|
||||
#include <fsl_wdog.h>
|
||||
|
@ -165,16 +167,16 @@ static const struct wdt_driver_api mcux_wdog_api = {
|
|||
static void mcux_wdog_config_func_0(struct device *dev);
|
||||
|
||||
static const struct mcux_wdog_config mcux_wdog_config_0 = {
|
||||
.base = (WDOG_Type *) DT_INST_0_NXP_KINETIS_WDOG_BASE_ADDRESS,
|
||||
.clock_name = DT_INST_0_NXP_KINETIS_WDOG_CLOCK_CONTROLLER,
|
||||
.base = (WDOG_Type *) DT_INST_REG_ADDR(0),
|
||||
.clock_name = DT_INST_CLOCKS_LABEL(0),
|
||||
.clock_subsys = (clock_control_subsys_t)
|
||||
DT_INST_0_NXP_KINETIS_WDOG_CLOCK_NAME,
|
||||
DT_INST_CLOCKS_CELL(0, name),
|
||||
.irq_config_func = mcux_wdog_config_func_0,
|
||||
};
|
||||
|
||||
static struct mcux_wdog_data mcux_wdog_data_0;
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_wdog_0, DT_INST_0_NXP_KINETIS_WDOG_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_wdog_0, DT_INST_LABEL(0),
|
||||
&mcux_wdog_init,
|
||||
&mcux_wdog_data_0, &mcux_wdog_config_0,
|
||||
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
@ -182,9 +184,9 @@ DEVICE_AND_API_INIT(mcux_wdog_0, DT_INST_0_NXP_KINETIS_WDOG_LABEL,
|
|||
|
||||
static void mcux_wdog_config_func_0(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(DT_INST_0_NXP_KINETIS_WDOG_IRQ_0,
|
||||
DT_INST_0_NXP_KINETIS_WDOG_IRQ_0_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQN(0),
|
||||
DT_INST_IRQ(0, priority),
|
||||
mcux_wdog_isr, DEVICE_GET(mcux_wdog_0), 0);
|
||||
|
||||
irq_enable(DT_INST_0_NXP_KINETIS_WDOG_IRQ_0);
|
||||
irq_enable(DT_INST_IRQN(0));
|
||||
}
|
||||
|
|
|
@ -7,6 +7,8 @@
|
|||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#define DT_DRV_COMPAT nxp_kinetis_wdog32
|
||||
|
||||
#include <drivers/watchdog.h>
|
||||
#include <drivers/clock_control.h>
|
||||
#include <fsl_wdog32.h>
|
||||
|
@ -19,12 +21,12 @@ LOG_MODULE_REGISTER(wdt_mcux_wdog32);
|
|||
|
||||
struct mcux_wdog32_config {
|
||||
WDOG_Type *base;
|
||||
#ifdef DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY
|
||||
#if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
|
||||
u32_t clock_frequency;
|
||||
#else /* !DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
#else /* !DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
char *clock_name;
|
||||
clock_control_subsys_t clock_subsys;
|
||||
#endif /* !DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
#endif /* !DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
wdog32_clock_source_t clk_source;
|
||||
wdog32_clock_prescaler_t clk_divider;
|
||||
void (*irq_config_func)(struct device *dev);
|
||||
|
@ -88,9 +90,9 @@ static int mcux_wdog32_install_timeout(struct device *dev,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
#ifdef DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY
|
||||
#if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
|
||||
clock_freq = config->clock_frequency;
|
||||
#else /* !DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
#else /* !DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
struct device *clock_dev = device_get_binding(config->clock_name);
|
||||
if (clock_dev == NULL) {
|
||||
return -EINVAL;
|
||||
|
@ -100,7 +102,7 @@ static int mcux_wdog32_install_timeout(struct device *dev,
|
|||
&clock_freq)) {
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif /* !DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
#endif /* !DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
|
||||
div = config->clk_divider == kWDOG32_ClockPrescalerDivide1 ? 1U : 256U;
|
||||
|
||||
|
@ -189,24 +191,24 @@ static const struct wdt_driver_api mcux_wdog32_api = {
|
|||
static void mcux_wdog32_config_func_0(struct device *dev);
|
||||
|
||||
static const struct mcux_wdog32_config mcux_wdog32_config_0 = {
|
||||
.base = (WDOG_Type *) DT_INST_0_NXP_KINETIS_WDOG32_BASE_ADDRESS,
|
||||
#ifdef DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY
|
||||
.clock_frequency = DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY,
|
||||
#else /* !DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
.clock_name = DT_INST_0_NXP_KINETIS_WDOG32_CLOCK_CONTROLLER,
|
||||
.base = (WDOG_Type *) DT_INST_REG_ADDR(0),
|
||||
#if DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency)
|
||||
.clock_frequency = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency),
|
||||
#else /* !DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
.clock_name = DT_INST_CLOCKS_LABEL(0),
|
||||
.clock_subsys = (clock_control_subsys_t)
|
||||
DT_INST_0_NXP_KINETIS_WDOG32_CLOCK_NAME,
|
||||
#endif /* DT_INST_0_NXP_KINETIS_WDOG32_CLOCKS_CLOCK_FREQUENCY */
|
||||
DT_INST_CLOCKS_CELL(0, name),
|
||||
#endif /* DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, clocks), clock_frequency) */
|
||||
.clk_source =
|
||||
TO_WDOG32_CLK_SRC(DT_INST_0_NXP_KINETIS_WDOG32_CLK_SOURCE),
|
||||
TO_WDOG32_CLK_SRC(DT_INST_PROP(0, clk_source)),
|
||||
.clk_divider =
|
||||
TO_WDOG32_CLK_DIV(DT_INST_0_NXP_KINETIS_WDOG32_CLK_DIVIDER),
|
||||
TO_WDOG32_CLK_DIV(DT_INST_PROP(0, clk_divider)),
|
||||
.irq_config_func = mcux_wdog32_config_func_0,
|
||||
};
|
||||
|
||||
static struct mcux_wdog32_data mcux_wdog32_data_0;
|
||||
|
||||
DEVICE_AND_API_INIT(mcux_wdog32_0, DT_INST_0_NXP_KINETIS_WDOG32_LABEL,
|
||||
DEVICE_AND_API_INIT(mcux_wdog32_0, DT_INST_LABEL(0),
|
||||
&mcux_wdog32_init, &mcux_wdog32_data_0,
|
||||
&mcux_wdog32_config_0, POST_KERNEL,
|
||||
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
|
||||
|
@ -214,9 +216,9 @@ DEVICE_AND_API_INIT(mcux_wdog32_0, DT_INST_0_NXP_KINETIS_WDOG32_LABEL,
|
|||
|
||||
static void mcux_wdog32_config_func_0(struct device *dev)
|
||||
{
|
||||
IRQ_CONNECT(DT_INST_0_NXP_KINETIS_WDOG32_IRQ_0,
|
||||
DT_INST_0_NXP_KINETIS_WDOG32_IRQ_0_PRIORITY,
|
||||
IRQ_CONNECT(DT_INST_IRQN(0),
|
||||
DT_INST_IRQ(0, priority),
|
||||
mcux_wdog32_isr, DEVICE_GET(mcux_wdog32_0), 0);
|
||||
|
||||
irq_enable(DT_INST_0_NXP_KINETIS_WDOG32_IRQ_0);
|
||||
irq_enable(DT_INST_IRQN(0));
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue