Commit graph

66 commits

Author SHA1 Message Date
Kumar Gala a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Martí Bolívar 3852e08126 drivers: spi_ll_stm32: fix COND_CODE_1 usage
The consequent and alternate expressions for COND_CODE_1 must be
enclosed in parentheses, like this:

COND_CODE_1(PREDICATE, (consequent), (alternate))

The parens are missing in exactly one place in the tree. Fix it.

Reported-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-29 23:07:19 +02:00
Erwan Gouriou ac98a786d4 drivers/spi: stm32: Fix use of single dma channel
Current dma struture code didn't allowed only rx channel removal,
disabling tx channel (in spi client node) was leading compilation
issue.
Fix this by moving conditional code inside SPI_DMA_CHANNEL macro and
get the part of code which is present or removed (SPI_DMA_CHANNEL_INIT)
outside of {}.
Additionally, fix indentation on '\' in whole instance init macros

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-18 19:14:37 +02:00
Francois Ramu 1a163673c7 drivers: spi: driver reloading dma buffers in the main transceive loop
With this change, the spi transceive with dma function
waits for the spi busy flag reset and for the dma transfer end.
Then it reloads the channels until all buffers are consumed.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Francois Ramu c83e2a41ae drivers: spi: driver dma callback function to set transfer flag
This change avoids the reload of the dma channel
in the callback function, just sets the corresponding Tx, Rx flag.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-13 16:22:10 +02:00
Martí Bolívar 7e0eed9235 devicetree: allow access to all nodes
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.

Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.

To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:

- emit macros for all existing nodes in gen_defines.py, regardless
  of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Tomasz Bursztyka 97326c0445 device: Fix structure attributes access
Since struct devconfig was merged earlier into struct device, let's fix
accessing config_info, name, ... attributes everywhere via:

grep -rlZ 'dev->config->' | xargs -0 sed -i 's/dev->config->/dev->/g'

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Martí Bolívar 87e1743ae0 devicetree: replace DT_HAS_DRV_INST with DT_INST_FOREACH
Make drivers multi-instance wherever possible using DT_INST_FOREACH.
This allows removing DT_HAS_DRV_INST in favor of making drivers just
do the right thing regardless of how many instances there are.

There are a few exceptions:

- SoC drivers which use CMake input files (like i2c_dw.c) or otherwise
  would require more time to convert than I have at the moment. For the
  sake of expediency, just inline the DT_HAS_DRV_INST expansion for
  now in these cases.

- SoC drivers which are explicitly single-instance (like the nRF SAADC
  driver). Again for the sake of expediency, drop a BUILD_ASSERT in
  those cases to make sure the assumption that all supported SoCs have
  at most one available instance is valid, failing fast otherwise.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-06 17:35:08 -05:00
Francois Ramu 469e505278 drivers: spi: control of the dma callback on spi client for stm32
The DMA callback function now controls the tx or rx buffers
and reload dma in case of multiple trnasfer before the transfer ends

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-04 09:46:07 -05:00
Francois Ramu ce093dc35e drivers: spi: Enable dma transfer for SPI on stm32
Enable dma operations with or w/o a dmamux on STM32
for SPI periph/memory operations.
Use the pi dma client with dma macros

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-05-04 09:46:07 -05:00
Kumar Gala 5999787e6e drivers: spi: spi_stm32: Convert DT_COMPAT_ define usage to new macros
Convert driver from using DT_COMPAT_ST_STM32_SPI_FIFO to new macro
DT_HAS_COMPAT(st_stm32_spi_fifo).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-23 05:58:17 -05:00
Kumar Gala 989484b4bf drivers: stm32: Convert STM32 drivers to new DT_INST macros
Convert older DT_INST_ macro use in STM32 drivers to the new
include/devicetree.h DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-03-26 12:22:12 -05:00
Erwan Gouriou c2f19dc52e drivers: spi: spi_stm32: convert to DT_INST defines
Convert driver to use DT_INST_ defines.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Erwan Gouriou d3664b063e drivers/spi: stm32: Modify use of "st,stm32-spi-fifo" compatible
On stm32 spi devices, there are 2 main IP variants, with and w/o
fifo. Fifo is not really used today, but still there is some
additional code handling fifo. Today this code is protected under
Kconfig symbol SPI_STM32_HAS_FIFO.
This code carries redundant information vs dedicated compatible
"st,stm32-spi-fifo", which is provided as unique driver compatible
for devices supporting this IP as opposed to use of "st,stm32-spi"
when fifo is not supported.

Having these 2 compatibles defined exclusively is not convenient for
migration to DT_INST as DT_INST macros contain compatible string and
hence it cannot be used to provide common compatible code for devices
defining different compatibles.

Based on these observations, review stm32 spi devices compatible
declarations. Devices supporting fifo will now declare both
compatibles, as proposed by dt spec: "[compatible] property value
consists of a concatenated list of null terminated strings,
from most specific to most general". Hence field will now be:
"st,stm32-spi-fifo", "st,stm32-spi"

This way, fifo enabled stm32 spi devices will generate both:
DT_INST_STM32_SPI_FOO and DT_INST_STM32_SPI_FIFO_FOO
As well as:
DT_COMPAT_ST_STM32_SPI and DT_COMPAT_ST_STM32_SPI_FIFO
So, DT_INST_STM32_SPI_FOO could be used for device initialization.
Also DT_COMPAT_ST_STM32_SPI_FIFO could be used for FIFO handling
code inside driver. Hence use it to replace Kconfig symbol
SPI_STM32_HAS_FIFO.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-03-17 11:03:10 -06:00
Peter Bigot 0b0d2e640b treewide: use full path to clock_control/stm32_clock_control.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
David D b96525c82c drivers: spi: Fixing null-pointer dereference in stm32
Fixes #21935

Signed-off-by: David D <a8961713@gmail.com>
2020-01-20 18:38:39 -05:00
Marcin Niestroj bbe8e63c46 spi: stm32: deduplicate code creating SPI instances
Create new instances of SPI using single STM32_SPI_INIT() macro
invocation, similar as it is done for STM32 UART driver. Add also
implicit '#ifdef CONFIG_SPI_id' check, so it further reduces required
lines of code for each SPI instance definition.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-01-20 18:36:24 -05:00
Erwan Gouriou ca61847af2 Revert "spi: stm32: Enable sending 16bits at a time in 8bit mode if possible"
This reverts commit 2ce8fa1e42.

Fixes #21546
Fixes #21679

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-01-07 19:08:36 +01:00
Pushpal Sidhu 2ce8fa1e42 spi: stm32: Enable sending 16bits at a time in 8bit mode if possible
If possible, allow sending 16bits at once instead of 8bits. I found
large delays (up to 3us) between sending bytes due to Zephyr SPI
overhead, so allowing 16bits at a time if possible helps save that
time.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2019-12-18 22:01:20 +01:00
Pushpal Sidhu 8f0788ee69 spi: stm32: remove spi_stm32_next_tx helper
Remove usage of this helper to stage for 16bit frame transfers in 8bit
mode.

Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
2019-12-18 22:01:20 +01:00
Francois Ramu a0bd434fa5 driver: spi: Error handling issues in spi_stm32_configure
This patch tests the return code when calling clock_control_get_rate
and completes the issue  #20503 seen on watchdog
[Coverity CID :205655]

Fixes #20503

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-11-18 09:18:13 -06:00
Yaël Boutreux e0d6534f09 drivers: spi: spi_ll_stm32: Add support for STM32MP1x SoC
Add SPI driver support for STM32MP1x SoC.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-05 13:52:34 -05:00
Yaël Boutreux 876eb63ac3 drivers: spi: st_stm32: Abstract LL function for spi ver. compatibility
Abstract some SPI LL function call for future driver compatibility with
a new SPI peripheral version (introduced with STM32MP1x and STM32H7x
SoC)

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-05 13:52:34 -05:00
Yaël Boutreux c935508c05 drivers: spi: spi_ll_stm32: set NSS before mode
This commit solves an issue where the NSS must be set before the
mode on the stm32mp157c_dk2, else LL_SPI_SetMode won't affect the
mode registry.
stm32mp1x (and stm32h7) LL function SPI_Init seems to also define
first the NSS then the mode, unlike other STM32 boards where this
is not specified.
Changing the order shouldn't have bad repercussions on other boards,
ZephyrnSPI driver test has been passed successfully on disco_l475_iot1
board.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-05 13:52:34 -05:00
Yaël Boutreux ebcd6506fa drivers: spi: spi_ll_stm32: Long line cleanup
Split a long line remaining in the driver.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-01 11:58:02 -04:00
Yaël Boutreux 13ceab4c3b drivers: spi: spi_ll_stm32: Add config to manage slave select
Allow the user to use software slave select instead of the
hardware pin, in order to free the related GPIO and avoid
unwanted SS triggering on the hardware pin. The default SS
is still the hardware pin.

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-08-01 11:58:02 -04:00
Yaël Boutreux 3a6b46e263 drivers: spi: spi_ll_stm32: Fix uncleared MODF flag
Clear raised MODF flag, if not done the flag stay set forever.

Fixes https://github.com/zephyrproject-rtos/zephyr/issues/17363

Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-07-31 10:30:44 -04:00
Anas Nashif a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif bd70f6f1ed cleanup: include/: move spi.h to drivers/spi.h
move spi.h to drivers/spi.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif 17ddd1714c cleanup: include/: move clock_control.h to drivers/clock_control.h
move clock_control.h to drivers/clock_control.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
AJ Palmer f24834525f stm32: drivers: spi: Added missing devices
Added missing DEVICE_AND_API_INIT definitions: SPI_4, SPI_5 and SPI_6.

Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
2018-12-13 07:31:06 -06:00
Erwan Gouriou 9062e97a45 drivers: stm32: check clock_control_on return value
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-12-07 11:31:48 -05:00
Erwan Gouriou 121d68f379 drivers/spi: stm32: Use device tree for device clock configuration
Use DT generated symbols to configure clock bus/bits of STM32
SPI devices.

Fixes #10447

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-11-21 12:28:58 -05:00
Kumar Gala 6d83738e33 dts: spi: cleanup CONFIG_SPI_x_IRQ_PRI
All of the cases of CONFIG_SPI_x_IRQ_PRI should be DT_SPI_x_IRQ_PRI.
So go ahead and fix them up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-21 12:27:16 -05:00
Kumar Gala 1634cf2248 drivers/spi: Always selecet HAS_DTS_SPI once SPI is enabled
All drivers require DTS for their primary SPI settings.

Removing SPI_[0-9]_NAME config option added some more samples changes.
Usage of these options there was anyway not relevant.

Fixes #11064

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-16 14:02:00 -05:00
Andrzej Głąbek 20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Kumar Gala aa2bdbe322 drivers: Remove board.h include
We either don't need board.h in the driver or we should be include soc.h
instead.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-01 13:21:11 -04:00
Anas Nashif 88aa2ca49f driver: spi: use new logger
move SPI drivers to use new logger.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-08 17:49:12 -04:00
Erwan Gouriou 85742e3c9a drivers/spi: stm32: fix warning in SYS_LOG_ERR macro
Following log subsystem rework, a warning poped-up in SYS_LOG_ERR
in spi_stm32_get_err macro.
Fix it by casting SPI_STM32_ERR_MSK on (u32_t)

Fixes #10380

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-10-05 11:11:03 -04:00
Armando Visconti c7053643d5 spi: spi_ll_stm32: (fix) Clear OVR bit condition
The OVR condition in the Status Register requires a
particular sequence in order to be cleared. If not
done properly it stays set forever.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-06-04 12:35:52 -05:00
Neil Armstrong 7fb245f9c6 spi: spi_ll_stm32: fix slave frame shifting
In the current form of the code, the slave frame shifting leaves the TX
full and will shift out some unwanted bytes out on the next transaction.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-05-28 10:18:23 -04:00
Armando Visconti bb9fe428d8 spi: spi_ll_stm32: Fix transceive() ret value in spi_slave case
In SPI slave case the transceive should return either the negative
errno code in case of error or the number of frames received.
So, now:

 1. the spi_stm32_get_err() routine already checks whether
    the SPI cell got an error and returns -EIO in that case.

 2. the transceive() routine always returns whatever the
    spi_context_wait_for_completion() has returned, which
    is either:
        a. -EIO in case of error
        b. 0 in spi_master ok case
        c. the number of frames received in spi_slave ok case

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-05-25 12:56:38 -05:00
Tomasz Bursztyka da42c0077c api/spi: Add a dedicated Kconfig option for asynchronous mode enablement
Instead of using CONFIG_POLL, which is not directly related to SPI and
is a kernel option, let's have SPI_ASYNC instead. When enabled, it will
select POLL automatically.

Fixes #5839

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-04-04 19:02:35 +02:00
Tomasz Bursztyka ea2431f32f api/spi: Reduce parameter number on transceive function
tx_bufs/tx_count and rx_bufs/rx_count can be hold in another dedicated
structure, thus reducing the number of parameters to transceive. This
permits to avoid using the stack when calling transceive.

Since we saved parameters, we can expose back the struct device pointer,
to stay consistent with other device driver APIs.

Fixes #5839

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-04-04 19:02:35 +02:00
Tomasz Bursztyka f3f9fab20e api/spi: Make spi_config parameter constant
As the content of this struct will not be modified by drivers, it's
better to pass it as constant. Also, if someday struct device can be
made contant too, this change will make spi ready for registering the
spi_config into ROM directly.

Fixes #5839

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-04-04 19:02:35 +02:00
Yannis Damigos a3474a2e2e drivers: spi_ll_stm32: Protect against null TX/RX buffer
TX/RX buffer may be NULL, so check them before use.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-02-01 08:19:49 -06:00
Yannis Damigos af0c9fc349 drivers: spi_ll_stm32: Enable SPI driver for F1 family
Enables SPI driver for STM32F1 SoCs

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-02-01 08:19:49 -06:00
Yannis Damigos 3a03b28f87 drivers: spi_ll_stm32: Get SPI configuration from DT
Get SPI_*_BASE_ADDRESS, SPI_*_NAME, SPI_*_IRQ and
SPI_*_IRQ_PRI from DT.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-01-17 11:51:48 -06:00
Florian Vaussard 59f0c99f0e spi: stm32: Correctly apply CPOL and CPHA settings
SPI_MODE_GET() returns a bitfield. It is thus wrong to test if a bit is
set using the equality operator. The bit-wise AND operator must be used
instead.

This can be tested by setting the SPI in mode 3 (CPOL + CPHA). Currently
both tests will fail and the result is a SPI configured in mode 0. This
was confirmed using an oscilloscope. Applying the patch fixes the
polarity.

Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
2018-01-11 19:00:19 -05:00
Neil Armstrong 7caa56f608 spi: spi_ll_stm32: Add support for STM32F0
Add support for STM32F0 similar to STM32F3 and STM32L4

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-01-11 19:00:19 -05:00