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drivers: stm32: check clock_control_on return value

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Check clock_control_on return value now that it is checking appropriate
bus is used in the request.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-12-07 11:09:28 +01:00 • committed by Anas Nashif
commit 9062e97a45
12 changed files with 52 additions and 17 deletions
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6
drivers/dma/dma_stm32f4x.c
View file

@ -499,7 +499,11 @@ static int dma_stm32_init(struct device *dev)
__ASSERT_NO_MSG(ddata->clk);
clock_control_on(ddata->clk, (clock_control_subsys_t *) &cdata->pclken);
if (clock_control_on(ddata->clk,
(clock_control_subsys_t *) &cdata->pclken) != 0) {
LOG_ERR("Could not enable DMA clock\n");
return -EIO;
}
/* Set controller specific configuration */
cdata->config(ddata);

4
drivers/entropy/entropy_stm32.c
View file

@ -151,6 +151,7 @@ static int entropy_stm32_rng_init(struct device *dev)
{
struct entropy_stm32_rng_dev_data *dev_data;
struct entropy_stm32_rng_dev_cfg *dev_cfg;
int res;
__ASSERT_NO_MSG(dev != NULL);
@ -186,8 +187,9 @@ static int entropy_stm32_rng_init(struct device *dev)
dev_data->clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
__ASSERT_NO_MSG(dev_data->clock != NULL);
clock_control_on(dev_data->clock,
res = clock_control_on(dev_data->clock,
(clock_control_subsys_t *)&dev_cfg->pclken);
__ASSERT_NO_MSG(res);
LL_RNG_Enable(dev_data->rng);

14
drivers/ethernet/eth_stm32_hal.c
View file

@ -263,6 +263,7 @@ static int eth_initialize(struct device *dev)
{
struct eth_stm32_hal_dev_data *dev_data;
struct eth_stm32_hal_dev_cfg *cfg;
int ret = 0;
__ASSERT_NO_MSG(dev != NULL);
@ -276,15 +277,20 @@ static int eth_initialize(struct device *dev)
__ASSERT_NO_MSG(dev_data->clock != NULL);
/* enable clock */
clock_control_on(dev_data->clock,
ret = clock_control_on(dev_data->clock,
(clock_control_subsys_t *)&cfg->pclken);
clock_control_on(dev_data->clock,
ret |= clock_control_on(dev_data->clock,
(clock_control_subsys_t *)&cfg->pclken_tx);
clock_control_on(dev_data->clock,
ret |= clock_control_on(dev_data->clock,
(clock_control_subsys_t *)&cfg->pclken_rx);
clock_control_on(dev_data->clock,
ret |= clock_control_on(dev_data->clock,
(clock_control_subsys_t *)&cfg->pclken_ptp);
if (ret) {
LOG_ERR("Failed to enable ethernet clock");
return -EIO;
}
__ASSERT_NO_MSG(cfg->config_func != NULL);
cfg->config_func();

4
drivers/flash/flash_stm32.c
View file

@ -252,7 +252,9 @@ static int stm32_flash_init(struct device *dev)
#endif
/* enable clock */
clock_control_on(clk, (clock_control_subsys_t *)&p->pclken);
if (clock_control_on(clk, (clock_control_subsys_t *)&p->pclken) != 0) {
return -EIO;
}
#endif
k_sem_init(&p->sem, 1, 1);

5
drivers/gpio/gpio_stm32.c
View file

@ -192,7 +192,10 @@ static int gpio_stm32_init(struct device *device)
struct device *clk =
device_get_binding(STM32_CLOCK_CONTROL_NAME);
clock_control_on(clk, (clock_control_subsys_t *) &cfg->pclken);
if (clock_control_on(clk,
(clock_control_subsys_t *) &cfg->pclken) != 0) {
return -EIO;
}
return 0;
}

6
drivers/i2c/i2c_ll_stm32.c
View file

@ -170,7 +170,11 @@ static int i2c_stm32_init(struct device *dev)
#endif
__ASSERT_NO_MSG(clock);
clock_control_on(clock, (clock_control_subsys_t *) &cfg->pclken);
if (clock_control_on(clock,
(clock_control_subsys_t *) &cfg->pclken) != 0) {
LOG_ERR("i2c: failure enabling clock");
return -EIO;
}
#if defined(CONFIG_SOC_SERIES_STM32F3X) || defined(CONFIG_SOC_SERIES_STM32F0X)
/*

1
drivers/i2s/i2s_ll_stm32.c
View file

@ -99,6 +99,7 @@ static int i2s_stm32_enable_clock(struct device *dev)
ret = clock_control_on(clk, (clock_control_subsys_t *) &cfg->pclken);
if (ret != 0) {
LOG_ERR("Could not enable I2S clock");
return -EIO;
}

6
drivers/pwm/pwm_stm32.c
View file

@ -196,8 +196,10 @@ static int pwm_stm32_init(struct device *dev)
__pwm_stm32_get_clock(dev);
/* enable clock */
clock_control_on(data->clock,
(clock_control_subsys_t *)&config->pclken);
if (clock_control_on(data->clock,
(clock_control_subsys_t *)&config->pclken) != 0) {
return -EIO;
}
return 0;
}

5
drivers/rtc/rtc_ll_stm32.c
View file

@ -214,7 +214,10 @@ static int rtc_stm32_init(struct device *dev)
k_sem_init(DEV_SEM(dev), 1, UINT_MAX);
DEV_DATA(dev)->cb_fn = NULL;
clock_control_on(clk, (clock_control_subsys_t *) &cfg->pclken);
if (clock_control_on(clk,
(clock_control_subsys_t *) &cfg->pclken) != 0) {
return -EIO;
}
LL_PWR_EnableBkUpAccess();
LL_RCC_ForceBackupDomainReset();

6
drivers/serial/uart_stm32.c
View file

@ -311,8 +311,10 @@ static int uart_stm32_init(struct device *dev)
__uart_stm32_get_clock(dev);
/* enable clock */
clock_control_on(data->clock,
(clock_control_subsys_t *)&config->pclken);
if (clock_control_on(data->clock,
(clock_control_subsys_t *)&config->pclken) != 0) {
return -EIO;
}
LL_USART_Disable(UartInstance);

7
drivers/spi/spi_ll_stm32.c
View file

@ -465,8 +465,11 @@ static int spi_stm32_init(struct device *dev)
__ASSERT_NO_MSG(device_get_binding(STM32_CLOCK_CONTROL_NAME));
clock_control_on(device_get_binding(STM32_CLOCK_CONTROL_NAME),
(clock_control_subsys_t) &cfg->pclken);
if (clock_control_on(device_get_binding(STM32_CLOCK_CONTROL_NAME),
(clock_control_subsys_t) &cfg->pclken) != 0) {
LOG_ERR("Could not enable SPI clock");
return -EIO;
}
#ifdef CONFIG_SPI_STM32_INTERRUPT
cfg->irq_config(dev);

5
drivers/usb/device/usb_dc_stm32.c
View file

@ -253,7 +253,10 @@ static int usb_dc_stm32_clock_enable(void)
}
#endif /* RCC_HSI48_SUPPORT / LL_RCC_USB_CLKSOURCE_NONE */
clock_control_on(clk, (clock_control_subsys_t *)&pclken);
if (clock_control_on(clk, (clock_control_subsys_t *)&pclken) != 0) {
LOG_ERR("Unable to enable USB clock");
return -EIO;
}
#ifdef DT_USB_HS_BASE_ADDRESS