Commit graph

3837 commits

Author SHA1 Message Date
Erwan Gouriou
910b8b32fc boards: nucleo_f334r8: Provide flash storage partition
Add 6kb storage partition and declare nvs is supported.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou
b3252a8a71 boards: stm32f3_disco: Add a storage partition
Add a 6kb "storage" partition to enable nvs samples test.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou
f0cac35a58 boards: nucleo_l432kc: Fix comment on partition description
Comment for storage partition could be misleading.
Clarify this is a partition used for file system.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Erwan Gouriou
5629f61b40 boards: nucleo_f091rc: Increase storage partition size
Storage partition minimum size is 6kb for successful test of
nvs sample.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-19 07:45:50 -06:00
Kumar Gala
8bd360fa14 boards: galileo: Fix I2C device name defaults
Fix setting of the I2C bus master device name for the GPIO_PCAL9535A
device and PWM_PCA9685.  We need to extract them from the dts otherwise
they will just get set to "".

Fixes #13458

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-18 23:39:12 -05:00
Maureen Helm
cf94d6811a soc: nxp_imx: Default to on-chip memories at soc level
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.

The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-18 15:14:18 -05:00
Johann Fischer
853710993d boards: reel_board: remove cts,rts pins from uart node
Remove cts,rts pins from uart node.
The pins are used for expansion connector.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-18 15:08:22 -05:00
Johann Fischer
b5b728495b boards: reel_board: enable pull-up on UART RX pin
Enable pull-up on UART RX pin to reduce power consumption.
If the board is powered by battery and the debugger is
not connected via USB to the host, the SoC consumes up
to 2mA more than expected.
The consumption increases because RX pin is floating
(High-Impedance state of pin B from Dual-Supply Bus Transceiver).

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-18 15:08:22 -05:00
Carlos Stuart
75f77db432 include: misc: util.h: Rename min/max to MIN/MAX
There are issues using lowercase min and max macros when compiling a C++
application with a third-party toolchain such as GNU ARM Embedded when
using some STL headers i.e. <chrono>.

This is because there are actual C++ functions called min and max
defined in some of the STL headers and these macros interfere with them.
By changing the macros to UPPERCASE, which is consistent with almost all
other pre-processor macros this naming conflict is avoided.

All files that use these macros have been updated.

Signed-off-by: Carlos Stuart <carlosstuart1970@gmail.com>
2019-02-14 22:16:03 -05:00
Daniel Leung
1d55411a96 boards/intel_s1000_crb: fix Python string format
Fix the support script to actually use Python string formatting,
instead of C-style printf().

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-02-14 19:51:45 -05:00
Andrzej Głąbek
41e09725bb boards: nrf: Enable HW PWMs on nrf52832_mdk and nrf52840_mdk
This is a follow-up to commit e2b38e02bf.
Default PWM instances are enabled in Kconfig and DTS (with channel 0
set to LED0 pin) for these boards so that it is possible to build basic
samples blink_led and fade_led for them without extra modifications.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2019-02-14 18:50:00 -06:00
Alberto Escolar Piedras
143552550f tracing: Add missing isr_exit() for posix arch boards
For the native_posix board, and for the nrf52_bsim boards,
the sys_trace_irs_exit() call was missing. Add it.

Relates to #13357

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-02-14 15:41:19 -05:00
Erwan Gouriou
516899c82b boards: nucleo_l4r5zi: Add flash & debug support
Following introduction of zephyr sdk0.10 and openocd branch
from from 20190130, stm32l4+ SoC support is now available and
flash and debug operations are available on nucleo_l4r5zi board.

Fixes 12094

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-13 22:05:49 -06:00
Maureen Helm
0540b1a699 soc: nxp_imx: Move code/data location configs to soc level
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:

warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice

The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.

The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-13 17:52:20 -05:00
Ryan Erickson
847500dd43 boards: bl654_dvk: Add BL654 DVK board
Add the Laird Connectivity BL654 DVK board to zephyr.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdtech.com>
2019-02-13 11:02:56 -06:00
Ryan Erickson
21b4f77b1c boards: bl652_dvk: Add BL652 DVK board
Add the Laird Connectivity BL652 DVK board to zephyr.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdtech.com>
2019-02-12 21:16:26 -05:00
Ole Sæther
6ad1d617c9 boards: arm: nrf: added uart-mcumgr to nrf9160_pca10090
This adds uart support for mcumgr on nrf9160_pca10090.

Signed-off-by: Ole Sæther <ole.saether@nordicsemi.no>
2019-02-12 20:19:26 -05:00
Erwan Gouriou
2987ba5a38 boards: nucleo_f091rc: Add nvs support
Add nvs support to nucleo_f091rc board. This requires to
add erase-block-size property to stm32f0.dtsi.
Storage partition is set to 4kb at the end of the flash.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-12 20:16:22 -05:00
Erwan Gouriou
1f49c48f3c board: disco_l475_iot1: add storage partition
Add storage partition to the board in order to enable testing on
nvs sample.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-12 20:16:22 -05:00
Maureen Helm
7913967fec boards: shields: frdm_kw41z: Fix reference to undefined Kconfig symbol
Fixes a reference to a now undefined Kconfig symbol in the frdm_kw41z
shield document.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-12 20:15:15 -05:00
Kumar Gala
a78c2fa8d2 boards: arc: iotdk: Fix missed CONFIG -> DT define transition
The ICCM/DCCM defines come from DT so they should be DT_ prefixed and
not CONFIG_ prefixed.  Fix that in arc_mpu_regions.c.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-11 22:29:58 -05:00
David B. Kinder
8edcbb76bc doc: tweak board doc titles
Add a space in some long doc titles to allow for wrapping in the title
display.  Also fixed a table in the mec2016evb board doc.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-02-12 01:29:40 +01:00
Sathish Kuttan
2603bd81e8 boards: intel_s1000_crb: print short filename
Print just the basename of the Input and Output filenames
when creating the board specific image for Intel S1000 CRB

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-11 07:55:24 -05:00
Anas Nashif
1b0c33f1e6 docs: nrf52_blenano2: remove outdated info from docs
Remove info about kickstarter and an old website that does not work.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
d448726aba boards: minnowboard: add image to qemu boards
Add board image and expand intro section.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
762f4f26ad boards: qemu: add image to qemu boards
Add Qemu logo to qemu boards and expand intro.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
99921cb917 boards: galileo: add image
Add image and expand intro section.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
9fe4a94a12 doc: boards: split paragraph into multiple
Split the intro paragraph into multiple paragraphs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
75e91bfbda boards: up_squared: add intro and image
Expand overview and add image of board.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
b71cadb4cd boards: rv32m1_vega: move image under overview
Image of the board needs to be under overview and integrated into the
text.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
ce4e165f21 boards: 96b_carbon_nrf51: move note below overview
The first note should be under overview and not at the same level as the
title.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif
acaae579cc doc: boards: make board images consistent with board name
Having the image use the same name will help us script listing the
boards.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-10 17:48:08 -05:00
Anas Nashif
dd95d2ffb9 board: up_squared_sbl: fix board identifier
This board had the wrong identifier.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-10 17:48:08 -05:00
Anas Nashif
3d7445bc36 boards: qemu_x86_64 can be built with host compiler
Mark this board as supported with the host toolchain variant.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-10 11:57:17 -06:00
Anas Nashif
0e4ff809d7 doc: boards: move all board docs to be index.rst
Be consistent in how board docs are named and move all to index.rst.
This will make the URL to the board documentation predictable and easier
to remember.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-09 17:22:08 -06:00
Anas Nashif
28b2f32967 boards: fix intro text for many boards
The phrase "Zephyr applications use the ..." in many boards and
inconsistently. This is just to say what is the board identify is.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-09 17:22:08 -06:00
Kumar Gala
4c51684918 drivers: i2c: dw: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert designware i2c driver to use new defines so we can remove the
dts_fixup.h code for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 22:50:07 -05:00
Francisco Munoz
11e5f7db6c boards : Add supoport for Microchip MEC2016 EVB ASSY 6797
This was tested with a the hello world application. UART 0 was used
as console for displaying "Hello World! mec2016evb_assy6797" to the
a serial terminal.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
2019-02-08 21:38:54 -05:00
Kumar Gala
4c8f82177a boards: hexiwear_k64: Convert to use DT_ prefixed defines
The board pinmux code has been using non DT_ prefixed defines for DT
generated defines.  Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 16:03:17 -06:00
Carles Cufi
41b63571a4 doc: west: Document west build
Document the `west build` command in the section corresponding to the
west commands that deal with the CMake cache, which is now named
"Building, flashing and debugging" for consistency.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-02-08 14:58:28 -05:00
Johann Fischer
c2fe802479 drivers: ssd1673: use compatible property to identify display
Use compatible property to identify display and select
proper LUT for display controller.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-08 14:57:36 -05:00
Johann Fischer
f7495ef8eb drivers: ssd1673: add DT properties for configuration registers
The values for the registers like GDV, SDV and Boarder Waveform
depend on the panel and display controller. Add DT properties
and obtain such values from DT.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-02-08 14:57:36 -05:00
Andy Ross
aa6e21c24c kernel: Split _Swap() API into irqlock and spinlock variants
We want a _Swap() variant that can atomically release/restore a
spinlock state in addition to the legacy irqlock.  The function as it
was is now named "_Swap_irqlock()", while _Swap() now refers to a
spinlock and takes two arguments.  The former will be going away once
existing users (not that many!  Swap() is an internal API, and the
long port away from legacy irqlocking is going to be happening mostly
in drivers) are ported to spinlocks.

Obviously on uniprocessor setups, these produce identical code.  But
SMP requires that the correct API be used to maintain the global lock.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-02-08 14:49:39 -05:00
Andrei Laperie
552a03b48f doc: Documenting enablement of UART1 support for nrf52840_pca10056
Adding a set of BKMs on how to enable and configure UART1
for the nrf52840_pca10056 board. This instructions are likely valid
to most other nrf52840- family of boards.

Signed-off-by: Andrei Laperie <andrei.laperie@intel.com>
2019-02-08 14:48:48 -05:00
Nathaniel Graff
ee680a9ac6 boards/hifive1: Enable PWM peripheral driver
Enable the PWM peripheral driver on HiFive 1.

Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
2019-02-08 09:09:35 -06:00
Alberto Escolar Piedras
79680dfe9c doc: native_posix: Add section about subsystems' backends
Add section to describe a bit the currently available subsystems
backends for native_posix

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2019-02-08 09:09:17 -05:00
Aurelien Jarno
2aaf68aceb boards: enable PWM devices on Atmel SMART SAM E70 Xplained Board
This commit enables the PWM0 device on the Atmel SMART SAM E70 Xplained
Board, by adding the entries to the DTS and configuring the PWM pins
from the EXT1 connector (channel 0, inverted) and EXT2 connector
(channel 2, inverted and non-inverted) with the corresponding peripheral
functions. It also updates the documentation and mark pwm as supported
for the tests.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2019-02-08 06:55:14 -06:00
Kumar Gala
33ab2fa42e boards: Change supported 'rtc' to 'counter' for QMSI RTC based boards
We've removed the QMSI RTC driver as part of the new counter API.  So
any old rtc tests don't build for QMSI based boards anymore.  Switch
this from 'rtc' to 'counter' in the board.yaml.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-08 07:31:21 -05:00
Andrew Boie
41f6011c36 userspace: remove APPLICATION_MEMORY feature
This was never a long-term solution, more of a gross hack
to get test cases working until we could figure out a good
end-to-end solution for memory domains that generated
appropriate linker sections. Now that we have this with
the app shared memory feature, and have converted all tests
to remove it, delete this feature.

To date all userspace APIs have been tagged as 'experimental'
which sidesteps deprecation policies.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 07:04:30 -05:00
David B. Kinder
c1dce2f799 doc: fix misspellings in docs
Fix misspellings missed in regular reviews.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-02-07 22:06:14 -05:00