Rename SOC configuration symbols from generic names to more specific
ones that include the vendor and platform information. This improves
clarity and prevents potential naming conflicts.
Changes:
- SOC_SERIES_RMX -> SOC_SERIES_NSIM_ARC_V_RMX
- SOC_RMX100 -> SOC_NSIM_ARC_V_RMX100
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Added helper Kcoinfig option USE_ISR_WRAPPER which can be used to
include isr_wrapper even if GEN_SW_ISR_TABLE is not enabled. This
is needed to enable configurations where only IRQ vector table is
used with multithreading (only direct isr used). This change is
backward compatibible with previous config.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
Keep AHB clock running when CM7 is sleeping and TCM is accessible.
Otherwise, NETC transmission will fail.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Remove these legacy kconfig, not necessary.
The DT already has the bindings and nodes required to represent if there
is a FlexSPI and/or SEMC.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This Kconfig does not belong in the ADC folder, because there is not
actually a zephyr ADC driver for this. Also, remove HAS_MCUX_ADC_ETC as
well because it is a useless config.
The cmake line to pull in this driver from the SDK in the zephyr repo is
totally unnecessary. If a user wants to use this SDK driver they can add
it to their build like any other SDK driver or any other
external code module. Zephyr should not be a cesspool of random build
glue for random pieces of code.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Only the k2x series socs seem to be pulling in this driver for some
reason, the kconfig is not needed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The only code change to remove this was a redundant usage in the rt1180
soc.c which was not needed because it was redundant, if you catch my
drift.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove the configs that are not actually used for anything anymore or
never were, or that are redundant with other configs, and don't have any
code changes outside of Kconfig to remove.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add support for executing the CM7 core directly from flash memory
(XIP - eXecute In Place) instead of copying to ITCM. This provides
the following benefits:
- Allows for larger code size than the 512KB ITCM limit
- Simplifies memory management for large applications
- Reduces boot time by eliminating the need to copy code to ITCM
The implementation includes:
1. A new Kconfig option CM7_BOOT_FROM_FLASH (default: n) to control
the execution mode
2. A device tree overlay (cm7_flash_boot.overlay) that configures
the flash memory for CM7 execution
3. Updates to soc.c to calculate the correct CM7 boot address
based on the flash partition
5. Documentation updates with instructions for both execution modes
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
Remove INPUTMUX interrupt assignments for PINT and GPIO peripherals.
Remove gpio0 DT node.
As the GPIO peripherals can be secured on the mimxrt798s, accesses from
the cm33_cpu0 and hifi4 are mutually exclusive, so the GPIO0 will stay
enabled in the cm33_cpu0 domain.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
wakeupmix keep power on state is essential for system
suspend mode, because of console uart locate in it.
temporarily set the M7 mix to power on,
further optimization will be carried out later
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
All pins are configured by default to be output low during sleep.
A device-tree property called "sleep-output" is provided for cases where
pins need to be configured differently.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This property allows a user to specify the operation of a
pin in sleep mode.
By default, pins are configured to be output low in sleep mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
this commit removes creation of virtual memory regions from
Zephyr, allowing the application to create required regions
It is up the application to use virtual memory as needed,
zephyr however is keeping the table and ensures no memory
addresses overlaps
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Do not use the custom buildlib configuration for the RMX series as it
was replaced with several even more specific configurations in the
recent MWDT release. Pass the generic RMX option to the linker instead.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
Introduce the ACE 4.0 architecture, along with support for the NVL and
NVL-S platforms within the Intel ADSP framework in the Zephyr project.
This update includes:
- Addition of ACE 4.0 architecture configurations in Kconfig and
Kconfig.intel_adsp.
- Inclusion of device tree source files for NVL and NVL-S platforms,
defining CPU, memory, and peripheral configurations.
- Updates to driver files to support ACE 4.0 specific features,
including DMIC and SSP configurations.
- Introduction of new header files for ACE 4.0, detailing boot,
interrupt, IPC, power, and shim functionalities.
- Modifications to the CMakeLists.txt to include ACE 4.0 MMU support.
- Addition of default configurations for NVL and NVL-S platforms in
Kconfig.defconfig.ace40.
The NVL and NVL-S platforms are part of the Nova Lake series, targeting
advanced audio processing capabilities. ACE 4.0 introduces enhanced DSP
capabilities and advanced power management features, improving audio
stream handling and synchronization compared to ACE 3.0.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Added ABB analog status lock read retries if needed.
After cpu idle ABB macro may need some time to initialize
and report status locked. Attempts cound can be configured
using Kconfig option.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
As discussed here[1], CONFIG_SOC should rely on CONFIG_SOC_* variables
while it currently rely on CONFIG_SOC_PART_NUMBER_*. These variable are in
fact misnamed since the migration to HWMv2. So "PART_NUMBER" has to be
removed from these names.
[1]: https://github.com/zephyrproject-rtos/ \
zephyr/pull/93285#discussion_r2221382981
Note, this patch has been generated with:
sed -i -e s/SOC_PART_NUMBER_MGM/SOC_MGM/ \
-e s/SOC_PART_NUMBER_EF/SOC_EF/ \
-e s/SOC_PART_NUMBER_SIM3/SOC_SIM3/ \
-e s/SOC_PART_NUMBER_SIWG/SOC_SIWG/ \
soc/**/*.soc boards/**/Kconfig.*
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Adds initial SoC-level support for the Microchip SAM D5x
and E5x series, including SoC definition files.
Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
Map definition of NRF_GPIOTE0 to NRF_RADIOCORE_GPIOTE when MDK
defines NRF_RADIOCORE_GPIOTE instead of NRF_GPIOTE0
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
To prevent FSPI pins from floating, which may cause internal leakage
and increase SoC power consumption, tri-state is enabled by default.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit raises the sspi clock from 24MHz to 48MHz and
corrects the clock divisor setting for it82xx2 chips.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
There are some drivers like NXP SDMA that need a NonCacheable
data region to put data like channel control or buffer descriptors.
So far, we haven't added such a section because the linker created
one default orphan section at the end of the data section.
But this generates a warning in the build system:
xtensa-nxp_imx8m_adsp_zephyr-elf/bin/ld.bfd: warning: orphan section
NonCacheable' from modules/hal_nxp/libmodules__hal_nxp.a(fsl_sdma.c.obj)'
being placed in section `NonCacheable'
So fix this by explicitly define a NonCacheable area at the end of data
section.
This works because imx8mp cache attributes are
_memmap_cacheattr_imx8_wt_allvalid = 0x22212222
and the area where the NonCacheable section is allocated is
write-through.
So all the configuration for the SDMA core is not-cached at write.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
CONFIG_FLASH_MCUX_FLEXSPI_XIP should also be disabled when using MCUBoot
ramload mode with revert support.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
MCUBoot RAMLOAD mode relies on CONFIG_XIP=n, but FLASH_MCUX_FLEXSPI_XIP
y-selects this symbol. Disable CONFIG_FLASH_MCUX_FLEXSPI_XIP for the
case where we are using MCUBoot ramload mode.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Update the bit offset of bit VCC_STS in the BKUP_STS register.
Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Only RTC DRAM area is currently being loaded during segment loader.
It means that RTC_IRAM and RTC_DATA is missing, causing
issues when sleep-modes are needed.
This also re-format the segments logging output
to meet with MCUBoot/Simple boot cases.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updated twister.yaml workflow to fetch esptool for the CI.
Fix format of the arguments used in the esptool-5.0.2.
Check that esptool is available on build time.
Update runners for esp32.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
