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xtensa: adapt soc code to use prep_c

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Many xtensa target jump from soc code directly into cstart and depend on
architecture code being initialized in arch_kernel_init(). Instead of
jumping to cstart, jump to newly introduced prep_c similar to all other
architectures, where common platfotm initialization will happen.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2024-07-06 15:31:13 -04:00 • committed by Carles Cufí
commit dbfbf0edba
7 changed files with 15 additions and 14 deletions
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6
soc/espressif/esp32/soc.c
View file

@ -47,7 +47,7 @@ extern int _ext_ram_bss_start;
extern int _ext_ram_bss_end;
#endif
extern void z_cstart(void);
extern void z_prep_c(void);
extern void esp_reset_reason_init(void);
#ifdef CONFIG_SOC_ENABLE_APPCPU
@ -120,7 +120,7 @@ void IRAM_ATTR __esp_platform_start(void)
/* Initialize the architecture CPU pointer. Some of the
* initialization code wants a valid _current before
* arch_kernel_init() is invoked.
* z_prep_c() is invoked.
*/
__asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0]));
@ -188,7 +188,7 @@ void IRAM_ATTR __esp_platform_start(void)
esp_intr_initialize();
/* Start Zephyr */
z_cstart();
z_prep_c();
CODE_UNREACHABLE;
}

6
soc/espressif/esp32/soc_appcpu.c
View file

@ -33,7 +33,7 @@
#include <esp_app_format.h>
#include <zephyr/sys/printk.h>
extern void z_cstart(void);
extern void z_prep_c(void);
/*
* This is written in C rather than assembly since, during the port bring up,
@ -69,13 +69,13 @@ void __app_cpu_start(void)
/* Initialize the architecture CPU pointer. Some of the
* initialization code wants a valid _current before
* arch_kernel_init() is invoked.
* z_prep_c() is invoked.
*/
__asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0]));
esp_intr_initialize();
/* Start Zephyr */
z_cstart();
z_prep_c();
CODE_UNREACHABLE;
}

3
soc/espressif/esp32s2/soc.c
View file

@ -39,6 +39,7 @@
extern void rtc_clk_cpu_freq_set_xtal(void);
extern void esp_reset_reason_init(void);
extern void z_prep_c(void);
#if CONFIG_ESP_SPIRAM
extern int _ext_ram_bss_start;
@ -143,7 +144,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void)
esp_intr_initialize();
/* Start Zephyr */
z_cstart();
z_prep_c();
CODE_UNREACHABLE;
}

4
soc/espressif/esp32s3/soc.c
View file

@ -52,7 +52,7 @@ extern int _ext_ram_bss_start;
extern int _ext_ram_bss_end;
#endif
extern void z_cstart(void);
extern void z_prep_c(void);
extern void esp_reset_reason_init(void);
#ifdef CONFIG_SOC_ENABLE_APPCPU
@ -212,7 +212,7 @@ void IRAM_ATTR __esp_platform_start(void)
esp_intr_initialize();
/* Start Zephyr */
z_cstart();
z_prep_c();
CODE_UNREACHABLE;
}

4
soc/espressif/esp32s3/soc_appcpu.c
View file

@ -33,7 +33,7 @@
#include <esp_app_format.h>
#include <esp_clk_internal.h>
extern void z_cstart(void);
extern void z_prep_c(void);
static void core_intr_matrix_clear(void)
{
@ -72,7 +72,7 @@ void IRAM_ATTR __app_cpu_start(void)
esp_intr_initialize();
/* Start Zephyr */
z_cstart();
z_prep_c();
CODE_UNREACHABLE;
}

4
soc/intel/intel_adsp/common/boot.c
View file

@ -157,6 +157,6 @@ __imr void boot_core0(void)
xtensa_vecbase_lock();
/* Zephyr! */
extern FUNC_NORETURN void z_cstart(void);
z_cstart();
extern FUNC_NORETURN void z_prep_c(void);
z_prep_c();
}

2
soc/mediatek/mtk_adsp/soc.c
View file

@ -171,5 +171,5 @@ void c_boot(void)
val = 0xffffffff;
__asm__ volatile("wsr %0, INTCLEAR" :: "r"(val));
z_cstart();
z_prep_c();
}