Some variants of the PCA953x family support pull-up / pull-down
resistors through registers 0x43 and 0x44 (mostly the TCAL9538 variant).
We already support input latching and interrupt masking (which is also
only present on a few variants), so let's also add support for pull-up
and pull-down resistors.
The feature can be enabled with the has-pud property in the device tree.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
Document the AD4170-4, AD4190-4, and AD4195-4 low noise, high precision
24-bit ADCs, each supporting 4 differential or 8 single-ended inputs,
integrated PGA (0.5-128). All devices feature internal and external
buffered references, operate from 4.75-5.25V analog and 1.7-5.25V
digital supply.
Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Update STM32 ADC binding description now that the STM32F3 ADC asynchronous
prescaler is set through the clock property.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that the ADC prescaler are set within the driver using the clock
system, the specific rcc compatibles for F1 and F3 are no longer useful.
Replace them with the standard one (from which they were derived).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
To easily differentiate between the different clocks that can be configured
in device tree, make their naming mandatory, and explicit what the expected
names are.
Add these names in all dtsi and dts files that need them.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The Wi-Fi firmware image in the QSPI flash has always been located in
the last 512kB of the 16MB Flash device. This offset is 0xf80000, not
0xe80000 as it was mistakenly set. Fix.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Add the definition for the Master Boot Record partition at the
beginning of the flash. This is used by existing Arduino 'Storage'
libraries to store partition table information.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
All the clocks names on SiWx91x follow the pattern "SIWX91X_CLK_xxx".
SIWX91X_ADC_CLK was an exception.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Move nxp,xspi.yaml from spi bindings to mtd, it should be flash
controllor rather than simple bus controller.
Delete the xspi flash mx25um51345g bindling yaml file which is useless.
Enable flash and two psrams on RT700 core0 and one psram on core1.
Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
Add an new boolean property `dma-driven` to indicate if the I2C
hardware module has a dedicated DMA support for the data transfer.
Add this property to `i2c_ctrlx` nodes in NPCKn variant SoCs.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The Analog Device AD5601, AD5611, and AD5621 devices are 8, 10 and 12
bits DAC respectively.
These devices use a 16 bits SPI communication protocol.
The 2 first bit encode the low power mode (this driver do not use the
low power mode, it always run in the 'normal' mode).
The next 14 bits contain the left aligned value. The 2, 4, or 6
remaining bits (depending on the resolution) are set to 0.
Signed-off-by: Mickael Bosch <mickael.bosch@linux.com>
When GPIO works with IOPCTL, the PIO instance offset in IOPCTL
can't be calculated easily. It should be recorded in DTS based on
SOC integration.
When IOPCTL is used, add PIO reigster address in DTS, gpio_mcux
driver will configure the PIO register based on this address.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Remove the handling of cross domain pins from nrf drivers. To use
cross domain in tests, force on constlat and disable power domains
for the test.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add more functionality in clock control driver.
Add bindings for dfll, fdpll, gclk generator, mclk cpu, osc32k, rtc clock
and xosc.
Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
Initial support Flash-LP driver for Renesas RA
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
*Separates AutAnalog and AutAnalog ADC in device tree.
*Makes AutAnalog SAR ADC a child of the AutAnalog system to reflect
hardware architecture.
*Adds binding file for AutAnalog SAR ADC driver.
Signed-off-by: John Batch <john.batch@infineon.com>
Add bindings for the power related modules. Use the bindings
Kconfig to pull in SDK drivers for cmc, spc, vbat and wuu.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This PR aligns all the bindings types for Nexus nodes.
Now all are the same as ./zephyr/dts/bindings/pwm/pwm-nexus.yaml
Signed-off-by: Kyle Bonnici <kyle.bonnici@nordicsemi.no>
Add device tree binding for HUB12 interface monochrome LED matrix
displays (32x16 pixels).
The HUB12 interface uses SPI for data transfer to shift registers,
with additional GPIO pins for row address selection (PA, PB),
output enable (PE), and data latching (PLAT).
Signed-off-by: Siratul Islam <sirat4757@gmail.com>
mcxw72 shared memory placement has been changed with MCUXSDK 25.09
update.
Moving the shared memory declaration to mcxw71 and mcxw72 specific dts
since the placement is now different.
Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
- Updated shield overlay file for RT1060 with sdio power and reset pins
- added device tree node in sdhc for sd reset pin
- added power gpio toggle logic
Signed-off-by: Abhinav Kulkarni <abhinav.kulkarni@nxp.com>
Add missing div-p division factor for pll clock and
respective tests in test/clock_control/stm32_clock_configuration
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Clocks are requested automatically by hardware on the nRF54H.
Remove additional handling from device drivers, and disable
the now unmanaged clocks in the devicetree.
Updates:
- can_nrf
- counter_nrfx_timer
- uart_nrfx_uarte
- spi_nrfx_spim
- spi_nrfx_spis
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The gpio pad groups are redundant if pin retention is handled per
pin, and the quirky cross domain feature is managed by the
application. Remove it entirely.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
All devices used in their "normal"/intended configuration do not
require management of the power domains, as the hardware itself will
request them automatically. Thus by default, don't specify the
power domains to avoid redundant resume/suspend cycles, which are
slow and require threading (IPC) making devices not isr ok.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Initial DMA support. DMA supports implementation of SSI IP but using vendor
specific DMA in the wrapper. The setup of the DMA is done in
mspi_dw_vendor_specific.h.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
MSPI slave mode is selected through devicetree using the
op-mode property. Mode selected by SSIISMST bit in the
CTRLR0 register. EXMIF can only be Master (controller).
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
enum mspi_op_mode in mspi.h has different syntax to this binding.
Aligning these will allow for cleaner code in the implmented drivers.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
