Update the Renesas RA MIPI DSI driver and bindings to align
with RA8P1 SoC support:
- Add SoC-specific PHY PLL multiplier ranges
- RA8D1: 20–180
- RA8P1: 40–375
- Correct t_init limit from 15 bits to 19 bits as specified in HUM
- Update devicetree bindings:
- Clarify `pll-div` as input frequency divisor
- Add `pll-out-div` property as output frequency divisor
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Add SCMI System Power Domain Protocol support with:
- System power state set operations
- Standard SCMI power states (shutdown, cold/warm reset, suspend)
- Graceful and forceful power transitions
- Optional NXP vendor-specific power states
- Device tree binding for "arm,scmi-system"
This enables system-wide power management through standardized
SCMI interfaces for reboot and power control operations.
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
Add resets property to lptim binding and define resets for all lptim
instances in device tree files for STM32 MCUs.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Rename the CCM memory region for STM32F3 and STM32F4 series such that the
CCM node can be used as a `zephyr,dtcm`.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Clarify the pixel-format property of a lcd-controller in order to
indicate that this is the pixel-format of data generated by the
lcd-controller, not only for a panel attached to this controller
but also for another device such as interface converter which
would be receiving the data from the lcd-controller.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Introduce test cases to the devicetree API test suite for
DT_CHILD_BY_UNIT_ADDR_INT and DT_INST_CHILD_BY_UNIT_ADDR_INT.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
1. Add power-states for MCXN23x devices
2. Add power management related device nodes to MCXN23x,
including spc, cmc vbat, and wuu.
3. Add 'zephyr,cortex-m-idle-timer' node in frdm_mcxn236.dts
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
When a different VDD_CORE level is configured in low
power modes (LP_CFG register) compared to active modes
(ACTIVE_CFG register), the LPWKUP_DELAY register must
be configured to a minimum value.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
- Added hwinfo node in the samd5xe5x.dtsi file.
- Added device tree binding file for Microchip HWINFO G1.
Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
The hwinfo driver should build inconditionally. It checks if the rstc
node is present and when CONFIG_HWINFO=y is selected by the user the
rstc information will be available. The fallback mechanism will provide
a weak implementation for all APIs that are not available.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Microchip MEC parts have a similar GPIO peripheral block. We
create a unified driver for all parts. NOTE: MEC GPIO interrupt
detection sets active status when changed from interrupt detect
disabled to any enabled mode. Driver ISR and interrupt configuration
implementation includes work-arounds for this issue.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
TSI (Touch Sensing IP) is now supported by DT
for the Kinetis KE1x family
dts: nxp_ke1xz, nxp_ke17z and nxp_ke17z512.dtsi
Tested on freedom boards
Signed-off-by: Michael Galda <michael.galda@nxp.com>
Signed-off-by: Hake Huang <hake.huang@nxp.com>
1. Fix wrong backlight pin in driver overlay
2. Remove the power-on pin configuration in code and binding, and
add mipi display panel regulator in panel overlay instead. Set
regulator-boot-on' to true means the power-on pin will be enabled
uring system boot.
3. Remove 'last_known_framebuffer' from panel data structure. It is
not used anywhere
4. Fix bug in 'co5300_set_pixel_format' function.
5. Fix the issue that the panel does not support start coordinates
and the width/height of the updated area being odd value.
Solution: In panel driver, maintain a full screen-sized buffer,
its address and pitch alignment is configurable in device tree
and shall be compliant with the display controller's requirements.
It can be placed in RAM or if the RAM space is not enough it can
also be placed in other memory resion. When there is a frame
update request, the updated area will be first filled to the
buffer, if the area's size or coordinate is odd, adjust the value
so the real updated area covers the requested updated area, then
use this buffer to send pixel to panel, this can ensure the
updated area's size and coordinate are always even.
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Adds a new property for STM32 SPI bindings to indicate which data widths
are supported by each SPI instance.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The existing device runtime PM model requires applications to call
pm_device_runtime_get()/put() on the GPIO controller device directly,
which is not ideal when GPIO ports are exposed as child nodes.
This update enables runtime PM at the GPIO port (child node) level,
allowing applications to manage power through the port devices instead
of the top-level controller.
Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
Without this clock definition, you will get compilation error
when using acmp device on board that use xg21 SoC.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
moves the fixed link functionality of the
generic ethernet phy into its own driver.
This makes both drivers more readable and
efficient.
Also makes it easier to use the normal generic
phy as a base for a vendor specific driver, as
the fixed link functionality is not needed on
them.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
The lfclk was left enabled by mistake, it has status disabled
followed by status okay a few lines down. Remove the spurious
status = "okay";
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
unify msx-gpios for step-dir drivers. tmc2209 is an exception
for now and hence migrating to m0/m1-gpios instead of msx-gpios.
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
The allowable ranges for the clock frequency and duty cycle, together
with the enabled channels, are hardware configuration parameters that
should be described in devicetree.
`pdm-dmic.yaml` is its own file to allow more complicated hardware
configurations to inherit it.
Signed-off-by: Jordan Yates <jordan@embeint.com>
It was previously possible to set output division setting
to an invalid number. These bindings ensure a valid number
is set of 0-8.
Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
Add device tree support for enabling the second low pass filter
(LPF2) for the accelerometer output.
This adds additional low pass on top of the default ODR/2 from
the LPF1 output.
Signed-off-by: Emil Hammarström <emil.a.hammarstrom@gmail.com>
