soc/mediatek/adsp: Source timer rate from DTS
These devices have an architecturally fixed 13 MHz clock device. But thankfully you can put a default into a DTS binding so we don't have to repeat it for all of them. Signed-off-by: Andy Ross <andyross@google.com>
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dts/bindings/timer/mediatek,ostimer64.yaml
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dts/bindings/timer/mediatek,ostimer64.yaml
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# Copyright 2024 The ChromiumOS Authors
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# SPDX-License-Identifier: Apache-2.0
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include: base.yaml
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# This clock hardware is almost fully described by its register block,
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# but needs a binding for the frequency property below (which is
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# architecturally fixed at 13 MHz on all known devices)
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description: MediaTek Audio DSP Core Clock
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compatible: "mediatek,ostimer64"
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properties:
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freq-hz:
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type: int
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default: 13000000
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@ -37,7 +37,7 @@ config XTENSA_TIMER
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default n
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 13000000
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default $(dt_node_int_prop_int,$(dt_nodelabel_path,ostimer64),freq-hz)
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config MAIN_STACK_SIZE
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default 2048
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