Commit graph zephyr/dts
Author SHA1 Message Date
McAtee Maxwell
6ad823ab8d drivers: pwm: add support for Infineon kit_pse84_eval
- Update the driver to support the kit_pse84_eval board
- Update to new peripheral clock allocation scheme

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
Roberto Flores
80801d81bb dts: atmel: sam0: fix dac generic clock source
Changes generic clock source for DAC in SAMD5X MCU's.
Generic clock source 0 speed is above the maximum speed
permitted by the DAC.
The generic clock was changed to the same one the ADC uses (0x2).
Compared output of working microchip auto-generated code to the zephyr
implementation to find discrepencaies in register values.

Signed-off-by: Roberto Flores <Roberto.flores@daikincomfort.com>
2025-12-16 10:14:49 -06:00
Daniel Kampert
11ff520ec7 drivers: input: cst816s: Add power management
Add power management support

Closes: #100300

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-12-16 16:08:10 +00:00
Chun-Chieh Li
d288a29979 drivers: usb: udc: numaker: support NuMaker M55M1X HSUSBD
Add support for Nuvoton NuMaker M55M1X high-speed USB 2.0 device
controller. Compared to M46X HSUSBD, M55M1X HSUSBD introduces some
differences:
- DMA must handle cache coherency because net_buf can be cache-able
- USB suspend interrupt becomes continuous. Aavoid being locked by
  this interrupt and forward this message just once
- New register bit HSUSBD_OPER_HISHSEN_Msk, which controls to enable
  USB handshake

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
e64e113700 drivers: usb: udc: numaker: support NuMaker M46X HSUSBD
Add support for Nuvoton NuMaker M46X high-speed USB 2.0 device
controller.

The code is re-organized to implement both usbd and hsusbd in single
source file. Multiple instances of either usbd or hsusbd are supported,
but usbd and hsusbd cannot support simultaneously. This limitation is
for easy implementation with just single source file, assuming that real
application just needs one usb device type.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Martin Hoff
e866da994f soc: silabs: siwx91x: remove power profile property
Power profile property doesn't need to be defined in device three.
It is a configuration value that is defined if we want pm with
Bluetooth and/or Wifi .

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-16 10:13:00 +01:00
Zhaoxiang Jin
3d8a570032 boards: frdm_mcxc444: Enable DAC for frdm_mcxc444
Enable DAC for frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-16 10:12:52 +01:00
Yongxu Wang
0910ebf469 dts: arm: nxp: add scmi system node for i.MX95 M7
Added scmi system node for NXP i.MX95 M7

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-16 10:08:45 +01:00
Yongxu Wang
2223233e98 dts: arm: nxp: add scmi system node for i.MX943
Added scmi system node for NXP i.MX943 Mcore

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-16 10:08:45 +01:00
Xavier Razavet
f6b3101db8 dts: arm: nxp: MCXW72 corrected on the lptmr clock frequency
The lptmr clock frequency was wrong and equal to 32000.
The clock frequency is 32.768KHz (32768).

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Fabrice DJIATSA
b348fd4d7a boards: st: add support for boards compatible with swap using offset
- Swap using offset requires that slot1 has one extra sector size
compared to slot0

- Additionally, add a storage partition with at least 3 sectors for
NVS if needed.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Muhammed Asif
b926d85535 dts: bindings: microchip: add tc binding for pwm peripheral
Adds binding YAML for pwm using tc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
Muhammed Asif
79d841a600 dts: arm: microchip: add dts nodes of tc peripheral
Adds binding yaml for tc peripheral
Adds the dts nodes for tc peripheral for same5xd5x series and its
default configurations.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
zjian zhang
e788c98af6 drivers: gpio: add amebadplus gpio driver
GPIO driver for amebadplus

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
53bba6df01 drivers: serial: add amebadplus loguart driver
loguart driver for amebadplus

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
d21b2aa15d drivers: pinctrl: add amebadplus pin controller driver
add amebadplus pin controller driver

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
56d6012c96 dts: arm: introduce amebadplus SOC Devicetree
add initial version of devicetree for amebadplus SOC.
amebadplus devicetree file is main platform dtsi file, which should
be included from board dts (e.g rtl872xda_evb.dts)

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
CHEN Xing
8cad3fd382 dts: arm: microchip: sam: add pit64b device to sama7g5
Add pit64b1 ~ pit64b5 counter devices to sama7g5

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
Jason Yu
c9a1e0fd91 drivers: timer: ostimer: Change to use reset API
Use reset API to reset OSTIMER for better portability.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Jason Yu
4e760db893 dts: bindings: os-timer: Add resets in device tree binding
Add resets in OSTIMER device tree binding

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Jason Yu
2bff5bdef0 dts: nxp: resets: include the reset header
Include the header so that resets can be added in
each driver node, for such platforms: mcxaxxx6, mcxa344.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Zhaoxiang Jin
864272d892 boards: nxp/frdm_rw612: Enable NXP ACOMP for frdm_rw612
Enable NXP ACOMP for frdm_rw612

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Zhaoxiang Jin
bd65e115fa drivers: comparator: add NXP ACOMP driver support
Add NXP ACOMP comparator driver support.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Farsin Nasar V A
1e510faed4 dts: arm: microchip: add RTC node for G1 IP
Add the device tree node for microchip RTC G1 IP.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 07:28:50 -05:00
Holt Sun
7214e39540 boards: nxp: frdm_mcxe247: enable CRC
Enable the CRC peripheral for MCXE24x and turn it on in the
FRDM-MCXE247 board DTS. Add a CRC sample board config to run
on FRDM-MCXE247 with default.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
6e6cc2270d dts: bindings: crc: add NXP CRC binding
Add devicetree binding for the NXP CRC controller
(compatible "nxp,crc") with required reg property.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Kyle Bonnici
bbff45f1c4 DTS: format files using dts-linter 0.3.7-hotfix2
- Ensure that properties have 2 new lines when node is above it.
- Enures that 1 new line is required between a node and #if/#ifdef...
- Enures that 2 new line are required between #endif and node.
- Wraps property values that exceed 100 characters in length.

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-12-12 15:38:31 -05:00
Marek Maškarinec
5741f3ee6b drivers: tmag5273: Add mag gain property
Adds mag-gain-correction DT property, which sets the magnetic gain
correction value. Previously a property to select the channel for gain
correction existed, but there was no way to configure the correction
value itself.

Signed-off-by: Marek Maškarinec <marek.maskarinec@hardwario.com>
2025-12-12 09:58:56 -05:00
Jason He
89d3de81e6 boards: frdm_imx93: enable USB support
Add EHCI controller configuration with dual USB instances (USB1/USB2),
device tree bindings, 8 bidirectional endpoints, and UDC workqueue
stack optimization for frdm_imx93 A55 platform.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jason He
c2b7ae10e6 drivers: usb: mcux_ehci: add clock control for i.MX 93 family
Support device tree specified clock rates for USB controller and PHY.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jisheng Zhang
1dc0e167e3 dts: arm: renesas: Add DTCM and ITCM nodes for RA8D1
Add DTCM and ITCM for RA8D1.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-12 09:58:11 -05:00
Camille BAUD
7a1e2d7509 drivers: lora: Add explicit support for variants
Add explicit support for sx1268, sx1278, llcc68

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 09:57:09 -05:00
Camille BAUD
287f40edbe drivers: lora: Add regulator-ldo for sx126x
Adds ability to set usage of LDO instead of DCDC

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 09:57:09 -05:00
Anuj Pathak
c4e857c9fd dts: i2s: add i2s node for max32655fthr
- add basic dma only i2s dts binding for max32-i2s
- add i2s node with default config to max32655.dtsi
- add i2s pin definition for max32655fthr board as per spec

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Ruibin Chang
d26ffeba9d drivers/pwm/it8xxx2: add pwm init output level property
When EC reboot, pwm pins go back to default GPI mode.
After we set pin mode to pwm mode at init(), it would
output low, so LED will be light (LED is low-activated).
And until set_cycles() is called to set output high,
then LED will be turn off the light (PWM-LED flicker).
So add the property to set PWM channel init output level.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-12-12 04:56:42 -05:00
Fabin V Martin
7b39f9ac71 dts: arm: microchip: pic32cm_jh: add sercom nodes
Add sercom nodes for pic32cm_jh

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-11 16:35:07 -05:00
Mathieu Choplain
c4d72ac549 dts: arm: st: stm32f723: disable USBPHYC by default
Like other devices, the USBPHYC should be disabled by default. Add missing
property `status` with value `disabled` on the node in DTSI.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-11 17:04:55 +01:00
Hank Wang
2ed5e0d608 dts: arm: xilinx: fix zynqmp RPU IPI mailbox base addresses
The RPU0 mailbox node in `zynqmp_rpu.dtsi` used incorrect IPI
message buffer base addresses. According to UG1085 (Table 13-3)[1],
RPU0 should use the channel 1 message buffer region at `0xFF99_0080`
for local request/response and `0xFF99_0400` for remote request/
response. The previous values pointed to the APU channel 0
buffer (`0xFF99_0200`), which does not match the hardware mapping.
The same is true for rpu1.

The IPI buffer base looks something like this:
IPI1 - 0xFF990000
IPI2 - 0xFF990200
IPI0 - 0xFF990400

Fix the DTS by updating the RPU0, RPU1 mailbox nodes to use the correct
base addresses from the documentation.

[1] https://docs.amd.com/v/u/en-US/ug1085-zynq-ultrascale-trm

Signed-off-by: Hank Wang <wanghanchi2000@gmail.com>
Signed-off-by: Harini T <harini.t@amd.com>
2025-12-11 17:04:27 +01:00
Atilla Filiz
ddd25e81e7 drivers: sensor: add ams as6221 temperature sensor driver support
The as6221 is functionally equivalent to ti tmp108 and ams as6212,
so it is added as a new variant of tmp108.

Signed-off-by: Atilla Filiz <atilla@fi-tech.be>
2025-12-11 16:58:50 +01:00
Carles Cufi
15716542c2 dts: nordic: Fix ngpios for nRF54L15 (and variants)
The correct number is 7, since the QFN52 (QGAA) variant has P0.00 to
P0.06 present. See:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html#ariaid-title6

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-12-11 05:51:32 -05:00
Jilay Pandya
83956260f7 drivers: stepper: split stepper api
- split stepper api into stepper and stepper_drv api
- stepper api now comprises only of motion control apis
- stepper_drv api comprises of apis for configuring stepper
  drivers

- add documentation about stepper and stepper_drv api
- move stepper.rst in a dedicated stepper folder
- add information about stepper_drv api and relevant functions
  in stepper documentation.

- drop motion control functions from all the stepper_drv drivers
- create a common a library for controlling stepper motors by
  toggling gpios via h-bridge or step-dir stepper_drivers

- tmc5xxx devices are a combination of motion controller and
  stepper driver devices. tmc5xxx devices need to be modelled as
  mfds in order to address the split in stepper driver subsystem

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-11 05:51:17 -05:00
cyliang tw
5c31987ce2 dts: arm: nuvoton: add PWM nodes for numaker m333x
Update m333x.dtsi to add PWM nodes for PWM driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-11 09:19:29 +02:00
Lucien Zhao
b78d150e47 dts: arm: nxp: rt700_cpu0: add uuid support
SYSCON0 IP can be accessed by CPU0, HiFi4, EZH-V, eDMA0, eDMA1.
So cm33_cpu1 can't be supported this feature.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-11 09:18:20 +02:00
Peter van der Perk
24b3ff233b gpio: mcux_rgpio: Support IRQ output select and access checks for i.MX95 M7
Support for selecting the IRQ output via the `irq-output-select` property
in devicetree. Updates interrupt configuration and ISR logic to use the
selected IRQ index. For i.MX95 M7, ensures pins and IRQs are configured
only when secure access is allowed by checking PCNS and ICNS registers.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-12-10 17:36:57 +00:00
Zhaoxiang Jin
ee2cab94d9 boards: Enable DMA on frdm_mcxc444
Enable DMA on frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Zhaoxiang Jin
a58a750336 drivers: dma: nxp: Add support for NXP 4 channel DMA driver
This commit introduces a new DMA driver for NXP platforms,
specifically supporting the MCXC/kinetis series.

Please access https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true
to download MCXC44x Sub-Family Reference Manual for more details.
DMAMUX can be found in Chapter 20 and DMA in Chapter 21.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Manojkumar Konisetty
6dfae9c9f7 dts: arm: infineon: add CY8C4147 MPN variants
Add devicetree support for CY8C4147 MPN variants including:
- AXI packages (T403-T493)
- AZI packages (T403-T475)
- AZQ packages (T415-T495)
- LQI packages (T403-T473)
- LQQ package (T493)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
69ed4fc87d dts: arm: infineon: add CY8C4146 MPN variants
Add devicetree support for CY8C4146 MPN variants including:
- AXI packages (T403, T413, T453)
- AZI packages (T403-T455)
- AZQ packages (T413, T453)
- LQI packages (T403, T413, T453)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
977f3f10ac dts: arm: infineon: add PSoC4100TP base devicetree
Add base devicetree support for Infineon PSoC4100TP series including:
- Core SoC devicetree (psoc4100tp.dtsi)
- CM0+ core configuration (psoc4100tp.cm0p.dtsi)
- Pin package variants (44-TQFP, 48-QFN, 48-TQFP, 64-TQFP)
- System clocks configuration (system_clocks.dtsi)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Jamie McCrae
949adae4f1 dts: vendor: nordic: Fix invalid nrf54lm20a partition layout
This device indicates 4KiB sector size and has an impossible
partition layout that starts part the way through a sector,
this fixes the issue by having proper partition alignment

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-10 15:45:37 +00:00