Commit graph

11,885 commits

Author SHA1 Message Date
Felix Wang
f4f295710f dts: arm: nxp: rt118x: add lpit instances for RT118X
Add lpit1, lpit2, lpit3 and all of the channels information

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-08-08 10:44:24 -05:00
Felix Wang
a717fac593 drivers: Counter: LPIT Support on Zephyr
1.Add dts bindings nxp,lpit-channel.yaml and nxp,lpit.yaml
2.Provide counter driver based on lpit driver from NXP mcux-sdk-ng

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-08-08 10:44:24 -05:00
Lucien Zhao
be0a8624d1 dts: arm: nxp: add two flexio instances for RT1180
add two flexio instances for RT1180

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-08-08 11:53:18 +03:00
Lucien Zhao
0caeac706e dts: arm: nxp: nxp_rt118x.dtsi: add ewm0 module
add ewm0 module for rt1180 platform

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-08-08 11:53:18 +03:00
Lucien Zhao
8f94c91c5b drivers: watchdog: wdt_nxp_ewm.c: add clk_sel feature for ewm IP
emw clk designed on RT1180 can be chosen by CLKCTRL register,
add code to get sel from dts and configure it in driver.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-08-08 11:53:18 +03:00
Sunil Abraham
1a6b829475 dts: arm: microchip: add uart dts node and bindings for sercom g1 IPs
Add uart dts nodes and minimal set of binding parameters
for sercom uart driver.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-08-08 11:52:35 +03:00
Mohamed Azhar
a803182169 dts: arm: microchip: add pinctrl dts node and bindings for Port G1 IP
Add pinctrl dts node and binding parameters for Microchip
Pinctrl Port G1 IP

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-08-08 11:52:35 +03:00
Sunil Abraham
5e9895153c dts: arm: microchip: add clock dts node and bindings for SAM D5x/E5x
Add clock dts node and minimal set of binding parameters
for clock_control driver.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-08-08 11:52:35 +03:00
Arunprasath P
af239ac582 dts: arm: microchip: add dtsi files for Microchip SAM D5x/E5x SoC series
Adds common and SoC-specific .dtsi files for the Microchip
SAM D5x/E5x family. These files define core peripherals,
address maps, and interrupt controller structure shared
across the SAM D5x/E5x variants.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-08-08 11:52:35 +03:00
Khoa Nguyen
5dcd9926a9 dts: arm: renesas: ra: Update the OFS defination for FSP migration
Update OFS defination to align with FSP 6.0.0

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-08-08 11:52:13 +03:00
Emilio Benavente
8d08da892c dts: arm: nxp: rt11xx: Updated ADC indexing
Updated the LPADC instance numbers in the
device tree to line up with the indexing
done in the RM.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-08-07 20:56:01 -04:00
Bastien Beauchamp
b725bd2096 dts: arm: silabs: instantiate VDAC nodes for xg2x parts
Defines a VDAC node for xg23 and xg24 parts, which are all
compatible with the silabs,vdac binding.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-08-07 20:55:50 -04:00
Bastien Beauchamp
e138061ec4 dts: bindings: dac: define silabs,vdac bindings
Defines bindings that are compatible with Silabs VDAC.
Reference your part's design book when configuring
values for the properties.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-08-07 20:55:50 -04:00
Guilherme Costa
6fd5518f48 dts: bindings: Add 'quectel,bg96'
Add a compatible for Quectel BG96 to be used in the modem_cellular
subsystem.

Signed-off-by: Guilherme Costa <guilhermecosta@stratioautomotive.com>
2025-08-07 20:54:45 -04:00
Emilio Benavente
93185f3655 dts: arm: nxp: Added flexio pwm to dts
Updated the nxp_mcxw7x dts to include a
flexio_pwm node.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-08-07 20:54:15 -04:00
Łukasz Stępnicki
a5c0ba853b drivers: clock control: ironside dvfs hsfll
Extended clock control driver to support new DVFS service
from IronSide secure domain. Added new compatible nrf-iron-hsfll-local
which can be used to enable new DVFS service support in local
domain.

Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
2025-08-07 08:58:54 -04:00
S Mohamed Fiaz
bbd9631db6 drivers: gpio: silabs: gpio driver for EFR series 2 devices
Added the gpio driver for EFR series 2 devices.

The SILABS_SISDK_GPIO symbol is added to enable
support for the new GPIO driver.
The SOC_GECKO_GPIO symbol is retained for now to
maintain compatibility with existing drivers and
will be removed in a subsequent commit.

Signed-off-by: S Mohamed Fiaz <fiaz.mohamed@silabs.com>
2025-08-07 08:58:14 -04:00
Camille BAUD
ce9e9f0a9d drivers: display: Add greyscale to SSD1322
This adds greyscale to SSD1322

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-08-07 13:16:06 +02:00
Camille BAUD
8608f09bf0 drivers: display: Various fixes and additions to ssd1322
Fixes possible init issue with unlock
Add many missing configuration settings

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-08-07 13:16:06 +02:00
Krzysztof Chruściński
71d5c0f224 dts: bindings: gpio: nrf-gpiote: Extend description
Add new feature flags to gpiote node.
Include pinctrl. Pins used by GPIOTE0 on nrf54h20/cpurad require CTRLSEL
configuration. Pins are listed using pinctrl and parsed by nrf-regtool
to prepare UICR configuration.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-08-07 13:15:45 +02:00
Krzysztof Chruściński
c72973a095 dts: vendor: nordic: nrf54h20: Add gpiote0 node
Add GPIOTE0 instance in radio peripherals.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-08-07 13:15:45 +02:00
Lucas Tamborrino
02340eec77 drivers: mbox: espressif: add esp32c6 support
Add support for esp32c6 HP and LP Core

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2025-08-07 13:15:36 +02:00
Tim Lin
f4e466eb60 drivers/espi: ite: Make ITE's eSPI driver to support PVT2 and PVT3
Make ITE's eSPI driver to support PVT2 and PVT3, but it is not
enabled by default.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-08-06 21:35:24 -04:00
James Smith
ca8d909464 soc: silabs: Add support for additional BG22 SoCs
Adds all known EFR32BG22 SoCs and associated DTS includes.

Signed-off-by: James Smith <james@loopj.com>
2025-08-06 21:34:11 -04:00
James Smith
9b32f02a0d soc: silabs: Add support for MG22 SoCs
Adds SoC definitions and DTS files for SiLabs EFR32MG22 SoCs

Signed-off-by: James Smith <james@loopj.com>
2025-08-06 21:34:11 -04:00
Arunmani Alagarsamy
a9dd0c932d drivers: wifi: siwx91x: Support max TX power configuration via Device Tree
Add support for configuring the maximum TX power for STA and AP modes using
a Device Tree property (`max-tx-power`). If unspecified, the default value
is set to 31 dBm.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-08-06 12:03:39 -04:00
Tahsin Mutlugun
814a9e6868 dts: adi: Add wut nodes to MAX32 SoCs that have wake-up timers
Add WUT support to MAX32655, MAX32666, MAX32680, MAX32690 and MAX78002
SoCs.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-08-06 12:03:12 -04:00
Tim Lin
ff293bb61a drivers/flash: it51xxx: Add the M1K flash driver
The flash M1K driver supports read (up to 1K), write (1K), and
erase (4K) operations, which can be accessed via DLM.
Accessible flash regions include internal e-Flash or external SPI
flash via FSCE# or FSCE1#.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-08-06 17:09:46 +03:00
Jisheng Zhang
13bdae0ad0 arch: arm: Add initial support for Cortex-M52 Core
Add initial support for the Cortex-M52 Core which is an implementation
of the Armv8.1-M mainline architecture.

The support is based on the Cortex-M55 support that already exists in
Zephyr.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-08-06 12:15:23 +03:00
Raffael Rostagno
916d67870d soc: esp32c2: Add BT support
Add bluetooth support to ESP32-C2 and ESP8684.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-08-06 12:10:59 +03:00
Alvis Sun
dbc49f04d7 driver: bbram: npcx: update bbram status register bit offset for npck3
Update the bit offset of bit VCC_STS in the BKUP_STS register.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2025-08-05 10:25:09 +01:00
Sebastian Głąb
ee89450165 boards: nordic: nrf54l09pdk: Remove obsolete board
Board nrf54l09pdk was renamed to nrf54lv10dk.
Remove obsolete board definition.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-08-05 10:24:48 +01:00
Sreeram Tatapudi
600e86d475 drivers: serial: Adding PDL based UART driver
Adding a basic UART driver based on the PDL API

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-08-04 19:57:57 +01:00
Sreeram Tatapudi
6928218421 drivers: Implement initial version of ifx_cat1 pdl clock_control
- Shift ifx_cat1 clock_control driver to using pdl instead of hal calls
- add soc.c file containing call to SystemInit()
- Update board's dts files
- add binding for peri divs
- update system_clocks.dtsi for psc3
- add new peri clock_control driver

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-08-04 19:57:57 +01:00
Sreeram Tatapudi
2049a8a765 dts: infineon: psc3: Adding DTS files for PSC3 series
Adding DTS files and MPN files for PCS3M5_EVK

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-08-04 19:57:57 +01:00
Vit Stanicek
f8d55770d4 dt: mimxrt798s/cm33_cpu0: Instantiate MU4
Instantiate the MU4 peripheral in SoC's DT. Enable it in board's DT.
Switch variant of the fsl_mu driver included.

The MU4 peripheral is used for IPC with the mimxrt798s/hifi4 domain.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-08-04 19:57:10 +01:00
Vit Stanicek
67100dde6c dt: mimxrt798s/cm33_cpu0: Instantiate nxp,rtxxx-dsp-ctrl
Instantiate the nxp,rtxxx-dsp-ctl
driver (nxp,rt700-dsp-ctrl-hifi4 variant) in the mimxrt798s/cm33_cpu0's
DT. Enable it in mimxrt700_evk/mimxrt798s/cm33_cpu0.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-08-04 19:57:10 +01:00
Vit Stanicek
0011e85ed3 drivers: nxp,rtxxx-dsp-ctl: Extend to mimxrt798s/hifi4
Rework the driver so that it can cover multiple variants. Add variant DT
bindings. Change the compatible name for the mimxrt685s/cm33 DT.

This needed to be done because the hardware initialisation routines
(power, clocks, ...) are different from mimxrt685s/hifi4 to
mimxrt798s/hifi4. The same is expected for the /hifi1 domain.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-08-04 19:57:10 +01:00
Vit Stanicek
7635d98bbb dt: mimxrt700_evk/hifi4: Add definitions
Add dummy interrupt controller, clock control, pin control, Flexcomm 0,
Flexcomm 2, SAI0, SAI1, SAI2 into SoC's DT. Enable relevant nodes in
board's DT and include pinctrl definitions. Add default LED and button
nodes. Set /hifi4's real frequency. Add memory nodes for device's main
SRAM.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-08-04 19:57:10 +01:00
Yongxu Wang
1e23dc0464 dts: arm: imx93_evk m33: add tpm nodes
Added all tpm nodes for imx93_evk m33

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-08-04 11:54:50 +01:00
Christoph Jans
dfb0ac3ae3 dts: silabs: Add dts and bindings for efm32pg23 and efm32pg28
Add device tree and support files for xg23/xg28 based devKit boards.

Signed-off-by: Christoph Jans <jans.christoph@gmail.com>
2025-08-04 11:53:23 +01:00
Ayush Singh
c345dffdfc dts: arm: ti: am62x_m4: Add mcu_rti0
- Add watchdog timer for mcu domain.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-08-04 11:50:20 +01:00
Ayush Singh
a86e84b85d dts: bindings: watchdog: Add TI RTI
- The compatible name is the same as used in Linux kernel
- It is the watchdog timer used in K3 generation of processors.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-08-04 11:50:20 +01:00
Michael Estes
ff222e7c12 dts: bindings: gpio: add dts binding for NXP PCAL9722 SPI GPIO expander
Add DTS binding for NXP PCAL9722 SPI GPIO expander

Signed-off-by: Michael Estes <michael.estes@byteserv.io>
2025-08-04 11:49:29 +01:00
Neil Chen
4e2b0cdf05 boards: frdm_mcxa153, frdm_mcxa156: add ostimer support
1. add ostimer support
2. update ostimer as default kernel timer

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-08-02 13:18:46 +02:00
Bas van Loon
88a09e6379 fs: Implement fstab devicetree integration for EXT2
Device tree and/or automount support was not present and might be useful
when for example the settings module needs early access to a filesystem.
This patch adds support to mount an EXT2 filesystem automatically. The
implementation chosen is to provide the drive name matching a disk
drive specified in the device tree ie on an (e)MMC or SD card.

Signed-off-by: Bas van Loon <bas@arch-embedded.com>
2025-08-02 13:18:15 +02:00
Gaetan Perrot
6c569c5bfa dts: binding: vendor-prefixes: Remove duplicate vendor prefix
The "spacecubics" entry was redundant as we use the "sc" prefix for Space
Cubics, Inc.

Removing this duplicate to avoid confusion and maintain consistency in
vendor naming.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2025-08-01 19:40:05 +01:00
Eve Redero
2fbf09372a doc: bindings: auxdisplay: add supported series
Add details on series supported by Noritake Itron driver.
Upon reading datasheets, series CU-TE, CU-Y, GU-3000, GU-7000 and
GU-D have commands matching the driver, whereas series CU-U, CU-TW,
and GU-800 use different command sets.

Signed-off-by: Eve Redero <eve.redero@gmail.com>
2025-08-01 19:38:08 +01:00
Franck Duriez
8ef13d072e driver: fuel_gauge/sy24561: add driver
Add driver for silergy sy24561 fuel gauge

Signed-off-by: Franck Duriez <franck.lucien.duriez@gmail.com>
2025-08-01 12:20:25 -04:00
Camille BAUD
bdffc08279 bflb: Make BL60x independant from SDK
Reorganize and update soc folder files for SDK-independance
Reorganize and update hal_bouffalolab files for SDK-independance
Reorganize and update soc dts files for SDK-independance
Update serial and pinctrl driver files for SDK-independance
Update ai_wb2_12f, bl604e_iot_dvk, and dt_bl10_dvk
to new bl60x support
and fixup openocd config of ai_wb2_12f

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-08-01 07:57:36 -04:00