Commit graph zephyr/dts
Author SHA1 Message Date
Ivan Pankratov
a44583c8f4 dts: bindings: Rename gpio-radio-coex to radio-gpio-coex
Rename GPIO coex binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, radio-fem-two-ctrl-pins.yaml).

Updated beacon sample overlay and coex documentation.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
6ccc58a8f6 dts: bindings: Rename generic-fem-two-ctrl-pins to radio-fem-two-ctrl-pins
Rename generic FEM binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, ble-radio.yaml).

Updated 3 board files, Nordic BLE controller HAL, documentation, and
test overlays. Added missing settle-time properties to pan1783a board.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
0aa208d51e dts: bluetooth: add base binding for BLE radio hardware capabilities
Create a shared base binding (ble-radio.yaml) for common Bluetooth LE
radio hardware capabilities to avoid duplication between vendors and
ensure consistent property naming across the ecosystem.

Properties are prefixed with 'ble-' and ordered chronologically by
Bluetooth Core Specification version (5.0, 5.1, 6.0). Each property
indicates a hardware capability, not current enablement state.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Martin Hoff
b78fe9f1aa drivers: power_domain: siwx91x: fix the link between pd and cpu state
This patch is needed to block the pm_state "PM_STATE_SUSPEND_TO_IDLE"
when a device on the power domain (actually all the peripherals) is
active. Without this patch, cpu can decide to go to deep sleep while
a peripheral is active.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Tim Pambor
19423fab21 dts: arm: st: stm32u5: Add support for vrefbuf
Add a node for the VREFBUF peripheral in the STM32U5.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
e6cefe2a58 dts: arm: st: stm32h5: Add support for vrefbuf
Add a node for the VREFBUF peripheral in the STM32H5.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
cec1861cae drivers: regulator: add stm32 vrefbuf driver
Add driver for the VREFBUF regulator found on STM32 microcontrollers.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Yangbo Lu
9229383f8a dts: arm: nxp_rt118x: add ptp clock node
Added ptp clock node.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Maureen Helm
5f33d75bce tests: lib: devicetree: Add hwspinlock dt spec test
Extends the devicetree library test to exercise the hwspinlock dt spec
macros and detect the context initializer build warning that was fixed
in commit 8b208b0d5a. Previously the build
warning wasn't reproducible in-tree.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-12-01 08:27:04 +01:00
Marek Matej
97d74795da dts: vendor: Add Espressif partition tables
Add support for bigger flash sizes.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-11-28 17:25:40 +00:00
Kyle Bonnici
b3f756e800 devicetree: format files in dts
Applying dts-linter results for files in

dts

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Guillaume Gautier
7d63600c3c dts: arm: st: f7: fix indentation for ci compliance check
Fix indentation for CI compliance check.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
85e6b867fe dts: arm: st: l1: add missing timers and fix timers5
Adds timers 6 and 7 that were missing to L1 series.
Fixes timer 5 interrupt line.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
4f278aa9c0 dts: arm: st: h7rs: add missing timers 12/13/14
Timers 12, 13 and 14 were missing in the STM32H7R/S device tree.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
3f5aa82f3e dts: arm: st: add counter support for all stm32 timers
For all existing STM32 timer nodes, add the counter node if it was missing.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Fabian Blatz
0f07faa14b drivers: input: gt911: Add touchscreen common config
Adds the touchscreen common config to the gt911 controller.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-27 16:02:13 +01:00
Arunmani Alagarsamy
e21df1fab1 dts: silabs: Add NWP boot configuration properties
Add new Devicetree properties under the SiWx91x NWP node to describe
hardware-specific boot configuration options.

The properties are documented in the SiWx91x NWP YAML binding.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-11-27 14:48:35 +01:00
Aksel Skauge Mellbye
eabde5b278 soc: silabs: Add xg24 variants
Add support for more SoC variants for xG24.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-11-27 14:45:47 +01:00
Nikodem Kastelik
ad1e5ac253 nordic: update and align to nrfx 4.0.1
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-11-27 14:45:17 +01:00
Hau Ho
51f3e6702d dts: renesas: rx: Add dts property node for SPI support on RX261
Add dts property node for SPI support on RX261

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2025-11-27 11:33:28 +01:00
Qingsong Gou
7fa0c99e4d dts: arm: sifli: add adc node
Add adc controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
Qingsong Gou
a5cd2966d3 dts: bindings: adc: add sifli,sf32lb-gpadc
Add adc controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
Khoa Tran
70eaa271f6 dts: arm: renesas: Add dts support for Renesas RA4T1 SoC series
Add dts support for Renesas RA4T1 SoC series

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Camille BAUD
ba2a602ff9 dts: bflb: Add spi nodes
Adds Node for SPI driver to bl61x and bl70x

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Qingsong Gou
615c35549e dts: arm: sifli: sf32lb: add spi definition
Add spi for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Qingsong Gou
26c0acb7c4 dts: bingdings: spi: sf32lb: add spi bingdings
Add spi controller bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
John Batch
5c2332c7d4 drivers: spi: Removing devicetree references to cat1-spi-pdl
Removing references to infineon,cat1-spi-pdl from the device tree files.
Updates the driver bindings and driver file to look at the
infineon,cat1-spi binding and uses a Kconfig option to select Legacy HAL
implementation instead.

See https://github.com/zephyrproject-rtos/zephyr/pull/98035 for context.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-26 12:13:48 -05:00
Matthias Alleman
60fd112806 drivers: ethernet: phy: phy_mii: add gpio reset
Add support for hardware reset to the phy_mii driver

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-11-26 11:05:52 +00:00
Yongxu Wang
38751613f6 dts: arm: nxp: disable gpio node for imx95 m7
Disable gpio node in imx95 m7 which not owner gpio privilege
in default system manager config, the status should be set as okay
in specific case test instead of nxp_imx95_m7.dtsi

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-26 07:09:57 +00:00
Fabin V Martin
8f23bd31e7 dts: arm: microchip: add entropy node and bindings
Add entropy node and binding parameters for microchip
TRNG entropy g1 driver

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-26 07:09:41 +00:00
Qingsong Gou
23e8e3bb3f drivers: rtc: sf32lb: add rtc alarm support
Add rtc alarm support for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-25 17:36:45 +00:00
Qingsong Gou
f730c7cdf9 dts: bindings: rtc: sf32lb: fix alarms-count missing
Add alarms-count to rtc node

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-25 17:36:45 +00:00
Pieter De Gendt
cf0d1b877e drivers: ethernet: sam_gmac: Use ethernet MAC configuration
Rework the Atmel SAM GMAC driver to read a MAC address from the provided
NVMEM cell instead of using I2C commands directly.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
509b2c4688 dts: bindings: ethernet: Add nvmem-consumer to ethernet-contoller
Turn ethernet controller devicetree nodes into NVMEM consumers. Allow
passing mac-address cells.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Haoran Jiang
5eb9d202d6 dts: arm: sifli: sf32lb52x: Improve the RCC definition for sf32lb
Add the RCC configuration
binding on the sf32lb52 platform.
- sys-clk-src
- peri-clk-src
- mpi1/2-clk-src
- A
- usb-div

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-25 16:05:46 +00:00
Gang He
4451cfc89d dts: arm: sifli: add definition for memory non-cachable
Memory used by Bluetooth LCPU should be no-cachable.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
062e223c49 dts: arm: sifli: sf32lb52x: define mailbox
Mbox is hardware interface between Application HCPU and Bluetooth LCPU.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Camille BAUD
f361d5888a dts: Add BFLB dbi nodes
Adds nodes for the DBI peripheral

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
8209c59329 drivers: dma: bflb: Update DMA to properly support device usage
Make it so you can set both address and peripheral via dma_slot

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
S Swetha
9c5f675e37 dts: x86: intel: Add wildcat lake dtsi
This commit introduces device treee source for
Wildcat Lake platform

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
78a67404f0 dts: bindings: timer: Fix HPET clock frequency property
Fix HPET Clock-frequency property in yaml file

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
d7cede7b20 dts: bindings: cpu: Add wildcat lake yaml
Add wildcat lake yaml

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
Saravanan Sekar
bcb83d5dda dts: fuel-gauge: hy4245: Add HY4245 fuel gauge
Add dts bindings for Hycon Technology HY4245 fuel gauge.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Adrian Bonislawski
af974c3074 soc: intel_adsp: ace: add IMR info registers
Adds devicetree nodes for IMR (Isolated Memory Regions)
information registers across all ACE platforms.
These registers provide information about the IMR memory region,
such as whether it is in use and its size.

Implements structures and utility functions to access
these registers and retrieve IMR information programmatically.
This allows dynamic detection of IMR availability and its size at runtime,
instead of relying on hardcoded values.

Removes the hardcoded IMR_L3_HEAP_SIZE definition since the size can now be
determined dynamically using the newly added ace_imr_get_mem_size() func.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 14:58:27 -05:00
Erwan Gouriou
47650a46bd dts: arm: st: wba6: Add missing i2c nodes
i2c2 and i2c4 were missing from soc description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-11-24 17:35:31 +01:00
Henrik Brix Andersen
0b06f2751f dts: bindings: i2c: gpio: add description for SDA/SCL pin configuration
Add recommendations for how to configure the GPIOs used as SDA/SCL pins.

Fixes: #95903

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-11-24 17:26:49 +01:00
Lucien Zhao
e1bf67139d dts: arm: nxp: add missed sub-parts dtsi files
add back missed sub-parts dtsi files for mcxe31x

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-11-24 17:23:56 +01:00
Haoran Jiang
e25f29560a dts: arm: sifli: sf32lb52x: define crc instances
Add crc device bindings for sf32lb platform

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Haoran Jiang
1a67d5753c dts: bindings: crc: sf32lb: add sifli,sf32lb-crc
Add crc device bindings for sf32lb platform

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Dave Joseph
3474deee3d drivers: firmware: Clock control TISCI driver support
Support added for clock control using TISCI for devices using the binding
ti,k2g-sci-clk. This driver relies on the TISCI layer to make calls to the
DMSC core to set and get the clock rate and retrieve clock status.

Signed-off-by: Dave Joseph <d-joseph@ti.com>
2025-11-24 17:20:24 +01:00