Commit graph

11,885 commits

Author SHA1 Message Date
Jilay Pandya
4d68fb8be5 drivers: tmc2209: use m0/m1-gpios instead of msx-gpios
unify msx-gpios for step-dir drivers. tmc2209 is an exception
for now and hence migrating to m0/m1-gpios instead of msx-gpios.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-05 10:54:41 +02:00
Jordan Yates
2ceda8506e dts: bindings: audio: common PDM channel configuration
The allowable ranges for the clock frequency and duty cycle, together
with the enabled channels, are hardware configuration parameters that
should be described in devicetree.

`pdm-dmic.yaml` is its own file to allow more complicated hardware
configurations to inherit it.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-05 10:53:35 +02:00
farsin NASAR V A
2830be0cd5 dts: arm: microchip: add RTC node and binding for G1 IP
Add the device tree node and the binding file for
microchip RTC G1 IP.

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-04 17:12:33 -05:00
Kevin Chan
203c655343 Drivers: Serial: Add PDL based UART Async. for PSE84 and PSC3
- add UART Async. driver code
- Remove references to cat1-uart-pdl from devicetree references

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-04 17:12:23 -05:00
Julien Racki
2715539964 dts: arm: st: Add the interrupt line for the IWDG
Add the interrupt line for the socs with the IWDG implemented.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-04 17:12:08 -05:00
Muhammed Asif
b70c7bb7d5 dts: arm: microchip: pic32cx_sg: add tcc node for pwm peripheral
- Adds the dts nodes for pwm driver using tcc peripheral.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-04 17:11:56 -05:00
Fabin V Martin
840a7c6955 dts: arm: microchip: add flash node and bindings
Add flash node and binding parameters for nvmctrl
flash driver

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
David Jewsbury
2a395ba0b9 dts: bindings: clock: nrf-auxpll: add out-div binding
It was previously possible to set output division setting
to an invalid number. These bindings ensure a valid number
is set of 0-8.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-04 14:04:54 -05:00
David Jewsbury
0e00299dcf dts: nrf9280: Update canpll to use frequency dts binding
CANPLL was not using the frequency binding defined in
nrf-auxpll.h

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-04 14:04:54 -05:00
Emil Hammarström
9538b4f0de drivers: sensor: lsm6dso: Add support for Accel LP filter
Add device tree support for enabling the second low pass filter
(LPF2) for the accelerometer output.

This adds additional low pass on top of the default ODR/2 from
the LPF1 output.

Signed-off-by: Emil Hammarström <emil.a.hammarstrom@gmail.com>
2025-12-04 14:02:57 -05:00
Mathieu Choplain
fdd70c3769 dts: arm: st: n6: add nodes for USB2 instance
Even though the USB driver does not support multi-instance yet, out-of-tree
or custom boards may want to use the USB2 instance instead of USB1, which
is not currently possible because its node is not declared.

Add missing USBOTGHS2 and corresponding USBPHYC2 nodes to STM32N6 series
root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:01:31 -05:00
Mohamed Azhar
d90bd3a0ed dts: arm: microchip: pic32cz_ca: Add pinctrl nodes
Adds the pinctrl node and encapsulates the port nodes within
the pinctrl node for pic32cz ca series of socs, and updates
the binding file

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-12-04 05:24:51 -05:00
Seppo Takalo
f6f4212710 drivers: modem: Implement support for RING indicator
Use ring indicator to wake up the CMUX device
from sleep.
Only used for runtime power management, but same event
could be used for initiating idle -> connected as well.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
af0a788bd8 drivers: modem: Implement runtime power management for CMUX
CMUX driver can enable the support for idle-timer in
devicetree and can be requested to shut down the pipe
during sleep.

Then UART backend put the actual device into sleep when
pipe is closed.

Waking up is requested by sending data to DLC pipe
or by manually opening the uart_pipe.
Modem may request similar wake-up by a RING interrupt which
would open the same pipe.

When UART is powered and pipe is not closed, CMUX wake-up
procedure is automatic. Either end may initiate the wake-up.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Yves Wang
e0cf011c9a dts: nxp: add edac support for MCX platforms
Add eim, erm and edac instance for frdm_mcxa153, frdm_mcxn236,
frdm_mcxn947, frdm_mcxe247 and frdm_mcxe31b.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Yves Wang
67e0217399 drivers: edac: Add NXP EDAC driver
Add edac driver for NXP's ERM and EIM peripherals. It can inject ECC
error to specific channel within EIM and then report the error address,
syndrome and count within ERM.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Mathieu Choplain
6dd9182912 dts: arm: st: stm32: u5: add U5-specific compatible on Power Controller
Add the "st,stm32u5-pwr" compatible to the Power Controller node in the
DTSI for STM32U5 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Mathieu Choplain
a49a06949c dts: bindings: pwr: add STM32U5 power controller binding
Add a binding for the power controller of STM32U5 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Alvis Sun
55156419bc drivers: sensor: npcx: add sensor v2t support for npck3
Introduces the sensor driver managing the V2T module for
temperature readout.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-12-04 05:21:24 -05:00
Alvis Sun
e69bbfc55c drivers: adc: npcx: add-v2t support for npck3
Please note that when performing conversions,
the selected channels must all be of the same type
(either ADC raw or V2T.)

Mixing ADC and V2T channels in a single conversion sequence is
not supported.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-12-04 05:21:24 -05:00
Alvis Sun
b4a9e6f0b6 drivers: adc: npcx: add adc driver support for npck3
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-12-04 05:21:24 -05:00
Maureen Helm
e76dd0c7ec dts: bindings: usb: Fix max3421e compatible to use hyphen word separator
Fixes the max3421e devicetree compatible to follow the convention of
using a hyphen rather than an underscore as the word separator.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-12-04 06:34:09 +00:00
Sylvio Alves
d14a547d42 dts/dtsi: add missing zephyr prefix for consistency
Many dts/dtsi files where its dt-bindings are in-tree
do not include zephyr prefix in the #include path.
Add it to make it consistent globally.

Some dt-bindings that resides in hal can not be changed.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-03 15:38:17 -05:00
Rahul Gurram
e02845b7cb drivers: wifi: siwx91x: To improve SiWx91x performance
To enhance throughput performance on the SiWx91x series, Added
some Siwx91x configurations by deafult.

Signed-off-by: Rahul Gurram <rahul.gurram@silabs.com>
2025-12-03 10:40:10 -05:00
Fin Maaß
0e0ff29121 drivers: regulator: Add TI tps55287
Add regulator driver for TI TPS55287 buck-boost

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-03 09:13:45 -05:00
Stanislav Bobokalo
f16f13d9e8 dts: renesas: fix syntax error in multiple DTS/DTSI files
Properties in bclk nodes were defined after the bclkout subnode,
disk subnode was defined before properties in a few boards DTS files
which violates the Devicetree Specification v0.4, section 6.3:

"Nodes may contain property definitions and/or child node definitions.
If both are present, properties shall come before child nodes."

This caused the Device Tree Compiler error:
"Properties must precede subnodes. Unable to parse input tree"

This commit moves nested nodes after properties,
fixing the syntax error and ensuring compliance with
the Devicetree Specification.

Signed-off-by: Stanislav Bobokalo <stanislav.b@embedd.it>
2025-12-03 09:12:00 -05:00
Michał Stasiak
cb7433bc72 dts: bindings: arm: add binding for Nordic TAMPC
Added dts binding for Nordic Tamper Controller with
property to configure SWD pins as GPIOs.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:11:50 -05:00
Tony Han
c1251176fb dts: arm: microchip: sama7g5: add the node for SHA
Add the node for Secure Hash Algorithm (SHA) to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
ff8acc2d7a dts: bindings: crypto: add microchip,sha-g1-crypto.yaml
Add microchip,sha-g1-crypto.yaml for Secure Hash Algorithm (SHA)
controller.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
05ef041359 dts: arm: microchip: sam: reorder the nodes by address in sama7g5.dtsi
Update the soc nodes in sama7g5.dtsi by address ascending order.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Sunil Abraham
236589252e dts: clock: PIC32CM_JH: Add clock control driver bindings
Add bindings for dfll, fdpll, gclk generator, mclk cpu, osc32k, rtc clock
and xosc.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-12-03 09:10:52 -05:00
Haoran Jiang
f71beede1a dts: bindings: pinctrl: Modify pinmux binding definitions in sf32lb
- Add sifli and analog definitions
- Modify the drive-strength definition to use the original register
    definition instead of the physical current value, as different I/O
    pins may have different definitions

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-03 11:44:28 +01:00
Scott Worley
e9e8d1ee52 dts: arm: microchip: mec: Add MEC165xB chip device tree files
We add MEC165xB chip device tree files. We are sharing the
same base mec5.dtsi which required modifications due to
peripherals not present in MEC165xB.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-02 18:41:18 -05:00
Ibrahim Abdalkader
78429c804b dts: arm: st: h7: delete ITCM/DTCM nodes from M4 devicetree
Delete the ITCM and DTCM nodes from all M4-specific devicetree.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-12-02 18:40:42 -05:00
Ibrahim Abdalkader
a794f8eb8b dts: arm: st: h7: add ITCM and DTCM memory regions for STM32H7
Add ITCM and DTCM memory region definitions to the common STM32H7
devicetree.

ITCM: 64 KB @ 0x00000000
DTCM: 128 KB @ 0x20000000

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-12-02 18:40:42 -05:00
Camille BAUD
05520bcf9f dts: bflb: Enable Flash Controller
Enable the Flash Controller

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-02 15:23:13 -05:00
McAtee Maxwell
61100bb14f drivers: clock_control: bugfix pse84 frequencies by fixing dpll support
- fix dpll_hp support
- add dpll_lp support for kit_pse84_*
- update kit_pse84_eval dts for dpll fixes
- update kit_pse84_ai dts for dpll fixes

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-02 15:23:03 -05:00
McAtee Maxwell
95184d330d drivers: clock_control: bugfix frequency on psc3 by adding dpll support
- add dpll_lp support to infineon clock_control drivers
- update psc3 dts for fix

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-02 15:23:03 -05:00
Raffael Rostagno
b3d34a20f6 drivers: sensor: dietemp: esp32: Update driver
Update driver to new version, from legacy driver.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-12-02 15:22:30 -05:00
Stoyan Bogdanov
641ec27106 drivers: sensor: rv3032c7: Add temperature sensor driver for rv3032
Expose internal temperature sensor for rv-3032-c7. Driver is reporting
temperature from internal deice sensors and have HIGH an LOW temperature
treshhold which are triggering interrupts. I2C communication and IRQ are
handled from parent MFD driver.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
5028aa4036 drivers: counter: rv3032c7: Add rv3032 counter driver
Expose timer functionality from rv-3032-c7 via counter api.
I2C communication and IRQs are arbitrated via MFD parent driver
for rtc, sensor and counter at once.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
1a93d33d29 drivers: rtc: rv3032: Rework driver to use MFD driver
Rework rv3032 implementaion to use MFD driver unstead of local
implementaion for I2C access and Interrupt managements. This way
could be utilized parts which are not implemented because did not fit
in to RTC api - counter and temperature sensor. To have propper
sincronization arbitration is need which is handled from mfd_rv3032.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
c7bf6e83d6 dts: bindings: rv3032: Remove backup from rtc driver
Remove backup flag from RTC driver and move it to parent instead.
RTC driver still can access the values of the flags but MFD need
to know what is expected in term of initial behaviour.
Some assumptions done in RTC driver are causing inconsistant behaviour.
We cannot assume that the RTC alarms and notifications need to be
cleaned only if POR bit is triggered. We can have situation where
whole system go throigh soft restart and need to zero RV3032, so driver
need to have option to allow that kind of behaviour.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
f39882472a dts: bindings: rtc: Update rv3032 bindings
Remove gpio-int since interrupts will be managed from MFD driver
insted, acticting like dispatcher for interrupts.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
4d1713a07e drivers: mfd: rv3032: Add MFD driver for rv3032
Add MFD driver for managing rv3032 functionality which did not fit RTC
api. That way are implemented part which otherwise will not be used:
- RTC
- counter/timer
- temperature sensor

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Mathieu Choplain
c30fd6e3e4 dts: arm: st: *: use lowercase hex for vrefint-cal-addr property
Update all `vrefint-cal-addr` properties in STM32 DTSI to comply with DTS
Coding Style which says that "hex values in properties should use lowercase
hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Mathieu Choplain
e9e1d12496 dts: arm: st: *: use lowercase hex for dietemp cal-addr properties
Update all `cal-addr` properties in STM32 DTSI to comply with DTS Coding
Style which says that "hex values in properties should use lowercase hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Mathieu Choplain
9176880f25 dts: arm: st: *: use lowercase hex for reg property
Update all `reg` properties in STM32 DTSI to comply with DTS Coding Style
which says that "hex values in properties should use lowercase hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Yasushi SHOJI
912dd66608 boards: sc: Add SC-OBC module V1 support
Add initial board support for the Space Cubics SC-OBC Module V1. The
hardware is based on an AMD Versal AI Edge VE2302 and a Microchip
IGLOO2. This Zephyr port runs on the Versal device’s Real-Time Processing
Unit (dual Arm Cortex-R5F).

This commit is the first in the series and only supports the basic devices
needed to run samples/hello_world and samples/philosophers. Specifically,
it adds the Cortex-R5F, UARTs, and the GIC interrupt controller.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2025-12-02 16:15:49 +00:00
Erwan Gouriou
eefebb4555 dts: stm32l4: Clean up comment from can nodes
Remove use less comments

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-12-02 16:15:29 +00:00