The edma0 interrupts list had 16 entries (IRQs 0-15) but
was missing DMA_ERROR_IRQn (IRQ 16). The eDMA driver treats
the last entry as the error IRQ, so IRQ 15 (DMA15_DMA31
transfer-complete) was misused as the error handler. This
broke DMA channels 15 and 31 entirely.
Add <16 0> as the 17th entry.
Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
Add the CRC peripheral to DTSI of STM32 SoCs.
(Note: CRC is not added to SoC series STM32F1, STM32F2, STM32F4, STM32L1
and some STM32F0 SoCs because their CRC peripheral is not supported by
the driver due to HW limitations - this matches the binding's description)
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add a binding for the STM32 CRC calculation unit. Note that this binding
only covers the programmable variant of the CRC peripheral: the older CRCv1
found in series such as STM32F1/F2/F4/L1 and some STM32F0 products is not
supported due to HW limitations.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Create a dts property specifying clock tolerance and add it
to affected i2c instances. The property is to be used in
the i2c driver to ensure the actual SCL frequency does not
exceed the value in "clock-frequency".
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Add all device nodes for flexcan on i.MX 943 A55 platform.
Signed-off-by: Jianchao Wang <Jianchao.wang_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Removes resource reservation for cpuflpr from the cpuapp build and
only applies it when either of the flpr snippets are used
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Track success explicitly and only report timeout when no matching PHY ID
was found after all retries.
Extend the Motorcomm YT8521 PHY driver to support YT8531 chip.
The YT8531 is compatible with YT8521 and shares the same register
layout and configuration interface.
- "motorcomm,yt8521" for YT8521
- "motorcomm,yt8531" for YT8531
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add device tree for STM32C5 series, including all SoCs,
all GPIOs and (LP)U(S)ART nodes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Define the HCI node in the SoC series' dtsi.
- Adjust main thread stack sizes and buffer counts required
for Blutooth operation.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
Added Silabs Kconfig support for counter driver and implemented the
counter APIs using protimer underneath.
Signed-off-by: sree sreerajatha <sree.sreerajatha@silabs.com>
Remove ranges property in partition node for rtl8752h, otherwise
the CONFIG_FLASH_LOAD_OFFSET would be wrong.
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
Switch the common keyboard matrix binding to use microseconds for its
polling interval properties.
Rename the properties and change their units:
- poll-period-ms -> poll-period-us
- stable-poll-period-ms -> stable-poll-period-us
Devicetrees must update the property names and convert
values from milliseconds to microseconds.
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
- Removes the unused items from the device structures for peri clock.
- Removes the now unused `resource-type`, `resource-instance`, and
`resource-channel` binding properties.
- Updates the Migration Guide with removed binding properties.
- Remove the binding properties from board, samples, and test overlays.
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
Add Third Reality, Inc. to the devicetree vendor prefix registry
for use with ThirdReality board definitions.
Signed-off-by: Camille BAUD <mail@massdriver.space>
Fixes the mix-up of HCLK and SYSCLK in h7 clock driver and also makes sure
to calculate the correct startup frequency:
- Take care of bootloader might already have configured clocks instead of
relying on #defines/dts).
- Use HAL HSI_VALUE instead of STM32_HSI_FREQ which can be 0 if hsi node
is disabled in DT (but is default on after reset...)
Also move calculation of old_hclk_freq above set_up_plls() during
stm32_clock_control_init(), which can change the current clock setting and
make it impossible to get the previous clock.
Remove not needed special handling for h7rsx controllers.
Add a comment to the clk_hsi node in the h7x / h7rsx DT stating that the
clock is enabled by default after reset.
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
Nordic's nPM10 Series PMIC Multi-function Device devicetree properties and
driver.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Introduce the new stm32h5e4, stm32h5e5, stm32h5f4, stm32h5f5 mcu
The Xj variant has 4MB of internal flash whereas the Xk variant has 3MB.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add Silabs General GPCRC driver for Series 2 boards
Enable crc sample and test cases for Silabs series 2
Tested on real boards and compared result with all CRC16
and CRC32-IEEE algorithm
Signed-off-by: Phuc Hoang <donp172748@gmail.com>
Increase SCMI shared memory region from 256 bytes to 4KB to support
larger SCMI message payloads required for clock and power domain
operations.
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
Add support for SCMI transport layer using ARM SMC (Secure Monitor
Call) as the doorbell mechanism with shared memory for data transfer.
Communication is performed synchronously so polling is the only
supported mode. The implementation follows the SCMI specification
for SMC/HVC based transport.
Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
PHY and controller function depends on VREGUSB. Add VREGUSB regulator
node to nRF54LM20A and use phandle to reference it in the wrapper node.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add driver for internal voltage regulator for the USB signaling
interface.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Co-Authored-by: Carles Cufi <carles.cufi@nordicsemi.no>
We need to describe the wrapper separately as a parent node because it
is not part of the USB controller but is used to configure, control, and
enable/disable the USB PHY, and to enable/disable USB controller.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
When lptmr0 is reserved as the system timer, the MCXW IEEE 802.15.4
radio cannot rely on a separate counter device being instantiated for it.
The fallback to the kernel cycle counter is also not a valid replacement
for hardware timestamping in all timer configurations.
Add a counter phandle to the MCXW binding, wire the MCXW7x boards in scope
to use lptmr1 as a dedicated non-system-timer counter, and make the driver
consume that devicetree-provided counter directly.
This keeps the fix narrow to the boards enabled in this PR while removing
the fragile hard-coded lptmr0/lptmr1 selection logic.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Adds default partitioning bl_storage UICR areas which can be used
for bootloader storage purposes
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add initialization of critical components for the RTL8752H
series.
Key initializations include:
- Realtek OS abstraction layer.
- Clock active mode settings.
- Power Management (PM).
- PHY modules.
- Bluetooth controller ROM initialization.
Note: A mechanism is introduced to synchronize the RAM Vector Table between
Realtek's ROM code (which writes raw ISRs) and Zephyr's interrupt
management subsystem (sw_isr_table).
Signed-off-by: Zhiyuan Tang <zhiyuan_tang@realsil.com.cn>
