Adds devicetree nodes for IMR (Isolated Memory Regions)
information registers across all ACE platforms.
These registers provide information about the IMR memory region,
such as whether it is in use and its size.
Implements structures and utility functions to access
these registers and retrieve IMR information programmatically.
This allows dynamic detection of IMR availability and its size at runtime,
instead of relying on hardcoded values.
Removes the hardcoded IMR_L3_HEAP_SIZE definition since the size can now be
determined dynamically using the newly added ace_imr_get_mem_size() func.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Support added for clock control using TISCI for devices using the binding
ti,k2g-sci-clk. This driver relies on the TISCI layer to make calls to the
DMSC core to set and get the clock rate and retrieve clock status.
Signed-off-by: Dave Joseph <d-joseph@ti.com>
MAX32657 NS does not have access to the flash peripheral, so ensure the
placeholder flash controller node is disabled, and update the "storage"
node in the evkit board definition to properly document its use for TFM.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Removes differentiation between pdl and hal based drivers from device
tree. This differentiation is now done as a Kconfig option.
Signed-off-by: John Batch <john.batch@infineon.com>
Remove the ext_memory: memory@70000000 node as the external flash memory
is part of the board design. The nucleo_h7s3l8 and stm32h7s78_dk boards
already have this node.
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
Add GPT timer nodes to support system tick and counter functionality:
- gpt_hw_timer1/2/3: System timers for M33/M7_0/M7_1 cores
- gpt4: General purpose timer/counter
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
Fix Device Tree formatting issues to comply with Zephyr coding style
guidelines for i.MX943 EVK board and dts files
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
Commit 08fedb4a80 ("drivers: uart: npcx: add asychronous API support")
missed updating the clocks for uart2. This patch fixes it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree, and update all boards according to new
mechanism.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree.
Set the LDO as default to reduce out-of-tree breakage - most users were
relying on LDO being the default and it is harmless to use LDO if board
is designed for SMPS. (Existing SMPS users should break anyways since the
Kconfig symbol no longer exists, but this ensures they actively set the
power supply to SMPS in DT)
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Introduce power controller binding for series equipped with two voltage
regulators (LDO + SMPS).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add node representing the Power Controller to SoC DTSI of STM32H7RS series,
and update DTS of all STM32H7RS-based boards since the new node has
required properties.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Add node representing the Power Controller to SoC DTSI of STM32H7 series,
and update DTS of all STM32H7-based boards since the new node has required
properties.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
- Add support for chaining multiple 32x16 panels horizontally by
setting width to multiples of 32 (64, 96, 128, etc).
Signed-off-by: Siratul Islam <email@sirat.me>
When using an stm32 in a bridge circuit with complementary outputs,
the deadtime needs to be configurable to avoid shoot-thru current
on the circuit. So, the HAL has the configuration in the BDTR init
and use that api access to set the configuration.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Adding new MPN files for B1 part revision.
Updating existing parts to be consistent with changes made for other new
devices (PSOC Edge, PSOC Control C3).
Signed-off-by: John Batch <john.batch@infineon.com>
Renames mpn device tree files to lowercase for consistency with other
devices.
Removes incorrect mpn and package devicetree files.
Signed-off-by: John Batch <john.batch@infineon.com>
Remove the `nxp,flexcan-fd` compatible property from flexcan2 node
for S32K146, keeping only `nxp,flexcan`. The FlexCAN2 instance on
S32K146 does not support CAN FD functionality, unlike flexcan0 and
flexcan1.
Signed-off-by: William Tang <william.tang@nxp.com>
Despite the datasheet stating otherwise, the Pinnacle based trackpads can
have their X/Y data inverted when operating in relative mode, so set those
configs in all modes during init.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Calibration interval was specified in Kconfig now
configuration is moved to device tree.
This allows to have different values for RCX and RC32K.
While calibration is vital for correct system timing, it
periodically schedules work that measures frequency of RCX or
RC32K.
Now it's also possible to set calibration interval to 0
to prevent calibration entirely. This may be useful for
scheduling tests that are sensitive to number of active
threads.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
This patch refactors the power management initialization for the Intel
ADSP power domain driver to align with the recommended practices
outlined in the documentation. The changes include:
1. Replacing the manual power management initialization sequence
(`pm_device_init_suspended` + `pm_device_runtime_enable`) with a call
to `pm_device_driver_init` in the `pd_intel_adsp_init` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the power
domain nodes in the device tree files for ACE15, ACE20, ACE30, and
ACE40.
These changes ensure that the power domain driver is initialized with
the appropriate power management state and that runtime power management
is automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The LPIT is missing in nxp_mcxe24x_common.dtsi,
this patch add lpit 0 address, registers, interrupts
and channel setting.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Add Cortex-A320 support to the unified FVP board structure with ARMv9.2-A
specific configuration parameters.
New board target:
- fvp_base_revc_2xaem/a320
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add ARMv9-A architecture support with Cortex-A510 CPU as the default
processor for generic ARMv9-A targets.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add a new PM CPU ops driver for Arm Fixed Virtual Platform (FVP) that
enables bare metal SMP support without Arm Trusted Firmware (ATF).
The driver provides CPU power-on and system reset operations by directly
interfacing with FVP's power controller (PWRC) and V2M system registers.
The implementation includes RVBAR_EL3 configuration to redirect
secondary CPU reset vectors to Zephyr's image header, enabling
proper SMP initialization without firmware assistance.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
After trying out a few different approaches, I think having separate
nodes for each bank in devicetree and having a GPIO proxy node for the
controller is the best solution right now.
To be more specific, GPIO proxy solution still allows for bank level
GPIO toggling. The linux kernel GPIO davinci driver is currently limited
to single pin operations. This might not be a problem in Linux, but I
feel like embedded systems would prefer having support for bank level
operations.
This also does not pose a problem for the future implementation of
interrupts due to that fact that the interrupt router is separate device
and will require a separate driver. In fact, the GPIO interrupt router
is shared between main_gpio0 and main_gpio1.
This patch also reverts the previous bank offset related work on GPIO
davinci driver.
The patch has been tested on PocketBeagle 2.
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
