Use devicetree to provide the system clock frequency for S32K3
instead of hardcoding it in board defconfigs.
- Add clock-frequency to /cpus/cpu@0 in nxp_s32k344_m7.dtsi using
DT_FREQ_M(160).
- Define DT_SYSCLK_PATH and derive SYS_CLOCK_HW_CYCLES_PER_SEC from
the sysclk node via dt_node_int_prop_int() when CORTEX_M_SYSTICK.
- Remove CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC from mr_canhubk3
This keeps the clock configuration in a single SoC-level place,
aligns S32K3 with other NXP Cortex-M SoCs, and ensures both the
MCUboot and application builds share the same
SYS_CLOCK_HW_CYCLES_PER_SEC.
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
Introduce DT bindings for on-chip C40 flash and its controller
and describe their corresponding nodes in nxp_s32k344_m7.dtsi.
- Binding: dts/bindings/mtd/nxp,c40-flash.yaml
Erase/write block sizes.
- Binding: dts/bindings/flash_controller/nxp,c40-flash-controller.yaml
Describe flash device (child) ranges
- SoC nodes: With the new compatible and geometry
properties. Keep status = "disabled" at the SoC level
so boards opt-in.
This prepares the platform for using Zephyr’s flash API / FLASH_MAP /
MCUboot with internal code flash.
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
Add device tree node for MU instances that will be used by HSE and RTU
for s32z270.
Add support hash crypto for NXP S32 with Algo 2:
SHA224, SHA256, SHA384 and SHA512.
Add support cipher crypto with ECB, CBC and CTR mode by using ram key
catalog.
Add support 128/256 bits ram key length.
Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
The INA232 is another device in the INA2XX family and is very similar
to the already implemented INA230 and INA236. The main difference
between the INA232 and the INA236 is that the INA232 does not have a
Device ID register. Because of these similarities, it is implemented
in the ina230.x files in the same way as the IN236. Modifications to
the corresponding tests are included as well.
Signed-off-by: Johannes Meyer <johannes.meyer@intego.de>
Add the support of the mailbox IPCC1 for communication between
the Cortex-M33 and the Cortex-A35
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
On the STM32MP2 series, the IPCC clock is managed at the system
level by the CPU responsible for system configuration.
In topologies where the Cortex-M33 acts as a companion processor, it
cannot enable the IPCC clock.
This update makes the IPCC clock optional in both the device tree
and the driver.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Rename GPIO coex binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, radio-fem-two-ctrl-pins.yaml).
Updated beacon sample overlay and coex documentation.
Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
Rename generic FEM binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, ble-radio.yaml).
Updated 3 board files, Nordic BLE controller HAL, documentation, and
test overlays. Added missing settle-time properties to pan1783a board.
Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
Create a shared base binding (ble-radio.yaml) for common Bluetooth LE
radio hardware capabilities to avoid duplication between vendors and
ensure consistent property naming across the ecosystem.
Properties are prefixed with 'ble-' and ordered chronologically by
Bluetooth Core Specification version (5.0, 5.1, 6.0). Each property
indicates a hardware capability, not current enablement state.
Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
This patch is needed to block the pm_state "PM_STATE_SUSPEND_TO_IDLE"
when a device on the power domain (actually all the peripherals) is
active. Without this patch, cpu can decide to go to deep sleep while
a peripheral is active.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Extends the devicetree library test to exercise the hwspinlock dt spec
macros and detect the context initializer build warning that was fixed
in commit 8b208b0d5a. Previously the build
warning wasn't reproducible in-tree.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Add new Devicetree properties under the SiWx91x NWP node to describe
hardware-specific boot configuration options.
The properties are documented in the SiWx91x NWP YAML binding.
Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Removing references to infineon,cat1-spi-pdl from the device tree files.
Updates the driver bindings and driver file to look at the
infineon,cat1-spi binding and uses a Kconfig option to select Legacy HAL
implementation instead.
See https://github.com/zephyrproject-rtos/zephyr/pull/98035 for context.
Signed-off-by: John Batch <john.batch@infineon.com>
Disable gpio node in imx95 m7 which not owner gpio privilege
in default system manager config, the status should be set as okay
in specific case test instead of nxp_imx95_m7.dtsi
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
Rework the Atmel SAM GMAC driver to read a MAC address from the provided
NVMEM cell instead of using I2C commands directly.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
