Add devicetree binding for the Bouffalo Lab BL70x USB 1.1 Full-Speed
device controller and define the USB peripheral node in bl70x.dtsi.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Set cpu-buffer-stall property on the BL70x USB peripheral node to
ensure proper buffer alignment for DMA transfers.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Extended ADT7420 driver to support:
- extend dtbindings for comprehensive configuration control
- Support 13-bit and 16-bit ADC resolution
- extend Sensor API support
- extend interrupt support to include CT pin
Signed-off-by: Jan Carlo Roleda <jancarlo.roleda@analog.com>
Nordic's nPM10 Series PMIC Sensor Devicetree bindings and minimal driver
supporting only battery current, voltage and temperature measurements.
Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
Adds CAN RX-TX pin definitions to the CYW20829 package dtsi files where
supported.
Adds canfd0 wrapper and can0/can1 channel nodes to cyw20829.dtsi.
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
DeviceTree:
- Adds CAN RX-TX pin definitions to the PSE84 package dtsi files where
supported.
- Adds canfd0 wrapper and can0/can1 channel nodes to the pse84.dtsi and
pse84_s.dtsi files.
- Adds m55 core overrides for can interrupts.
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
Adds the following bindings:
- infineon,canfd-controller: Wrapper node for shared CAN controller
registers. Includes timestamp-counter and ecc-enabled properties
for enabling a global timestamp counter and ECC.
- infineon,can: Individual CAN channels, an extension of the
bosch,m_can-base.
DeviceTree:
- Adds CAN RX-TX pin definitions to the PSC3 package dtsi files where
supported.
- Adds canfd0 wrapper and can0/can1 channel nodes to the psc3.dtsi and
psc3_s.dtsi files.
Extends work started by Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Co-authored-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Co-authored-by: John Batch <john.batch@infineon.com>
Assisted-by: GitHub Copilot:claude-opus-4.6
Signed-off-by: John Batch <john.batch@infineon.com>
Add a regulator driver for the internal general-purpose LDO channels
found in some Espressif SoCs. These LDO channels can supply power to
internal and external peripherals such as SPI flash and PSRAM.
The driver supports:
- Enable/disable LDO output channels
- Continuously adjustable voltage from 500mV to 2700mV
- Rail bypass mode at 3300mV
- Standard regulator device tree properties (boot-on, always-on, etc.)
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Implement a device driver for XSPI manager.
This allows to define the xspi controllers configuration that should
be applied towards the xspi IO ports:
- Muxed
- Swapped
- ...
Since its configuration has impact on final application location and
implies the deactivation of xspi clocks, it should be run only at fsbl
stage and not later.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The driver implements the QEMU ramfb as a framebuffer-based display.
It only implements the basic capabilities necessary (ARGB8888) with
resolution configurable via DTS. For initialization it uses the fwcfg
driver.
Signed-off-by: Maximilian Zimmermann <gitmz@posteo.de>
1. Keep drivers/timer/cortex_m_systick.h as a compatibility
shim for legacy Cortex-M-specific names.
2. Switch to use the generic low-power companion timer API
for the Cortex-M SysTick driver.
3. Mark the global CORTEX_M_SYSTICK_LPM_* kconfig options
as 'DEPRECATED' and replace them with SYSTEM_TIMER_LPM_*
4. Rename 'zephyr,cortex-m-idle-timer' to
'zephyr,system-timer-companion'
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
NXP MCXL25x SoCs are not supported.
Add initial dts with peripherals needed for
Hello World and GPIO examples on cpu0 only.
Aon domain clock controls are modeled by fixed-clock
for the initial enablement. The aon clock configuration
corresponds default clock configuration.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Add all device nodes for flexcan on i.MX 95 A55 platform.
Signed-off-by: Jianchao Wang <Jianchao.wang_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Properly declare the io-channel-cells for the samd5x DAC binding for use
with the DAC DT spec helpers.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Properly set #io-channel-cells = <1> for the NXP GAU DAC driver, which does
in fact support output channel binding.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add the ability to specify channel details in devicetree, and enhance the
DAC API to support a new struct dac_dt_spec with corresponding DT helper
functions:
- dac_channel_setup_dt
- dac_write_value_dt
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add the flash controller node to the psoc4100smax SoC DTSI, wrapping
the existing flash0 node as a child of the controller. This mirrors
the structure already present in psoc4100tp.dtsi.
The flash controller is at CPUSS_BASE + 4 (0x40100004), with register
size 0x104, matching the psoc4100tp. The write-block-size and
erase-block-size are both 256 bytes, confirmed by
CPUSS_SPCIF_FLASH_PAGE_SIZE=3 in the HAL device config header.
This enables the FLASH_INFINEON_PSOC4 Kconfig option for boards
using the psoc4100smax SoC, such as the CY8CKIT-041S-MAX.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Add devicetree source files, clock definitions, interrupt mapping,
GPIO signal map, and pin control bindings for ESP32-C5.
Also add 8 MB flash partition layout with 0x2000 offset and extend
the espressif,riscv CPU binding to accept 48 MHz XTAL frequency.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Adds the support of timers for STM32C5. This includes all timer instances
for the series, and the support of the counter, PWM and QDEC drivers.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add timer subnodes under the MAX32657 Wake‑up Timer device nodes to
enable system timer configuration in devicetree.
Also set default SYS_CLOCK_TICKS_PER_SECOND to 8192 if Wake-up Timer is
selected as system timer.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Introduce a system timer driver that uses the MAX32 Wake-up Timer as the
system tick source. This enables the MAX32 SoC family to use the WUT for
kernel timing operations.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Add an HCI driver for the BL702 on-chip BLE controller. The controller
is a precompiled binary blob communicating via vendor on-chip HCI
functions (bt_onchiphci_send/bt_onchiphci_interface_init).
The driver:
- Translates between Zephyr HCI net_buf and the vendor's internal
packet structures for both TX (commands, ACL data) and RX (events,
ACL data)
- Uses a dedicated RX thread with FIFO+semaphore to dequeue messages
from the controller callback (which may run in ISR context)
- Reads the BLE MAC address from eFuse during initialization
- Supports multiple controller binary variants via Kconfig choice
(peripheral-only, multi-role, observer, etc.)
- Provides proper open/close lifecycle with RX queue draining
Also adds the DT binding (bflb,bl70x-bt-hci) and a bt-hci node in
the BL70X SoC dtsi (disabled by default).
Signed-off-by: William Markezana <william.markezana@gmail.com>
# Conflicts:
# drivers/bluetooth/hci/CMakeLists.txt
Add driver for the QST QMI8658A 6-axis inertial measurement unit
with accelerometer and gyroscope. Supports I2C bus, configurable
full-scale range and ODR via devicetree, temperature readout, and
optional data-ready interrupt trigger on INT2.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Add QST Corporation to the list of known vendor prefixes. This is
needed for the QMI8658A IMU sensor driver.
Signed-off-by: William Markezana <william.markezana@gmail.com>
