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soc: nordic: Remove the nRF54L15 EngA

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The production version of the nRF54L15 SoC is now available, so remove
the initial Engineering A (EngA) preview version.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This commit is contained in:
Carles Cufi 2024-10-16 22:06:22 +02:00 • committed by David Leach
commit 51c1e45301
17 changed files with 5 additions and 3476 deletions
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5
drivers/mbox/mbox_nrf_vevif_event_rx.c
View file

@ -10,13 +10,8 @@
#include <haly/nrfy_vpr.h>
#if defined(CONFIG_SOC_NRF54L15_ENGA_CPUAPP)
#define EVENTS_IDX_MIN 11U
#define EVENTS_IDX_MAX 17U
#else
#define EVENTS_IDX_MIN NRF_VPR_EVENTS_TRIGGERED_MIN
#define EVENTS_IDX_MAX NRF_VPR_EVENTS_TRIGGERED_MAX
#endif
/* callbacks */
struct mbox_vevif_event_rx_cbs {

4
drivers/mbox/mbox_nrf_vevif_event_tx.c
View file

@ -12,11 +12,7 @@
#include <hal/nrf_vpr_csr.h>
#include <hal/nrf_vpr_csr_vevif.h>
#if defined(CONFIG_SOC_NRF54L15_ENGA_CPUFLPR)
#define EVENTS_IDX_MAX 17U
#else
#define EVENTS_IDX_MAX NRF_VPR_EVENTS_TRIGGERED_MAX
#endif
#define VEVIF_EVENTS_NUM DT_INST_PROP(0, nordic_events)
#define VEVIF_EVENTS_MASK DT_INST_PROP(0, nordic_events_mask)

5
drivers/mbox/mbox_nrf_vevif_task_rx.c
View file

@ -12,13 +12,8 @@
#include <hal/nrf_vpr_csr.h>
#include <hal/nrf_vpr_csr_vevif.h>
#if defined(CONFIG_SOC_NRF54L15_ENGA_CPUFLPR)
#define TASKS_IDX_MIN 11U
#define TASKS_IDX_MAX 17U
#else
#define TASKS_IDX_MIN NRF_VPR_TASKS_TRIGGER_MIN
#define TASKS_IDX_MAX NRF_VPR_TASKS_TRIGGER_MAX
#endif
#define VEVIF_TASKS_NUM DT_INST_PROP(0, nordic_tasks)
#define VEVIF_TASKS_MASK DT_INST_PROP(0, nordic_tasks_mask)

4
drivers/mbox/mbox_nrf_vevif_task_tx.c
View file

@ -10,11 +10,7 @@
#include <haly/nrfy_vpr.h>
#if defined(CONFIG_SOC_NRF54L15_ENGA_CPUAPP)
#define TASKS_IDX_MAX 17U
#else
#define TASKS_IDX_MAX NRF_VPR_TASKS_TRIGGER_MAX
#endif
struct mbox_vevif_task_tx_conf {
NRF_VPR_Type *vpr;

6
drivers/misc/nordic_vpr_launcher/nordic_vpr_launcher.c
View file

@ -14,8 +14,7 @@
#include <zephyr/toolchain.h>
#include <hal/nrf_vpr.h>
#if (defined(CONFIG_SOC_NRF54L15_ENGA_CPUAPP) || defined(CONFIG_SOC_NRF54L15_CPUAPP)) && \
!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#include <hal/nrf_spu.h>
#endif
@ -42,8 +41,7 @@ static int nordic_vpr_launcher_init(const struct device *dev)
}
#endif
#if (defined(CONFIG_SOC_NRF54L15_ENGA_CPUAPP) || defined(CONFIG_SOC_NRF54L15_CPUAPP)) && \
!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#if defined(CONFIG_SOC_NRF54L15_CPUAPP) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
nrf_spu_periph_perm_secattr_set(NRF_SPU00, nrf_address_slave_get((uint32_t)config->vpr),
true);
#endif

18
dts/arm/nordic/nrf54l15_enga_cpuapp.dtsi
View file

@ -1,18 +0,0 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/nordic/nrf54l15_cpuapp.dtsi>
/delete-node/ &pdm20;
/delete-node/ &pdm21;
&cpuapp_vevif_rx {
nordic,events-mask = <0x00008000>;
};
&cpuapp_vevif_tx {
nordic,tasks-mask = <0x0003f800>;
};

25
dts/riscv/nordic/nrf54l15_enga_cpuflpr.dtsi
View file

@ -1,25 +0,0 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <riscv/nordic/nrf54l15_cpuflpr.dtsi>
/delete-node/ &pdm20;
/delete-node/ &pdm21;
&cpuflpr_vevif_rx {
nordic,tasks-mask = <0x0003f800>;
interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>,
<12 NRF_DEFAULT_IRQ_PRIORITY>,
<13 NRF_DEFAULT_IRQ_PRIORITY>,
<14 NRF_DEFAULT_IRQ_PRIORITY>,
<15 NRF_DEFAULT_IRQ_PRIORITY>,
<16 NRF_DEFAULT_IRQ_PRIORITY>,
<17 NRF_DEFAULT_IRQ_PRIORITY>;
};
&cpuflpr_vevif_tx {
nordic,events-mask = <0x00008000>;
};

7
modules/hal_nordic/nrfx/CMakeLists.txt
View file

@ -52,9 +52,6 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPUPPR NRF54H20_ENGB_X
NRF_PPR)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPUFLPR NRF54H20_ENGB_XXAA
NRF_FLPR)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_ENGA NRF54L15_ENGA_XXAA)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUAPP NRF_APPLICATION)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUFLPR NRF_FLPR)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15 NRF54L15_XXAA)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUAPP NRF_APPLICATION)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR NRF_FLPR)
@ -179,7 +176,7 @@ if(DEFINED uicr_path)
endif()
endif()
if(CONFIG_SOC_NRF54L15_ENGA_CPUAPP OR CONFIG_SOC_NRF54L15_CPUAPP OR CONFIG_SOC_NRF54L20_ENGA_CPUAPP)
if(CONFIG_SOC_NRF54L15_CPUAPP OR CONFIG_SOC_NRF54L20_ENGA_CPUAPP)
dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency")
math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000")
zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}")
@ -233,8 +230,6 @@ mdk_svd_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPUAPP nrf54h20_engb_application.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPUPPR nrf54h20_engb_ppr.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPUFLPR nrf54h20_engb_flpr.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54H20_ENGB_CPURAD nrf54h20_engb_radiocore.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUAPP nrf54l15_enga_application.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUFLPR nrf54l15_enga_flpr.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUAPP nrf54l15_application.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54L15_CPUFLPR nrf54l15_flpr.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF54L20_ENGA_CPUAPP nrf54l20_enga_application.svd)

4
modules/hal_nordic/nrfx/nrfx_config.h
View file

@ -1056,10 +1056,6 @@
#include <nrfx_config_nrf54h20_ppr.h>
#elif (defined(NRF54H20_XXAA) || defined(NRF54H20_ENGB_XXAA)) && defined(NRF_FLPR)
#include <nrfx_config_nrf54h20_flpr.h>
#elif defined(NRF54L15_ENGA_XXAA) && defined(NRF_APPLICATION)
#include <nrfx_config_nrf54l15_enga_application.h>
#elif defined(NRF54L15_ENGA_XXAA) && defined(NRF_FLPR)
#include <nrfx_config_nrf54l15_enga_flpr.h>
#elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION)
#include <nrfx_config_nrf54l15_application.h>
#elif defined(NRF54L15_XXAA) && defined(NRF_FLPR)

1667
modules/hal_nordic/nrfx/nrfx_config_nrf54l15_enga_application.h
View file

File diff suppressed because it is too large Load diff

1668
modules/hal_nordic/nrfx/nrfx_config_nrf54l15_enga_flpr.h
View file

File diff suppressed because it is too large Load diff

2
soc/nordic/common/vpr/Kconfig.sysbuild
View file

@ -4,7 +4,7 @@
config VPR_LAUNCHER
bool "VPR launcher"
default y
depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF54L15_ENGA_CPUFLPR || SOC_NRF54L15_CPUFLPR || SOC_NRF9280_CPUPPR)
depends on (SOC_NRF54H20_CPUPPR || SOC_NRF54H20_CPUFLPR || SOC_NRF54L15_CPUFLPR || SOC_NRF9280_CPUPPR)
help
Include VPR launcher in build.
VPR launcher is a minimal sample built for an ARM core that starts given VPR core.

14
soc/nordic/nrf54l/Kconfig
View file

@ -9,17 +9,6 @@ config SOC_SERIES_NRF54LX
select HAS_NORDIC_DRIVERS
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
config SOC_NRF54L15_ENGA_CPUAPP
select ARM
select ARMV8_M_DSP
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
select CPU_HAS_ICACHE
select CPU_HAS_ARM_SAU
select CPU_HAS_FPU
select HAS_HW_NRF_RADIO_IEEE802154
select HAS_POWEROFF
config SOC_NRF54L15_CPUAPP
select ARM
select ARMV8_M_DSP
@ -42,9 +31,6 @@ config SOC_NRF54L20_ENGA_CPUAPP
select HAS_HW_NRF_RADIO_IEEE802154
select HAS_POWEROFF
config SOC_NRF54L15_ENGA_CPUFLPR
depends on RISCV_CORE_NORDIC_VPR
config SOC_NRF54L15_CPUFLPR
depends on RISCV_CORE_NORDIC_VPR

14
soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_enga_cpuapp
View file

@ -1,14 +0,0 @@
# Nordic Semiconductor nRF54L15 MCU
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54L15_ENGA_CPUAPP
config NUM_IRQS
default 271
config IEEE802154_NRF5
default IEEE802154
endif # SOC_NRF54L15_ENGA_CPUAPP

18
soc/nordic/nrf54l/Kconfig.defconfig.nrf54l15_enga_cpuflpr
View file

@ -1,18 +0,0 @@
# Nordic Semiconductor nRF54L15 MCU
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54L15_ENGA_CPUFLPR
config RISCV_HAS_CPU_IDLE
bool
config NUM_IRQS
int
default 287
# As FLPR has limited memory most of tests does not fit with asserts enabled.
config ASSERT
default n
endif # SOC_NRF54L15_ENGA_CPUFLPR

18
soc/nordic/nrf54l/Kconfig.soc
View file

@ -9,24 +9,6 @@ config SOC_NRF54L15
help
NRF54L15
config SOC_NRF54L15_ENGA
bool
select SOC_NRF54L15
help
NRF54L15 ENGA
config SOC_NRF54L15_ENGA_CPUAPP
bool
select SOC_NRF54L15_ENGA
help
NRF54L15 ENGA CPUAPP
config SOC_NRF54L15_ENGA_CPUFLPR
bool
select SOC_NRF54L15_ENGA
help
NRF54L15 ENGA CPUFLPR
config SOC_NRF54L15_CPUAPP
bool
select SOC_NRF54L15

2
tests/kernel/interrupt/src/nested_irq.c
View file

@ -56,7 +56,7 @@
*/
#define IRQ0_PRIO IRQ_DEFAULT_PRIORITY
#define IRQ1_PRIO 0x0
#elif defined(CONFIG_SOC_NRF54L15_ENGA_CPUFLPR) || defined(CONFIG_SOC_NRF54L15_CPUFLPR)
#elif defined(CONFIG_SOC_NRF54L15_CPUFLPR)
#define IRQ0_LINE 16
#define IRQ1_LINE 17