Commit graph zephyr/dts
Author SHA1 Message Date
Maciej Baczmanski
9748250e72 dts: vendor-prefixes: Add OpenThread.io vendor prefix
Added OpenThread.io vendor prefix to enable
`openthread,config` dts binding for additional OpenThread configurations.

Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
2023-06-19 15:03:24 +02:00
Guy Morand
890363a6fb drivers: led: Add lumissil is31fl3216a driver
The IS31FL3216A is a fun light LED controller. The LED current of each
channel can be set in 256 steps by adjusting the PWM duty cycle through
an I2C interface.

Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
2023-06-19 11:02:36 +02:00
Jonas Remmert
99751b1d98 drivers: led: Add lp5569 led controller driver
Add a minimal driver for the ti lp5569 led controller. The driver supports
multiple instances. Commands on|off|set_brightness are supported.

Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
2023-06-19 09:17:52 +01:00
Piotr Wojnarowski
bc8b234d9c soc: arm64: ls1046a: Move GIC version to DT
Move the GIC version to the device tree for ls1046a
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
6b004bc1b9 soc: arm64: am6x: Move GIC version to DT
Move the GIC version to the device tree for am6x
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
0e537bc04e soc: arm64: rk3399: Move GIC version to DT
Move the GIC version to the device tree for rk3399
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
2ba2e1dc3a soc: arm64: intel_socfpga: Move GIC version to DT
Move the GIC version to the device tree for intel_socfpga
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
7908d7556c soc: arm64: nxp_imx: Move GIC version to DT
Move the GIC version to the device tree for nxp_imx
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
7626426f27 soc: arm64: qemu: Move GIC version to DT
Move the GIC version to the device tree for the QEMU platforms
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
184440239e soc: arm64: mimx9: Move GIC version to DT
Move the GIC version to the device tree for mimx9
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
03aa363a6c soc: arm64: viper: Move GIC version to DT
Move the GIC version to the device tree for viper
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
ff9fe7271a soc: arm64: fvp_aemv8: Move GIC version to DT
Move the GIC version to the device tree for fvp_aemv8{a,r}
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
fc29f73a29 soc: arm: xilinx_zynqmp: Move GIC version to DT
Move the GIC version to the device tree for xilinx_zynqmp
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
0835a99fac soc: arm: renesas_rcar: Move GIC version to DT
Move the GIC version to the device tree for renesas_rcar
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
48ba2aec6a soc: arm: cyclonev: Move GIC version to DT
Move the GIC version to the device tree for cyclonev
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
bca43d3eaf soc: arm: nxp_s32: Move GIC version to DT
Move the GIC version to the device tree for nxp_s32
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
95c1a7e83f soc: arm: xilinx_zynq7000: Move GIC version to DT
Move the GIC version to the device tree for xilinx_zynq7000
to improve readability

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
2f5ac45e53 dts: bindings: interrupt-controller: GIC: Allow specifying version in DT
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Piotr Wojnarowski
88f4353ce1 dts: bindings: interrupt-controller: GIC: Update description
When the GIC driver was originally introduced, it was only used on
Cortex-R SoCs. However, this is not the case anymore. Update the
description to reflect that this driver is not specific to Cortex-R.

Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
2023-06-17 08:01:46 -04:00
Daniel DeGrasse
6c10da7957 drivers: sensor: introduce driver for TCN75A temperature sensor
Add driver for TCN75A temperature sensor. The following features are
supported:
- TCN75A oneshot mode, which allows single shot conversions with lower
  power consumtion
- Resolution selection, up to 12 bit resolution (9 bit default)
- Triggering based on temperatue thresholds. If the TCN75A exits a set
  threshold range, the application can be notified via a callback.

Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
2023-06-17 08:01:16 -04:00
Manimaran A
0f6cb5edcd drivers: ps2: microchip: Low power and wakeup enabled
ps2 driver updated to support low power and wakeup.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-06-17 07:59:07 -04:00
Gerard Marull-Paretas
74b063ed58 boards: cc32(20|35)sf_launchxl: add UART0 pinctrl entries
Add UART0 pinctrl entries, and make them required at bindings level.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Gerard Marull-Paretas
8654f321e9 boards: cc32(20|35)sf_launchxl: add I2C pinctrl entries
Add I2C pinctrl entries, and make them required at bindings level.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Gerard Marull-Paretas
c0bc9f974f drivers: pinctrl: add TI CC32XX driver
Add a new pinctrl driver for TI CC32XX SoC. The driver has not been
tested, just implemented following datasheet specs and checked that it
compiles. Consider this as a best-effort driver to remove custom pinmux
code in board files.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Jordan Montgomery
a7014d01da drivers: adc: Add support for TI ADS1112 ADCs
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.

The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.

The new driver has also been added to the existing ADC test using adc_emul
for completeness.

Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs

Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
2023-06-17 07:49:59 -04:00
Mulin Chao
0af2e0ef04 dts: npcx: move npcx/npcx7/npcx9.dtsi to npcx folder
Move dt files related to SoC family and series to npcx folder. It only
leaves SoC dt file in `dts/arm/nuvoton folder` in case of confusion with
the other Nuvoton SoCs.

The dt files path will be:
dts/arm/nuvoton
        |--npcx
        |    |--npcx7
        |    |    |--npcx7-miwus-wui-map.dtsi
        |    |    |--npcx7-alts-map.dtsi
        |    |    |--.....
        |    +--npcx9
        |    |    |--npcx9-miwus-wui-map.dtsi
        |    |    |--npcx9-alts-map.dtsi
        |    |    +--.....
        |    |--npcx-miwus-wui-map.dtsi
        |    |--npcx-alts-map.dtsi
        |    |--npcx.dtsi
        |    |--npcx7.dtsi
        |    |--npcx9.dtsi
        |--npcx7m6fb.dtsi
        |--npcx7m6fc.dtsi
        |--npcx9m8f.dtsi
        +--npcx9m3f.dtsi

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-06-17 07:49:30 -04:00
Zhang Lixu
25ca09ea01 sensing: phy_3d_sensor: add phy_3d_sensor skeleton
Add the sensor phy_3d_sensor skeleton in Sensing Subsystem.

Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-06-17 07:43:25 -04:00
Zhang Lixu
685160b4bf sensing: add Sensing Subsystem skeleton
Add Sensing Subsystem skeleton.

Signed-off-by: Guangfu Hu <guangfu.hu@intel.com>
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
2023-06-17 07:43:25 -04:00
Khor Swee Aun
ad6bf7f456 dts: riscv: Add dts support for INTEL Nios V/g
Add basic dts support for INTEL Nios V/g General Purpose Processor.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-06-17 07:34:05 -04:00
Jaska Uimonen
09085ef63c dts: xtensa: intel: update cavs25 sram size
Cavs25 sram size should be 3MB instead of 2MB, thus update the correct
value.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-06-16 05:46:37 -04:00
Cyril Fougeray
a8ed28ab6f stm32g4: adc345: set resolutions & sampling-times in dtsi
bring back adc3/4/5 with latest "st,stm32-adc" required
properties: resolutions & sampling-times

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-06-09 05:14:42 -04:00
Fabio Baltieri
ab7b8dd0ab dts: mec172x: move the uart device node off espi
Move the two UART nodes so that they are under "soc" rather than "espi",
leave only xec-espi-host-dev nodes there.

The UART device can be used indepdently by the driver uart_mchp_xec.c
and it's normally initialized before before the espi one.

Moving the device node up a level so this does not trigger a false
positive on the build time priority checking.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-06-06 17:20:34 -04:00
Henrik Brix Andersen
0f36f1a3ee drivers: can: mcan: use per-instance message RAM configuration
Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.

This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.

As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.

Fixes: #42030, #53417

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-05-29 14:34:19 -04:00
Henrik Brix Andersen
6cd67e67fe dts: bindings: can: mcan: switch to using bosch,mram-cfg property
Switch the Bosch M_CAN devicetree binding to use a bosch,mram-cfg property
for specifying the memory layout of the Bosch M_CAN Message RAM. This is
identical to the Linux kernel devicetree binding for Bosch M_CAN IP core
based CAN controllers.

This introduces an offset cell which can be used for controllers with
shared Message RAM between Bosch M_CAN instances.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-05-29 14:34:19 -04:00
Siyuan Cheng
4babd545cc drivers: pinctrl: add pinctrl driver for ARC emsdp
Add Synopsys ARC EMSDP board Pin controller for its Pmod
and Arduino shield interface.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-05-29 09:21:07 -04:00
Andrei Hutanu
cf3df2b840 drivers: modem: quectel-bg9x: fix for bg95 pinout
The BG95 pin configuration does not internally ever use the reset pin.
Because of this, there is no need to make reset pin mandatory.
Commit removes reset pin dependency [e.g. in case of BG95].

Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
2023-05-27 06:28:33 -04:00
Benjamin Björnsson
6f89d6aba1 dts: arm: st: c0: Add dma and dmamux nodes
Add nodes for dma and dmamux to stm32c0-series.

Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
2023-05-27 06:21:39 -04:00
Nick Ward
c5f725e672 drivers: sensor: vl53l0x: fix XSHUT pin as active low
Also utilises gpio_pin_configure_dt() API to configure and set pin
state at the same time.

Signed-off-by: Nick Ward <nix.ward@gmail.com>
2023-05-27 06:19:29 -04:00
Benedikt Schmidt
e7759b2a8e dts: bindings: adc: Add IDAC current to ADS114S08
Add the IDAC current magnitude property to ADS114S08

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-27 05:33:52 -04:00
Benedikt Schmidt
bb679532f4 dts: bindings: adc: Add configurable current source pin for ADCs
Add a property to the ADC channels which allows the configuration
of the current source pin.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-05-27 05:33:52 -04:00
Emilio Benavente
86d63c5cff dts: arm: nxp: lpc55S6X: Added trig bindings for DMA
Added Input/Output trigger mux address's as properties
that can be passed into the DMA driver. This is intended
to send INPUTMUX signals into the DMA.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2023-05-26 17:22:43 -05:00
Mahesh Mahadevan
bfa38b0aeb dts: lpc55S6x: Fix the mapping for USB RAM
Fix the mapping for the USB RAM

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Mahesh Mahadevan
9f4af21c22 dts: lpc55S6x: Add USB FS support
Add support for USB Full speed controller.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Mahesh Mahadevan
83b30f4184 dts: lpc55S3x: Add USB Full speed support
Add support for USB Full Speed

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Mahesh Mahadevan
2924b6ead2 dts: lpc55S3x: Delete uuid region
uuid region is not present on LPC55S36

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Mahesh Mahadevan
f05bbd09be drivers: usb_dc_mcux: Add Pinctrl defines
Add Pinctrl code

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-26 17:53:37 -04:00
Jamie McCrae
212a4857ba drivers: auxdisplay: Add Hitachi HD44780 driver
Adds an auxiliary display driver for Hitachi HD44780-based (and
compatible) LCD displays.

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2023-05-26 23:05:58 +02:00
Jamie McCrae
71c727e92e drivers: auxdisplay: Port Jinghua Display JHD1313 driver
Ports the Jinghua Display JHD1313 LCD (with RGB backlight) driver
to use the new auxdisplay driver interface. This driver is used on
the seeed grove LCD RGB display, and replaces it.

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2023-05-26 23:05:58 +02:00
Jamie McCrae
7d1c79aa8c drivers: auxdisplay: Add noritake itron VFD auxiliary display
Adds the driver for a Noritake Itron VFD auxiliary display.

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2023-05-26 23:05:58 +02:00
Jamie McCrae
bdf2e56ce1 drivers: Add auxdisplay (text) interface
Adds the base driver include file and base auxiliary display
dts file.

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2023-05-26 23:05:58 +02:00