Commit graph

11,885 commits

Author SHA1 Message Date
Daniel DeGrasse
2b38b02470 dts: arm: nxp_rt: Remove flexspi2 on RT SOCs that don't have it
Remove flexspi2 node for NXP's iMX.RT SOCs that only have one flexspi
controller

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
e99788ba6a boards: mimxrt1024_evk: Update flexspi partition layout and device name
Update flexspi partition layout to add a 128KB storage partition. Also,
fix flash device name and size to match the SIP flash present on
the RT1024 SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
0811d325b3 boards: mimxrt1064_evk: document flexspi support
Document support for flexspi as flash controller on mimxrt1064_evk, and
move status=okay for internal flash to soc level dtsi

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
83a214174b dts: arm: nxp_k8x.dtsi: enable ftfa flash controller
Enable flash controller on k8x, as it is supported on this SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
5992132174 dts: arm: nxp_k2x: enable ftfe flash controller
Mark ftfe flash controller as enabled, as it is tested on the k2x SOC line

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
55ef1ed33f dts: arm: nxp_k6x: enable flash controller ftfe
explicitly enable ftfe flash controller for k6x SOC, as it is tested and
supported.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
a52f399623 dts: arm: nxp_lpc55s6x: disable flash controller for nonsecure targets
disable flash controller for nonsecure core, as only the secure core is
tested with flash support.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Daniel DeGrasse
570293a252 soc: nxp_rt6xx: disable flash driver by default
set nxp,imx-flexspi to disabled by default to disable flash driver for
this SOC unless enabled by the target board. This SOC uses external flash,
so boards should enable the flash controller only when flash support
has been verified with their specific external flash module

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-25 08:26:53 -05:00
Gerard Marull-Paretas
a5e301e06f dts: gigadevice: remove deprecated device_type property
According to DT spec, device_type property is deprecated (ref. 0.3 spec,
2.3.11):

> The device_type property was used in IEEE 1275 to describe the device’s
FCode programming model. Because DTSpec does not have FCode, new use
of the property is deprecated, and it should be included only on cpu and
memory nodes for compatibility with IEEE 1275–derived devicetrees.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
61889de3d1 dts: gigadevice: always use DT_FREQ_M
Use the DT_FREQ_M helper to improve readability on clock frequencies.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
c50316ecde soc: gigadevice: gd32f403: use DT for SYS_CLOCK_HW_CYCLES_PER_SEC
Set the default value for SYS_CLOCK_HW_CYCLES_PER_SEC based on DT cpu0
clock-frequency property.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
b9f1a0cfe6 soc: gigadevice: gd32f4xx: use DT for SYS_CLOCK_HW_CYCLES_PER_SEC
Set the default value for SYS_CLOCK_HW_CYCLES_PER_SEC based on DT cpu0
clock-frequency property.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
7442d86ab1 dts: gigadevice: simplify flash/sram size assignments
Make use of nodelabels to extend flash/sram nodes instead of re-defining
the whole tree. This pattern is already used in some other files.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
4504e04ce0 dts: gigadevice: gd32f403: fix dma0/1 reg address
The address did not match the one specified in the node.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
e03d28edeb dts: gigadevice: gd32f403: remove non-existing flash property
The peripheral-id is not a valid property for gd,gd32-flash-controller.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
d7f08249bc dts: gigadevice: gd32e10x: fix flash controller issues
- nodelabel was uppercase
- peripheral-id was not a valid property

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
57c5261f53 dts: bindings: add missing gd32 flash controller binding
Despite being used in GD32 dts files, the compatible did not exist. Note
that there is no GD32 flash driver yet.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
4bd872e875 dts: gigadevice: gd32vf103: remove redundant riscv compatible
The compatible has no known meaning, so remove it.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
a40c4c74da dts: gigadevice: gd32vf103: remove redundant soc compatible
The gd,gd32vf103-soc compatible is redundant, drop it.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Gerard Marull-Paretas
e7b9c8c955 dts: gigadevice: gd32vf103: move interrupt-parent to soc node
There's no need to specify the interrupt parent on each node, it can be
defined at soc level node instead (same as in ARM parts with NVIC).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-25 09:09:51 +00:00
Thomas Stranger
24594cf7ce dts/arm: stm32f105: enable master can gating clock for can2
The can2 only works if gating clock of the master can (can1)
is enabled, therefore also set that bit for can2.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-08-24 10:37:40 +00:00
Dinh Nguyen
62b7dc2a7f dts: arm64: agilex: add additional cpu nodes
Add CPU1 - CPU3 nodes and add the cpu0 label.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-08-24 11:41:23 +02:00
TLIG Dhaou
93b4fcc611 dts: arm: st: Add adc support of the temperature sensor on stm32
Add the support of the temperature sensor in the ADC device-tree node of
each stm32 where it is available.
- Check all the ADC of the stm32 mcus where the temp and VrefInt monitoring
is available (based on the Ref Man).
- Check that has-temp-channel; and has-vref-channel; in the corresponding
ADC node of the DTS of each stm32 mcu is correctly set.
- Verify the VTEMP/ VREFINT activation in the in adc_stm32.c for example).
-Add the die-temp node (based on the ref man/ datasheet).

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-24 11:35:45 +02:00
TLIG Dhaou
6778393ce3 dts: binding: sensor: stm32-temp add temp sensor calibration property
The TS_CAL values for the temperature sensor are measured on 12, 14 and
16 bit resolution depends on the STM32 series. Because the drivers
operates at 12 bit resolution the TS_CAL1 and TS_CAL2 must be divided.

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-24 11:35:45 +02:00
Mahesh Mahadevan
32e2e1cb79 dts: lpc55S6x: Add back the USB SRAM region
USB SRAM region was accidentally deleted by an earlier
commit. Rename the memory region used by USB to USB_SRAM instead
of SRAM4. SRAM4 was the wrong name for this region.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-08-24 10:08:40 +02:00
Francois Ramu
77b3ab0c02 dts: arm: stm32U5 add a DMA node for the GPDMA1 instance
This commit defines the GPDMA peripheral for the stm32U5.
This dma is of a new type with 16 channels and 114 requests.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-24 10:05:32 +02:00
Francois Ramu
46a8708eec dts: bindings: dma: introduce a new type of DMA
This commit defines a new dma version for devices like stm32U5.
The peripheral is a GPDMA in this soc serie.
It has several specific definitions used by its stm32 LL driver
compared to the V2, including up to 16 channels.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-24 10:05:32 +02:00
Kumar Gala
ca7d74bf76 dts: arm: st: Fix DTC warnings
Fix various DTC warnings of the form:

   Warning (simple_bus_reg): simple-bus unit address format error

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-23 19:33:25 +00:00
Kumar Gala
c76dd1a3bf dts: arm: xilinx: Remove improper range property
Remove 'ranges' property from gpio node as it shouldn't be there
since we aren't converting 1:1 between address spaces.  This fixes
the following DTC warning:

   Warning (ranges_format): /soc/gpio@e000a000:ranges: empty "ranges"
   property but its #size-cells (0) differs from /soc (1)

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-23 19:29:46 +00:00
Kumar Gala
e759161572 dts: stm32: l0: Move usb PHY nodes out of SoC to fix warning
We currently get a number of warnings like:

        Warning (simple_bus_reg): /soc/otgfs_phy: missing or empty
        reg/ranges property

This is due to the usb phy nodes not have a reg property since they
don't have an mmio address associated with them.

Move the phy nodes out of the SoC node so their lack of a reg property
will not cause a warning.  This is similar to how Linux dts files
handle the phy nodes.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-23 20:09:31 +02:00
TLIG Dhaou
e385bf10dc dts: arm st: u5: Enable PWM support for stm32U5 in dtsi
add PWM support in dtsi for stm32U5. Adding timer nodes for different
PWM capability.

Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-23 20:08:07 +02:00
Richard Osterloh
258737b2ef soc: arm: stm32f4: Add STM32F423 support
Add support for STM32F423xx devices in dts and soc

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2022-08-23 16:23:55 +02:00
TLIG Dhaou
53f2ccf2a2 dts: bindings: serial: Add common bindings for STM32 serial driver.
There are 3 bindings for STM32 serial driver:
st,stm32-uart.yaml
st,stm32-usart.yaml
st,stm32-lpuart.yaml
Add a common st,stm32-uart-base.yaml that would be included by these
3 bindings an would group common properties.


Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
2022-08-23 07:11:08 -05:00
Tim Lin
cb041d062f ITE: drivers/i2c: Add I2C FIFO mode
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.

I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.

Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
   0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
   frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-08-23 10:16:36 +02:00
Wei-Tai Lee
a718583b46 dts: riscv: andes: andes_v5_ae350: replaced smu with syscon
Use syscon to replace smu.

Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
2022-08-23 10:15:50 +02:00
Emilio Benavente
2da4de9976 dts: arm: nxp: rt595: Added pmic_i2c to the peripheral node
The MIMXRT5xx comes with one pmic peripheral that is
lpc-i2c compatible.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2022-08-23 10:13:51 +02:00
Radosław Koppel
7614110a20 dts: Add _STRING_TOKEN and _STRING_UPPER_TOKEN to string-array
This commit adds string token versions of the values also
in items inside string-array.

Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Co-authored-by: Kumar Gala <galak@kernel.org>
2022-08-22 13:58:30 -05:00
Bartosz Bilas
755c0d57e8 drivers: sensor: ina237: add support for triggered mode
Add missing support for the triggered mode using GPIO
interrupt alert pin. It uses mode detection at runtime
which allows working multiple sensors with different
modes simultaneously.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2022-08-22 19:38:06 +02:00
Francois Ramu
49bdd2b74d dts: arm: stm32 entropy with nist configuration for the RNG
The nist-config and health-test-magic properties are added
to the dtsi file, in the RNG node for the stm32 devices
that supports the RNG entropy source validation.
The health-test-magic nb exists on stm32l552 stm32h723/7a3.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-22 10:22:20 +00:00
Francois Ramu
a1059f9ea5 dts: rng: stm32 new property for NIST certification
The new property nist-config is introduced to the stm32 mcus
to configure the RNG for NIST SP800-90B certification.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-08-22 10:22:20 +00:00
Gerard Marull-Paretas
8588fdc7b3 dts: bindings: gpio-leds: move to led folder
The gpio-leds binding is meant for LED drivers, not GPIO. As in Linux,
move the binding to the led folder.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-18 17:13:17 -07:00
Gerard Marull-Paretas
8adec7d879 dts: bindings: gpio-keys: align with Linux
gpio-keys binding has been used in Zephyr to describe random push
buttons in boards. On Linux, it is used by a keyboard input driver,
while in Zephyr is, in most cases, used directly in applications out of
the device driver model. This should likely be _fixed_ if one day we
have a proper input device class. Still, we can align a few things:

- Inherit from base.yaml (we need status, compatible, etc defined there)
- Remove the requirement of a label in child nodes
- Fix child nodes label description
- Move to dts/bindings/input

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-18 17:13:17 -07:00
Kumar Gala
9b5c653b3f dts: bindings: test: Add explicit label property
Don't import the label prop from base.yaml as it is marked deprecated.
This lets the various tests that still use DT_LABEL() to work properly.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-18 15:19:40 -07:00
Kumar Gala
c527c063c6 dts: bindings: deprecated label property
Mark 'label' property as deprecated in base.yaml.  'label' is still
defined and valid for specific bindings to specify like gpio-keys.yaml
or fixed-partitions.yaml.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-18 15:19:40 -07:00
Tom Burdick
efc0928570 dma/hda: Use the correct register block size for each IP block
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-18 14:54:57 -05:00
Kumar Gala
3470d6196b dts: bindings: pwm: stm32: Remove deprecated property
The st,prescaler, has been deprecated for at least 2
releases.  So we can now remove it.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-18 10:20:32 +02:00
TOKITA Hiroshi
a7721aa30d drivers: spi: pl022: Support interrupt based transfer
Add interrupt based transfer feature for the PL022 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
TOKITA Hiroshi
8a8e893bd2 dts: arm: rpi_pico: Adding spi configurations to rp2040
Add spi0 and spi1 configuration to rp2040.

spi0 and spi1 are declared as compatible with
"raspberrypi,pico-spi" and "arm,pl022".
"raspberrypi,pico-spi" is just inherited from
"arm,pl022" and "reset-device"

spi0 and spi1 declare as compatible with "raspberrypi,pico-spi"
and "arm,pl022".
"raspberrypi,pico-spi" is just inheriting "arm,pl022" and
"reset-device" for declaring the 'reset' property,
with no additional property and implementation.

Add also pinctrl macros to dt-bindings header.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
TOKITA Hiroshi
da32e26a3d drivers: spi: Add basic support for PL022
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.

Optional functions are not currently implemented yet.

- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.

Hardware limitation:

- LSB-first format is not supported by hardware.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
Crist Xu
d42ca3a1a5 dts: rt1170: Change the interrupt idx of the fast-gpio2
The fast-gpio has a dedicated interrupt idx 99, not
the same with the normal gpio. So if we want to use
the fast-gpio, need use the interrupt idx 99.

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2022-08-17 12:07:44 +02:00