Commit graph

11,885 commits

Author SHA1 Message Date
Gerard Marull-Paretas
868c25de76 drivers: pwm: nrfx: drop -pin support
PWM driver will now use pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
a8efe38c43 drivers: i2s: nrfx: drop -pin support
Driver will now use pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
dea028a0da drivers: i2c: nrfx_twi/m: drop -pin support
TWI/M drivers will use pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
55ac2f91f6 drivers: spi: nrfx_spi/s/m: drop -pin support
SPI/S/M drivers will only use pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas
aa9df1abc0 drivers: serial: nrfx_uart/e: drop -pin support
UART/E driver will only support using pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Lucas Tamborrino
ca0c46604f dts: esp32s3: add i2c support
Add i2c support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-02-28 14:44:47 +01:00
Dawid Niedzwiecki
2d0a784c41 subsys/mgmt/ec_host_cmd: rework Host Command support
Rework the Host Command support. It includes:
-change API to backend
-change a way of defining rx and tx buffers
-fix synchronization between the handler and backend layer
-simplify the HC handler

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-02-28 10:42:23 +01:00
Dawid Niedzwiecki
b2674a4b34 subsys/mgmt/ec_host_cmd: rename peripheral to backend
Follow naming pattern in the subsystems(logging or shell) and name
the layer between generic handler and peripheral driver "backend".

The name doesn't suit that well to the SHI backend, because there isn't
SHI API itself and the SHI interface is used only for the host
communication. So the backend code includes the peripheral driver itself.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2023-02-28 10:42:23 +01:00
Sylvio Alves
bbd40b85c0 soc: esp32s3: add base source content
This brings esp32s3 linker, DTS and all
necessary files to allow the soc support.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-27 19:41:33 +01:00
Jeff Daly
e32c362038 Microchip: create DTS and Kconfig definition of MEC172x LJ package.
Define extra pins and IP blocks in DTS and Kconfig for the LJ package of
the MEC172x SoC.

Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
2023-02-27 19:41:11 +01:00
Francois Ramu
306dea6ff3 dts: arm: stm32l4_plus serie definition from stm32l4p5
Change the dtsi order for the stm32L4plus serie,
starting with stm32l4p5-stm32l4q5 and stm32l4r5-stm32l4s5
Significant changes are on the SRAM size, the sdmmc2
and separated RTC-bbram registers.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-27 17:30:12 +01:00
Francois Ramu
8d7295adde dts: arm: stm32u5 devices has 768KB of contiguous SRAM
The SRAM1(total 192 KBytes) plus SRAM2: (total 64 KBytes)
plus SRAM3(total 512 KBytes) is available from 0x20000000 to
0x200BFFFF.
The SRAM size is only 768KB at address  0x20000000
The 16KB SRAM4 is located at address 0x28000000 so that no ram
is present from 0x200c0000 to 0x28000000.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-27 17:29:38 +01:00
Benedikt Schmidt
6453564bc1 dts: bindings: gpio: add binding for BD8LB600FS
Add the binding for the driver of the chip BD8LB600FS.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2023-02-27 06:44:23 -05:00
Francois Ramu
413c039031 dts: arm: stm32u5 defines the BackUp RAM section
Add the BacKUp RAM node to the stm32U5 mcu serie
Size is 2KB located at 0x40036400

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-27 11:35:07 +01:00
Yuval Peress
ebfd9aaba5 sensor: Implement driver and tests for akm09918c
Add the implementation for the akm09918c magnetometer driver.
Additionally, add the appropriate node to the TDK robokit1 device
tree. In order to prevent regressions, add the sensor to the sensor
build_all tests and specific tests using an emulator.

Signed-off-by: Yuval Peress <peress@google.com>
2023-02-24 17:00:14 -05:00
Jonathan Rico
f8e5e17246 drivers: led_strip: add WS2812 I2S-based driver
Add a driver implementation that uses the I2S peripheral.
Based off this blog post:
https://electronut.in/nrf52-i2s-ws2812/

Should help with #33505, #29877 and maybe #47780, as there is no garbage
data at the end of transmissions on nRF52832, and no gaps.

Signed-off-by: Jonathan Rico <jonathan@rico.live>
2023-02-24 10:12:47 -08:00
Grant Ramsay
7fd8b1f678 dts: arm64: Add TI AM6234 A53 device tree
Some register addresses change within the AM6X family.
AM62X is common to AM623X/AM625X processors.

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-02-24 18:11:56 +01:00
Gerard Marull-Paretas
d76f4f2c8a drivers: pinmux: mchp_xec: drop driver
Drop Microchip XEC driver in favor of pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-23 16:56:04 -05:00
Gerard Marull-Paretas
099012a59f drivers: pinmux: lpc11u6x: drop driver
Drop LPC11U6X pinmux driver in favor of pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-23 16:56:04 -05:00
Gerard Marull-Paretas
33372b9e48 drivers: pinmux: mcux_lpc: drop driver
Drop MCUX LPC pinmux driver in favor of pinctrl.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-23 16:56:04 -05:00
Petr Hlineny
94847be172 drivers/disk: sdmmc stm32: Enable SDMMC Internal DMA on STM32L4plus mcu
STM32L4plus mcu has SDMMC internal DMA which works without any
configuration and it's handled by SDMMC HAL driver. This commit adds
option to enable it and use it.

Signed-off-by: Petr Hlineny <development@hlineny.cz>
2023-02-23 10:48:50 +01:00
Goh Shun Jing
9ecfa4decc drivers: serial: uart_altera: add driver
Add driver for altera avalon uart core.

Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-02-23 09:26:33 +01:00
Garrett Battaglia
65e3f5b23d drivers: sensor: add MAX31855
add MAX31855 cold-junction compensated thermocouple-to-digital
converter sensor driver and sample

Signed-off-by: Garrett Battaglia <garrett@garrettbattaglia.com>
2023-02-23 09:06:28 +01:00
Guillaume Gautier
cdd100f1d6 dts: arm: st: l4: fix temperature calibration value
For STM32L47x and STM32L48x, the high calibration value for temperature is
110. For all other STM32L4xx, it is 130. So we set 130 by default and set
it to 110 for L471.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
e08a41a360 dts: arm: st: l4: add gpioi driver to stm32l4r5 dtsi
Add GPIOI driver to STM32L4R5 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
45748a7ae9 dts: arm: st: l4: add can2 driver to stm32l496 dtsi
Add CAN2 driver to STM32L496 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
ca1646b996 dts: arm: st: l4: add aes driver to stm32l4r5 dtsi
Add AES driver to STM32L4R5 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
1b4badf52b dts: arm: st: l4: add sdmmc driver to stm32l433 dtsi
Add SDMMC driver to STM32L433 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
7e2edb98dc dts: arm: st: l4: add aes driver to stm32l462 dtsi
Add AES driver to STM32L462 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
3ff66ab200 dts: arm: st: l4: add aes driver to stm32l422 dtsi
Add AES driver to STM32L422 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
36dfafadeb dts: arm: st: l4: fix aes inclusion for stm32l4xx
AES driver is not present in STM32L486 but it L496 and L4A6 have it

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
6812e561a7 dts: arm: st: l4: remove adc3 duplicates from stm32l476/96
ADC3 is already defined for STM32L471 which is included in STM32L476 and in
STM32L496 so no need to define it a second time.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
687893106a dts: arm: st: l4: add usart3 to stm32l412 & l422
Add USART3 to STM32L412 (and STM32L422 by inclusion) since both have it
available

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
d588d8441b dts: arm: st: l4: add i2c2 to stm32l412 & l422
Add I2C2 to STM32L412 (and STM32L422 by inclusion) since both have it
available

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Guillaume Gautier
f3f0aa0851 dts: arm: st: l4: lptim2 is available on all stm32l4xx
Move LPTIM2 from stm32l431 dtsi to the general stm32l4 dtsi since all
STM32L4xx have two LPTIMs.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-02-22 08:47:31 -08:00
Bartosz Bilas
2b4a6e52d5 drivers: i2c: eeprom_target: switch to dedicated driver compatible
Create and use a new `zephyr,i2c-target-eeprom` compatible
within I2C  eeprom target driver that allows to use
that driver along with real atmel at24 EEPROM simultaneously.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-02-21 18:03:11 -05:00
Andriy Gelman
30b11260be drivers: uart_xmc4xxx: Add async support
Adds async uart for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Andriy Gelman
8a97da056b drivers: dma: Add infineon xmc4xxx dma support
Adds dma drivers for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Conor Paxton
1462751681 dts: mpfs_icicle: remove incorrect compatible from cpus
remove the microsemi vendor compatible from Microchip's PolarFire SoC
mpfs_icicle platform

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2023-02-21 15:04:56 +01:00
Conor Paxton
978a0eba21 dts: mpfs_icicle: add cpu nodes
Microchip's PolarFire SoC has a core complex consisting of one e51
monitor core and four u54 application cores. Add the remaining cpu nodes
to mpfs-icicle device tree. Add the software and timer interrupt irq's
to the clint for the additional cpu nodes.

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2023-02-21 15:04:56 +01:00
Khor Swee Aun
c93c853cba drivers: timer: Machine timer driver enablement for NIOSV
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-20 09:29:13 -05:00
Khor Swee Aun
024f736766 dts: riscv: niosv: add DT entry for machine timer
add DT entry for machine timer

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-20 09:29:13 -05:00
Khor Swee Aun
938b152b03 dts: riscv: Add dts support for INTEL NIOSV
Add basic dts support for INTEL NIOSV Microcontroller Core Processor.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-20 09:29:13 -05:00
Khor Swee Aun
6256a0b047 dts: bindings: cpu: Add INTEL FPGA NIOSV
Add INTEL FPGA NIOSV Processor yaml file

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2023-02-20 09:29:13 -05:00
Fabio Baltieri
4c70a99d0a dts: arm: st: move can2 definition to stm32h7.dtsi
All STM32H7 variants seems to have two fd-can interfaces available. Add
a can2 definition in stm32h7.dtsi, drop the current one in
stm32h723.dtsi. Also drop the override of address/size cells, this node
is not supposed to have any child node so they are not needed.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2023-02-20 11:50:05 +01:00
Andriy Gelman
0079cabb49 drivers: sensor: Add infineon xmc4xxx die temperature sensor
Adds die temperature driver for infineon xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-20 11:14:15 +01:00
Carlo Caione
034a274d93 dts: bindings: riscv: Add rv32emc variant
To the 'riscv,isa' property enum.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-02-20 09:49:51 +01:00
Radosław Koppel
14a1b2ffec dts: Add _STRING_UNQUOTED string and string-array
This commit adds access to the string values without a quotes.

Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
2023-02-20 09:49:00 +01:00
Ruibin Chang
e3b57c392c ITE drivers/pinctrl/it8xxx2: add default mode function
Add default mode function for pin control.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2023-02-19 21:00:14 -05:00
Marcin Niestroj
cb0ce21480 ARM: nxp_imx: rt1064: use PODF values from rt1060
rt1064 already includes dtsi file for rt1060, including values for ARM and
IPG PODFs. Drop explicit assignment of those PODF values in order to reduce
duplicated code.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2023-02-19 20:57:54 -05:00