update the endpint in dts to 6 to alignd with RM
enable usb-device for LPC55S28
all USB supported tests/samples PASS
samples:
scripts/twister -p lpcxpresso55s28 \
--device-testing --hardware-map ~/map.yml \
-T samples/subsys/usb/
...
INFO - 7 of 25 test configurations passed (100.00%),\
0 failed, 18 skipped with 0 warnings in 73.49 seconds
...
tests
scripts/twister -p lpcxpresso55s28 \
--device-testing --hardware-map ~/map.yml \
-T tests/subsys/usb/
...
INFO - 3 of 4 test configurations passed (100.00%),\
0 failed, 1 skipped with 0 warnings in 36.39 seconds
...
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
This commit adds support for BH1750 ambient light sensor.
The driver works using I2C peripheral in one-time mode.
Signed-off-by: Michal morsisko <morsisko@gmail.com>
The Microchip XEC (MEC172x and MEC152x) have a breathing-blinking
LED (BBLED) block which implements a simple PWM mode. The BBLED
PWM frequencies are 32KHz and 48MHz selectable in device tree.
Frequency divider is 12-bit resolution from 256 to (256 * 4096).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
* there is a subtle difference to the stm32h74x
* c.f. rm0468 (stm32h723/733 stm32h725/735 and stm32h730)
* verified on stm32h735
Signed-off-by: Roland Lezuo <roland.lezuo@embedded-solutions.at>
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Each GPIO controller may contain GPIO hog definitions. GPIO hogging is a
mechanism for providing automatic GPIO configuration during system
initialization.
Each GPIO hog is represented as a child node of the GPIO controller.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
assign interrupt number 0 for jtag_uart.
Number can be found in soc/nios2/nios2-qemu/include/system.h
JTAG_UART_0_IRQ 0
Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
This board is confirmed to build and run simple applications in
RTL simulation as described in the included board documentation.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
According to the reference manual, all STM32G4 variants except
STM32G431/STM32G441 have the UART5 peripheral.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Boolean properties for STM32 ADC internal channels are not used anymore
and can be removed. It is replaced by channel number properties.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
In all STM32 dts, remove all reference to the following properties:
- has-temp-channel
- has-vref-channel
- has-vbat-channel
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that we have a binding to define the channel number for temperature
and Vref measurement, update all dtsi to include the information.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add some bindings to define STM32 ADC internal channels for:
- Temperature
- Vref
- Vbat
The goal is to transfer information to the dts instead of inside the
ADC driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Bugfix for the Cyclone V SoC DK ethernet driver need to add emac-index
in dts
- We remove the "local-mac-address" property from
dts/arm/intel_socfpga_std.dtsi to
boards/arm/cyclonev_socdk/cyclonev_socdk.dts, since this value is
dependant on the board / implementation and not universal to
the "intel_socfpga" package that it inherets from.
- The above is also true for the "status" property as the board
should enable the device.
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
Add three xbar nodes and four qdec nodes in the rt10xx devicetree include.
Add xbara to rt1052 in Kconfig.soc
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a driver for the NXP MCUX Quadrature Decoder. The driver
is simple and only implements the phase a and phase b inputs. The
module has additional features which can be added in future PRs.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce DT nodes for NETC complex and enable its usage for
s32z270dc2_r52 boards. Using PSI0 as default networking interface and
Switch Port0 as it's the only port available on this board.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Ethernet low-level driver for NXP S32 Network Controller
(NETC). Current driver allows to manage from Zephyr a Physical Station
Interface (SI) and/or a Virtual SI. The NETC has an integrated Ethernet
Switch. Currently the Switch is initialized from this driver with a
default configuration, and all ports are enabled and transparent for
the user. A separate Switch driver should be addressed in future patches.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 NETC External MDIO controller driver. Driver supports
a single instance, as current support is based on NXP S32Z/E SoCs.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 Message Receive Unit (MRU) driver based
of Mbox API. The MRU couples with a processor and allows to
receive messages from senders, which are other modules or
processors.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
On STM32L4 that probvide HSI48 clock, use it as 48MHz domain clock.
This impacts following devices:
-SDMMC
-RNG
-USB
Otherwise, when HSI48 is not available MSI is used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STMF412 and STM32F413 did not support CAN bus in Zephyr yet.
This adds the device tree entries to be able to use all 2, resp.
3 CAN controllers.
Signed-off-by: Tom Stirnkorb <tom@stirnkorb.me>
Remove the vref-mv = <3300>; property for all the ADC node of
the stm32 devices as it is set by default to 3300mV by the
dts/adc/st,stm32-adc.yaml
(Except for the stm32f303 vref is 3000mV)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Configure RNG domain clock and align it on USB (as this is the same clk).
This is not stricly required, as this configuration matches default
reset but its more consistent this way.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove SDMMC from f410 soc variant since it's not actually available.
Do this in package variant as F410 is included by f412 who has a SDMMC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide SDMMC domain clock, when required (because it is common)use
the same as the one selected by USB and RNG.
Otherwise, when available use HSI48, otherwise use the most handy (MSI,
sysclk ...).
PLLSAI is not used as not implemented for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
