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dts: bindings: dma controller supports mem2mem transfer

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This checks if the DMA controller supports or not
the memory-to-memory transfers. For DMA Version1,
in the stm32f2xx, stm32f4xx, stm32f7xx series,
only DMA instance 2 is able to transfer mem-to-mem.
For other series, with DMA Version2, there is no such a limitation.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2020-01-24 12:04:01 +01:00 • committed by Kumar Gala
commit 82799d2ae4
7 changed files with 3 additions and 7 deletions
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2
drivers/dma/dma_stm32.c
View file

@ -257,12 +257,14 @@ static int dma_stm32_configure(struct device *dev, u32_t id,
return -EINVAL;
}
#ifdef CONFIG_DMA_STM32_V1
if ((stream->direction == MEMORY_TO_MEMORY) &&
(!dev_config->support_m2m)) {
LOG_ERR("Memcopy not supported for device %s",
dev->config->name);
return -ENOTSUP;
}
#endif /* CONFIG_DMA_STM32_V1 */
if (config->source_data_size != 4U &&
config->source_data_size != 2U &&

1
dts/arm/st/f0/stm32f0.dtsi
View file

@ -317,7 +317,6 @@
reg = <0x40020000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
interrupts = <9 0 10 0 10 0 11 0 11 0>;
st,mem2mem;
status = "disabled";
label = "DMA_1";
};

1
dts/arm/st/f1/stm32f1.dtsi
View file

@ -265,7 +265,6 @@
reg = <0x40020000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0>;
st,mem2mem;
status = "disabled";
label = "DMA_1";
};

1
dts/arm/st/f3/stm32f3.dtsi
View file

@ -322,7 +322,6 @@
reg = <0x40020000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0>;
st,mem2mem;
status = "disabled";
label = "DMA_1";
};

1
dts/arm/st/l0/stm32l0.dtsi
View file

@ -186,7 +186,6 @@
reg = <0x40020000 0x400>;
interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
st,mem2mem;
status = "disabled";
label = "DMA_1";
};

2
dts/arm/st/l4/stm32l4.dtsi
View file

@ -316,7 +316,6 @@
reg = <0x40020000 0x400>;
interrupts = <11 0 12 0 13 0 14 0 15 0 16 0 17 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x1>;
st,mem2mem;
status = "disabled";
label = "DMA_1";
};
@ -327,7 +326,6 @@
reg = <0x40020400 0x400>;
interrupts = <56 0 57 0 58 0 59 0 60 0 68 0 69 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
st,mem2mem;
status = "disabled";
label = "DMA_2";
};

2
dts/bindings/dma/st,stm32-dma.yaml
View file

@ -16,7 +16,7 @@ properties:
st,mem2mem:
type: boolean
description: If the controller supports memory to memory transfer
description: If the DMA controller V1 supports memory to memory transfer
"#dma-cells":
const: 4