Commit graph

23353 commits

Author SHA1 Message Date
Marti Bolivar
6318750837 spi: stm32: fix spi_stm32_init()
It is incorrect to call spi_context_release() on an STM32
spi_stm32_data object's ctx field before data->ctx->config is first
set in spi_stm32_configure(). This is because spi_context_release()
reads ctx->config->operation. In particular, during spi_stm32_init(),
calling spi_context_release() reads the uninitialized memory in
data->ctx->config->operation.

Call spi_context_unlock_unconditionally() instead to properly increase
the semaphore count.

Without this patch, the first call to spi_transceive() can block
forever depending on the value of the uninitialized memory holding
data->ctx->config->operation.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-07-14 18:10:38 +03:00
Vinayak Kariappa Chettimada
9a13a0c732 Bluetooth: Add BUILD_ASSERT to check Tx and Rx thread priorities
Added BUILD_ASSERT check for Tx and Rx thread priorities.

The Tx thread priority shall be higher than Rx thread
priority in order to correctly detect transaction violations
in ATT and SMP protocols. The Number of Completed Packets
for a connection shall be processed before any new data is
received and processed for that connection.

The Controller's priority receive thread priority shall be
higher than the Host's Tx and the Controller's Rx thread
priority.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-07-12 13:50:51 +03:00
Erwin Rol
e3d8a2b34d driver: eth_stm32_hal: make phy address configurable
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Erwin Rol
ad8f83733c driver: eth_stm32_hal: disable hardware multicast filtering
Until Zephyr has infrastructure to enable/disable the
reception of multicast frames we disable the hardware
multicast frame filter completly and pass all multicast
frames to the upper layer and let that deal with them.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Erwin Rol
be88626695 pinmux: stm32: add ethernet controller pins
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Erwin Rol
85efae6b3d pinmux: stm32: directly return error if stm32_get_pin_config fails.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Erwin Rol
6e3782480e driver: eth_stm32_hal: Initial STM32 HAL based Ethernet driver
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-12 12:53:51 +03:00
Kumar Gala
65e72be8f7 devicetree: Generate CONFIG_UART_CONSOLE_ON_DEV_NAME from dt
We can use the chosen property "zephyr,console" to determine what uart
should be used as the console and find its name to generate a define for
CONFIG_UART_CONSOLE_ON_DEV_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-11 12:09:10 -05:00
Vinayak Kariappa Chettimada
e81fb85cad clock_control: nRF5x: Select 251-500ppm as default for 32kHz RCOSC
Frequency tolerance for LFRC after calibration for nRF5x
Series ICs is between 251 and 500 ppm as per Product
Specification. For more details refer to:
http://infocenter.nordicsemi.com/

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-07-11 10:29:46 -05:00
Andrew Boie
f253af2d30 drivers: timer: init earlier in boot sequence
By the time we get to POST_KERNEL, kernel services and kernel objects
should be available for use. This should include timers and the random
number generator, but we don't init the system clock until sometime
during the POST_KERNEL phase. Initialize it earlier.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-10 11:44:56 -07:00
Andrew Boie
65a9d2a94a kernel: make K_.*_INITIALIZER private to kernel
Upcoming memory protection features will be placing some additional
constraints on kernel objects:

- They need to reside in memory owned by the kernel and not the
application
- Certain kernel object validation schemes will require some run-time
initialization of all kernel objects before they can be used.

Per Ben these initializer macros were never intended to be public. It is
not forbidden to use them, but doing so requires care: the memory being
initialized must reside in kernel space, and extra runtime
initialization steps may need to be peformed before they are fully
usable as kernel objects. In particular, kernel subsystems or drivers
whose objects are already in kernel memory may still need to use these
macros if they define kernel objects as members of a larger data
structure.

It is intended that application developers instead use the
K_<object>_DEFINE macros, which will automatically put the object in the
right memory and add them to a section which can be iterated over at
boot to complete initiailization.

There was no K_WORK_DEFINE() macro for creating struct k_work objects,
this is now added.

k_poll_event and k_poll_signal are intended to be instatiated from
application memory and have not been changed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-10 11:44:56 -07:00
Geoff Gustafson
1405627c37 net: context: Use K_NO_WAIT instead of 0 for timeout
Signed-off-by: Geoff Gustafson <geoff@linux.intel.com>
2017-07-10 10:59:28 +03:00
Johan Hedberg
ca61452b8e Bluetooth: drivers: Make RX thread priority consistent
The controller and host-side RX threads recently had their priorities
lowered to 8. Make the driver RX threads consistent with this.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-07-07 10:43:58 -07:00
Yannis Damigos
1bc2fdc704 dts: arm: STM32 boards use DT to configure I2C
Configure I2C using DT for the following STM32 boards:

disco_l475_iot1
nucleo_f401re
96b_carbon
olimexino_stm32

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-07-07 10:31:34 -05:00
Justin Watson
0c6883f25a arm: dts: Modified Atmel SAM family processor's UART to DTS.
The SAM4S, SAM3X, SAME70 all use the uart_sam.c serial
driver. This patch puts the configuration in DTS and
out of Kconfig. The SAME70 uses the USART as well.
USART DTS support for the SAME70 is also in this patch.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-07-07 10:31:34 -05:00
Kumar Gala
9eddc82be3 i2c: remove I2C Slave Read config
The I2C Slave Read support isn't well defined and not actually supported
by any i2c driver at this point.  We can add this back when slave mode
is more thought out.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-07 10:01:38 -05:00
Erwin Rol
2fc9dc61d4 drivers: stm32: random: Initial STM32 random number generator driver
Add a STM32 LL based driver for the RNG processor. The RNG processor
is a random number generator, based on a continuous analog noise, that
provides a random 32-bit value to the host when read. The RNG passed
the FIPS PUB 140-2 (2001 October 10) tests with a success ratio of 99%.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2017-07-07 07:27:39 -05:00
Bogdan Davidoaia
e392ef2285 drivers: ieee802154: kw41z: add support for KW40Z
Add support for KW40Z in the KW41Z IEEE 802.15.4 driver as both chips
expose almost the same radio registers.

Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
2017-07-06 14:20:32 -05:00
Bogdan Davidoaia
3389ee4eb4 drivers: ieee802154: kw41z: fix issue in RX sequence
The chip seems to require a wait time before reading packet
data after the RX sequence done interrupt, as imidiate reading
of it will indicate a packet size of zero and cause the RX
sequence done to be continually retriggered.

In addition, the extra clearing of the interrupt flags can be
removed, as this is already done at the beginning of the isr.

Jira: ZEP-2278
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
2017-07-06 14:20:32 -05:00
Bogdan Davidoaia
2b1dfbcd7c drivers: ieee802154: kw41z: remove unnecessary cast for PKT_BUFFER_RX
The cast to u16_t in not needed as PKT_BUFFER_RX already is
of that type.

Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
2017-07-06 14:20:32 -05:00
Anas Nashif
3ec3276163 kconfig: fixed stray Kconfig variables
Those were found using:

  ./scripts/checkconfig.py

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-06 10:34:41 -05:00
Kumar Gala
4c233bbc05 i2c: stm32: fix build issue
When building tests/kernel/test_build/test_debug on disco_l475_iot1 we
get the following build error:

drivers/i2c/i2c_ll_stm32_v2.c: In function ‘stm32_i2c_configure_timing’:
ext/hal/st/stm32cube/stm32l4xx/soc/stm32l4xx.h:207:38: error: ‘timing’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
                                      ^
drivers/i2c/i2c_ll_stm32_v2.c:265:8: note: ‘timing’ was declared here
  u32_t timing;
        ^~~~~~

Fix by initializing timing to 0.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-06 09:53:00 -05:00
Anas Nashif
4c56b90fd7 drivers: slip: move doxygen header
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-05 12:43:13 -04:00
Anas Nashif
9ed80ad82f drivers: ataes132a: Fix Kconfig name
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-05 12:43:13 -04:00
Anas Nashif
68d7a207ae ethernet: fix Kconfig option for ETHERNET
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-07-05 12:43:13 -04:00
Neil Armstrong
ed608ba2d8 pinmux: stm32: nucleo_l432kc: Add SPI pins
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Neil Armstrong
f7bee90a5f pinmux: stm32: nucleo_l476rg: Fix SPI Pinmux
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Erwan Gouriou
a9b3ce3dc4 pinmux: stm32: nucleo_f334r8: add support for SPI
Following implementation of LL based SPI driver,
add SPI support on nucleo_f334r8 board of STM32F3 series.

Change-Id: Ifbe39b1f2cecdd7db23be9c6943a914a155ebd77
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Jorge Ramirez-Ortiz
fbf21932d3 pinmux: stm32: nucleo_f401re: Add support for SPI
Add SPI pin for the nucleo_f401re pinmux.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Neil Armstrong
9033fb2f01 spi: add SPI driver for STM32 family
Add a SPI master and slave driver for the L4, F4 and F3 STM32
SoCs families.

Change-Id: I1faf5c97f992c91eba852fd126e7d3b83158993d
Origin: Original
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Tested-by: Lee Jones <lee.jones@linaro.org>
2017-07-01 08:36:51 -04:00
Jorge Ramirez-Ortiz
dd2eeaf352 pinmux: stm32f4: Add SPI2 pins on PB12, PB13, PB14 & PB15
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Jorge Ramirez-Ortiz
3ebb412fa9 pinmux: stm32f4: Add SPI1 pins on PA4, PA5, PA6 & PA7
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-07-01 08:36:51 -04:00
Jorge Ramirez-Ortiz
21fbc9b07e drivers: i2c: stm32 LL F1/F4 (v1) STM32 F3/L4X (v2)
Supports STM32 F1/F4 (v1 controller) and STM32 F3/L4X (v2
controller)

v1 could also support L1X.
v2 could also support F7X.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Reviewed-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Yannis Damigos <giannis.damigos@gmail.com>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-01 08:36:51 -04:00
Yannis Damigos
4668ecbbd2 boards: arm: Add STM32F3DISCOVERY board
Add support for STM32F3DISCOVERY board.

Origin: original

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-07-01 08:36:51 -04:00
Yannis Damigos
6003b1d0d2 interrupt_controller: add STM32F303XC EXTI lines number
Add the EXTI lines number for the STM32F303XC

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-07-01 08:36:51 -04:00
Yannis Damigos
8a646c59bf pinmux: boards: add I2C to carbon/lf33fr8/f401re/olimexino
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-01 08:36:51 -04:00
Yannis Damigos
ecbb3b6c04 pinmux: stm32 F1X/F3X/F4X: add I2C
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-07-01 08:36:51 -04:00
Kumar Gala
ccff19ed21 serial: nsim: Add missing SERIAL_HAS_DRIVER in Kconfig
The nsim driver was missing the select for SERIAL_HAS_DRIVER

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-29 07:07:31 -04:00
Kumar Gala
461b5018d3 serial: introduce SERIAL_SUPPORT_INTERRUPT Kconfig option
As not all drivers support interrupts we don't have a means to know if
we can allow UART_INTERRUPT_DRIVEN to be enabled and thus various
Kconfig options that select UART_INTERRUPT_DRIVEN.  Some drivers have a
interrupts, however not all do.  So introduce a Kconfig option to let us
know what the driver actually supports.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-29 07:07:31 -04:00
Johann Fischer
3dd51d52a2 drivers: usb: use generic option name for log level
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2017-06-28 09:02:27 -04:00
Andrzej Puzdrowski
8b7a8448ab Drivers: flash: NRF5x: synchronous mode for co-operation with BLE radio
In added mode flash operation are performed in timeslice
(in radio idle time).
Kconfig for mode enabling CONFIG_SOC_FLASH_NRF5_RADIO_SYNC.

Erase and write API implementations were rewritten and preserved against
concurrent execution.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-28 12:29:50 +02:00
Siddharth Chandrasekaran
f7705af136 boards: arm: Add support for STM32 Minimum Development Board
Add configuration, documentation, pinmux, fixup and dts support for
STM32F103x8 based Minimum System Development board.

Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2017-06-23 15:05:10 -05:00
Savinay Dharmappa
114db109ef samples: drivers/net: apps: Resolve Kconfig dependency
as config SPI_CS_GPIO was selecting GPIO instead it
should just depend on it. This patch is a fix for
ZEP-2071 jira.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-06-22 19:51:05 -04:00
Kumar Gala
49ebc09a52 clock: stm32: Cleanup use of C99 types
We introduced some see C99 types, so convert them over to the Zephyr
types.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-22 13:47:28 -04:00
Kumar Gala
fb56b39cdd timer: xtensa_sys: Cleanup use of C99 types
We introduced some see C99 types, so convert them over to the Zephyr
types.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-22 13:47:28 -04:00
Kumar Gala
4b82e2bc75 flash: stm32l4x: Cleanup use of C99 types
We introduced some see C99 types, so convert them over to the Zephyr
types.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-22 13:47:28 -04:00
Kumar Gala
b71b86ed03 spi: Cleanup use of C99 types
We introduced some see C99 types, so convert them over to the Zephyr
types.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-22 13:47:28 -04:00
Savinay Dharmappa
0ea423d976 drivers: serial: Add device support for serial driver
patch enables qmsi serial driver to pick baudrate and name
from device tree instead of Kconfig for UART0 and UART1
instance

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-06-22 10:23:39 -05:00
Inaky Perez-Gonzalez
271c518ec6 uart_esp32: alter the uart.h include order to avoid warning
The esp-idf package contains on the BSP a definition of the BIT macro
unconditionally #defined when rom/uart.h is #included. When Zephyr's
uart.h (which pulls in include/misc/util.h) that conditionally

This generates a compile warning on the re-definiton of BIT by the
esp-idf package.

Thus include uart.h after esp-idf's rom/uart.h to have BIT not
re-defined thanks to Zephyr's conditional definition.

Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2017-06-21 19:05:19 -04:00
Ivan Grokhotkov
d58d5d1265 xtensa: esp32: configure default UART using ROM functions
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00