Commit graph

23353 commits

Author SHA1 Message Date
Loic Poulain
fa2da6713b usb: stm32: Fix null dereference in ep_write
ret_bytes param is optional and then can be NULL.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2017-11-09 09:13:14 -05:00
Loic Poulain
4a2e967a87 usb: stm32: Fix TX FIFO overwrite
In the same way as dw driver, check that FIFO is empty before
writing any new data. This patch introduces a boolean semaphore
which is requested before any new TX transfer and released on
transfer completion.

This fixes usb-ecm support on 96b_carbon board.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2017-11-09 09:13:14 -05:00
Sebastian Bøe
0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe
12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
David B. Kinder
7e3ed1465f doc: fix Kconfig misspellings
Kconfig files are processed to create configuration
option documentation.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-11-08 13:50:35 -05:00
Gustavo Lima Chaves
9bb07ff69a jailhouse: add support for x2APIC mode for all LOAPIC accesses
Besides the fact that we did not have that for the current supported
boards, that makes sense for this new, virtualized mode, that is meant
to be run on top of full-fledged x86 64 CPUs.

By having xAPIC mode access only, Jailhouse has to intercept those MMIO
reads and writes, in order to examine what they do and arbitrate if it's
safe or not (e.g. not all values are accepted to ICR register). This
means that we can't run away from having a VM-exit event for each and
every access to APIC memory region and this impacts the latency the
guest OS observes over bare metal a lot.

When in x2APIC mode, Jailhouse does not require VM-exits for MSR
accesses other that writes to the ICR register, so the latency the guest
observes is reduced to almost zero.

Here are some outputs of the the command line

  $ sudo ./tools/jailhouse cell stats tiny-demo

on a Jailhouse's root cell console, for one of the Zephyr demos using
LOAPIC timers, left for a couple of seconds:

Statistics for tiny-demo cell (x2APIC root, x2APIC inmate)

COUNTER                              SUM   PER SEC
vmexits_total                          7         0
vmexits_management                     3         0
vmexits_cr                             2         0
vmexits_cpuid                          1         0
vmexits_msr                            1         0
vmexits_exception                      0         0
vmexits_hypercall                      0         0
vmexits_mmio                           0         0
vmexits_pio                            0         0
vmexits_xapic                          0         0
vmexits_xsetbv                         0         0

Statistics for tiny-demo cell (xAPIC root, xAPIC inmate)

COUNTER                              SUM   PER SEC
vmexits_total                       4087        40
vmexits_xapic                       4080        40
vmexits_management                     3         0
vmexits_cr                             2         0
vmexits_cpuid                          1         0
vmexits_msr                            1         0
vmexits_exception                      0         0
vmexits_hypercall                      0         0
vmexits_mmio                           0         0
vmexits_pio                            0         0
vmexits_xsetbv                         0         0

Statistics for tiny-demo cell (xAPIC root, x2APIC inmate)

COUNTER                              SUM   PER SEC
vmexits_total                       4087        40
vmexits_msr                         4080        40
vmexits_management                     3         0
vmexits_cr                             2         0
vmexits_cpuid                          1         0
vmexits_exception                      0         0
vmexits_hypercall                      0         0
vmexits_mmio                           0         0
vmexits_pio                            0         0
vmexits_xapic                          0         0
vmexits_xsetbv                         0         0

See that under x2APIC mode on both Jailhouse/root-cell and guest, the
interruptions from the hypervisor are minimal. That is not the case when
Jailhouse is on xAPIC mode, though. Note also that, as a plus, x2APIC
accesses on the guest will map to xAPIC MMIO on the hypervisor just
fine.

Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-11-07 08:58:49 -05:00
Gustavo Lima Chaves
97a8716a4f x86: Jailhouse port, tested for UART (# 0, polling) and LOAPIC timer
This is an introductory port for Zephyr to be run as a Jailhouse
hypervisor[1]'s "inmate cell", on x86 64-bit CPUs (running on 32-bit
mode). This was tested with their "tiny-demo" inmate demo cell
configuration, which takes one of the CPUs of the QEMU-VM root cell
config, along with some RAM and serial controller access (it will even
do nice things like reserving some L3 cache for it via Intel CAT) and
Zephyr samples:

   - hello_world
   - philosophers
   - synchronization

The final binary receives an additional boot sequence preamble that
conforms to Jailhouse's expectations (starts at 0x0 in real mode). It
will put the processor in 32-bit protected mode and then proceed to
Zephyr's __start function.

Testing it is just a matter of:
  $ mmake -C samples/<sample_dir> BOARD=x86_jailhouse JAILHOUSE_QEMU_IMG_FILE=<path_to_image.qcow2> run
  $ sudo insmod <path to jailhouse.ko>
  $ sudo jailhouse enable <path to configs/qemu-x86.cell>
  $ sudo jailhouse cell create <path to configs/tiny-demo.cell>
  $ sudo mount -t 9p -o trans/virtio host /mnt
  $ sudo jailhouse cell load tiny-demo /mnt/zephyr.bin
  $ sudo jailhouse cell start tiny-demo
  $ sudo jailhouse cell destroy tiny-demo
  $ sudo jailhouse disable
  $ sudo rmmod jailhouse

For the hello_world demo case, one should then get QEMU's serial port
output similar to:

"""
Created cell "tiny-demo"
Page pool usage after cell creation: mem 275/1480, remap 65607/131072
Cell "tiny-demo" can be loaded
CPU 3 received SIPI, vector 100
Started cell "tiny-demo"
***** BOOTING ZEPHYR OS v1.9.0 - BUILD: Sep 12 2017 20:03:22 *****
Hello World! x86
"""

Note that the Jailhouse's root cell *has to be started in xAPIC
mode* (kernel command line argument 'nox2apic') in order for this to
work. x2APIC support and its reasoning will come on a separate commit.

As a reminder, the make run target introduced for x86_jailhouse board
involves a root cell image with Jailhouse in it, to be launched and then
partitioned (with >= 2 64-bit CPUs in it).

Inmate cell configs with no JAILHOUSE_CELL_PASSIVE_COMMREG flag
set (e.g. apic-demo one) would need extra code in Zephyr to deal with
cell shutdown command responses from the hypervisor.

You may want to fine tune CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC for your
specific CPU—there is no detection from Zephyr with regard to that.

Other config differences from pristine QEMU defaults worth of mention
are:

   - there is no HPET when running as Jailhouse guest. We use the LOAPIC
     timer, instead
   - there is no PIC_DISABLE, because there is no 8259A PIC when running
     as a Jailhouse guest
   - XIP makes no sense also when running as Jailhouse guest, and both
     PHYS_RAM_ADDR/PHYS_LOAD_ADD are set to zero, what tiny-demo cell
     config is set to

This opens up new possibilities for Zephyr, so that usages beyond just
MCUs come to the table. I see special demand coming from
functional-safety related use cases on industry, automotive, etc.

[1] https://github.com/siemens/jailhouse

Reference to Jailhouse's booting preamble code:

Origin: Jailhouse
License: BSD 2-Clause
URL: https://github.com/siemens/jailhouse
commit: 607251b44397666a3cbbf859d784dccf20aba016
Purpose: Dual-licensing of inmate lib code
Maintained-by: Zephyr

Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-11-07 08:58:49 -05:00
Gustavo Lima Chaves
1a8e72c913 loapic_intr: factor (out) APIC accesses in static functions
This will accomodate newer access models later, with variations of those
functions' contents.

Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-11-07 08:58:49 -05:00
Youvedeep Singh
833025dd94 timer: xtensa_sys_timer: Tickless Kernel Implementation for Xtensa
Implement Tickless Kernel support for Xtensa Architecture.

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-07 08:17:40 -05:00
Bobby Noelte
2ce56e0100 drivers: serial: provide support for stm32f091
Support the USARTs of the ST STM32F091xx SoC.

Signed-off-by: Bobby Noelte <b0661n0e17e@gmail.com>
2017-11-06 11:39:16 -06:00
Youvedeep Singh
26de2ec1cb gpio: Add APIs for enabling/Disabling GPIOTE interrupts for nrf52 SOC.
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-06 09:29:10 -05:00
Youvedeep Singh
affbea7caf gpio: Add support for SENSE configuration for nrf SOC GPIO.
nrf SOCs are capable of waking from Low power state or
Deep Sleep state using sense configuration.
So adding support for this in nrf GPIO driver.

Jira: ZEP-2623

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-11-06 09:29:10 -05:00
82118c712f net: fix the build rules for drivers/net.
The Makefile was using the obj-$FOO = form instead of the ob-$FOO +=
form, so if both slip and loopback are enabled then only loopback will
get built.

Signed-off-by: Michael Hope <mlhx@google.com>
2017-11-06 10:24:05 +02:00
Erwan Gouriou
2a7efb7419 sensors: hts221: provide name to Kconfig choice
In order to be able to default Kconfig "Trigger mode" choice
in a board Kconfig.defconfig, this commit provides it with a name.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-11-03 13:52:57 -05:00
Erwan Gouriou
2e20f49167 sensors: lis3mdl: provide name to Kconfig choice
In order to be able to default Kconfig "Trigger mode" choice
in a board Kconfig.defconfig, this commit provides it with a name.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-11-03 13:52:57 -05:00
Daniel Wagenknecht
c404c3b241 i2c: fix issue of stm32-i2c-v2 (F0/F3/F7) driver hanging in endless loop
Fixes #4429
Driver didn't work properly when a transfer consisted of multiple
messages.
Fix doesn't use auto end mode anymore. msg_done function waits for
transfer to complete and issues stop condition if necessary.

Tested with stm32f3_disco board and samples/drivers/i2c_fujitsu_fram
example adapted to use I2C_1 as I2C_DEV

Signed-off-by: Daniel Wagenknecht <wagenknecht@clage.de>
2017-11-03 13:52:57 -05:00
Ramakrishna Pallala
56cab64d70 drivers: crypto: Fix the scope of ataes132a crypto_driver_api functions
Limit the scope of crypto_driver_api functions to driver file only.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2017-11-03 14:27:41 -04:00
Ramakrishna Pallala
bb5a2985d1 drivers: crypto: Fix mbedtls Kconfig dependencies
Fix mbedtls shim driver Kconfig dependencies.

Limit the scope of crypto_driver_api functions to driver file only.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2017-11-03 14:27:41 -04:00
Ramakrishna Pallala
4742f8e010 drivers: crypto: Fix TinyCrypt Kconfig dependencies
Fix TinyCrypt shim driver Kconfig dependencies.

Limit the scope of crypto_driver_api functions to driver file only.

Remove dead code from crypto_tc_shim_priv.h

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2017-11-03 14:27:41 -04:00
Piotr Mienkowski
4487c935fe drivers: gpio: deprecate GPIO_PIN_ENABLE, GPIO_PIN_DISABLE
GPIO_PIN_ENABLE, GPIO_PIN_DISABLE configuration constants overlap
functionality provided by pinmux driver. They usage makes the API
inconsistent. They are almost uniformly ignored by the existing device
drivers. Only few of them take these constants into account.

This commit deprecates usage of the two configuration constants.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-11-02 18:46:30 -04:00
Leandro Pereira
1eed91f024 drivers: entropy: Only show STM32 entropy driver on if applicable
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira
8b883a61a3 subsys/random: sys_rand32_get() implementation that uses entropy API
Instead of every hardware number generator driver providing an
implementation of this function, use the random device API to
centralize the implementation of this function.

This is a very simplistic function that can be seen as a stepping stone
to refactor the random number generation in Zephyr.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira
da9b0ddf5b drivers: Rename random to entropy
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware.  Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira
adce1d1888 subsys: Add random subsystem
Some "random" drivers are not drivers at all: they just implement the
function `sys_rand32_get()`.  Move those to a random subsystem in
preparation for a reorganization.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Leandro Pereira
0dfee8f254 drivers: eth_enc28j60: Check return value of spi_transceive()
Coverity-ID: 178240
Coverity-ID: 178241
Coverity-ID: 178243

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-10-31 18:52:09 -04:00
Andrew Boie
b7442a0a6b drivers: fix handler filenames
Fixes: #4654

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-31 12:51:22 -07:00
Anas Nashif
035814efc6 boards: move pinmux driver to board/soc dir
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 12:32:34 -04:00
Anas Nashif
4fb789701b drivers: pinmux: PINMUX_CC2650 depends on GPIO
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 12:32:34 -04:00
Anas Nashif
780324b8ed cleanup: rename fiber/task -> thread
We still have many places talking about tasks and threads, replace those
with thread terminology.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-30 18:41:15 -04:00
Andrew Boie
b93f59e15c drivers: uart: add system call handlers
Certain interrupt-driven APIs were excluded as they are intended
only to be called from ISRs, or involve registering a callback
which runs in interrupt context.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
0cb0447493 drivers: spi: add system call handlers
spi_transceive_async() omitted as we don't support k_poll objects
in user mode (yet).

The checking for spi_transceive() is fairly complex as we have to
validate the config struct passed in along with device instances
contained within it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
9a3f3aa218 drivers: random: add random_get_entropy sys call
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
d3ec6654f5 drivers: gpio: add system call handlers
Many APIs had two versions, by port and by pin, which called the same
API with different parameters. This has been reorganized to reduce
the number of system calls.

Callback registration API skipped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
4d91f5abe9 drivers: pinmux: add system call handlers
pinmux_pin_get() needs memory validated for the func parameter since
it's a pointer that gets written to.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
9ca42fb033 drivers: rtc: add system calls
rtc_set_config() omitted since it registers a callback.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
2e60b24a80 drivers: ipm: add system calls
ipm_register_callback() omitted since it registers a callback.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
66aefcfcf4 drivers: flash: add system calls
The page_layout API returns pointers to kernel memory and is not
exposed to user mode. This is fine for flash_get_page_count()
and flash_get_page_info APIs since these copy the values, but some
redesign work will be needed to get flash_page_foreach() working in
user mode since we do not want the callback running in a privileged
state.

Due to the way that (even unimplemented) system call prototypes are
generated, the definition of struct flash_pages_info needed to be
moved outside of the #ifdef.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
678314b7b2 drivers: counter: add syscall handlers
counter_set_alarm() registers a callback and has been skipped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
9c37af10ec drivers: aio_comparator: add system calls
aio_cmp_configure() registers a callback and is skipped.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
0f66b9f7d8 drivers: pwm: add system call handlers
pwm_pin_set_usec now defined in terms of the other two APIs.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
c93a4789cb drivers: adc: add system call handlers
Straightforward conversion for adc_enable/disable.

adc_read() uses a sequence table, which points to an array
of struct adc_seq_entry, each element pointing
to memory buffers. Need to validate all of these as being readable
by the caller, and the buffers writable.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
2a2a855aa8 drivers: i2c: add system call handlers
i2c actually only has two entry points into the driver,
i2c_configure and i2c_transfer. All the other APIs are derived
from these.

All derived APIs now just call i2c_transfer() with appropriate args.

The handler for i2c_transfer() needs to examine the message array
and validate all the buffers involved depending on whether we are
reading or writing to them.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
Andrew Boie
74446381d1 sensors: move userspace handlers location
Place driver handlers with the drivers, not somewhere separate under
subsys/

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-30 13:20:19 -07:00
KaSroka
bea5ccf7ea drivers: 15.4: nrf5: Add timeout when waiting for tx to complete
Waiting for tx to complete should timeout after 10ms
instead of blocking forever in case ack is not received.

Signed-off-by: Kamil Sroka <kamil.sroka@nordicsemi.no>
2017-10-30 12:03:03 +02:00
Andrei Emeltchenko
fe9dee0107 usb: dw: Add sleep before FIFO flash
Adding sleep before TX FIFO flash fixes splitting networking packets
sent over USB endpoints making ECM broken since there is no flow
control other then frame sizes.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-10-28 14:38:19 -04:00
Andrei Emeltchenko
b722dc589e usb: dw: Fix debug log specifier for FIFO not empty
The situation when FIFO is not empty is not a bug and it is spamming
console when only bugs are enabled.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2017-10-28 14:38:19 -04:00
Andy Ross
5aee94e4cf usb_dw_dc: Cleanup: write DIEPCTL register just once
The enable and clear NAK bit can be legally written together, do it in
just one write.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2017-10-28 14:38:19 -04:00
Andy Ross
eebb17ca52 usb_dc_dw: Correctness: use bytewise I/O in FIFO fill
The Designware FIFO is filled in units of 32 bit words, but the buffer
we are passed is not guaranteed to be a multiple of 4 bytes long, nor
aligned on a 4-byte boundary.  So in theory we are reading 0-3 bytes
of unused garbage from the end of the array.

That's currently benign on supported platforms with this hardware,
which all support misaligned reads.  But not all do.  And the incoming
arrival of memory protection opens the possibility that those extra
bytes would cross a protection boundary and cause a crash or security
bug.

Do this right.

(Note that this is fixed to little endian byte order.  The Designware
databook is frustratingly silent on the endianness it expects, but
existing hardware I can see is definitely LE and I see a few spots in
the Linux dwc2 driver that likewise assume LE).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2017-10-28 14:38:19 -04:00
Andy Ross
f591e58211 usb_dc_dw: Correctly assign endpoint FIFOs
The designware hardware in dedicated FIFO mode (which is all we
support right now for lack of shared-FIFO hardware) has one hardware
FIFO per IN (i.e. transmit) endpoint.  But it doesn't assign them on
its own, it's the drivers responsibility to populate the TxFNum field
of the DIEPCTL registers with integer indices corresponding to the
desired FIFO.

We weren't doing that, which meant that all IN endpoints were sharing
the same FIFO zero which is supposed to be dedicated to EP0 control
transfers.  The net effect is that sometimes outbound transfers would
be corrupted, showing data from the wrong endpoint.  More often that
not this would leak from control transfers over to the
higher-bandwidth bulk endpoints of the application, but occasionally
you'd see a control transfer itself get borked and the USB device
would glitch.

Get this right and set the FIFOs properly.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2017-10-28 14:38:19 -04:00
Andy Ross
e6874a0c61 usb_dw_dc: Fix locking correctness
There is no particular reason this spot in usb_dw_tx() cannot be
reached by racing threads on the same endpoint, though existing API
usage in the tree is all unithreaded.  The FIFO state read at the top
of the function must still be true at the bottom or else the packet
byte count will be corrupt.

Also, as described in an existing comment, the databook has some
scary-sounding warnings about access to the registers during FIFO
operations, even if they "should" be on separate endpoints and
unrelated.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2017-10-28 14:38:19 -04:00