Adds use of CHARGER_PROP_DISCHARGE_CURRENT_NOTIFICATION and
CHARGER_PROP_SYSTEM_VOLTAGE_NOTIFICATION_UV to the charger
sample application.
Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Implement bind() and recvfrom() for UDP sockets. This is achived by
setting remote field in net_pkt which in return makes recvfrom() fill
in *src_addr. This is only implemented for passiv mode and CIPDINFO needs
to be enabled. Also set net_if to non-dormant when enabling AP mode to
make binding to a port and address possible.
Signed-off-by: John Johnson <john.filip.johnson@gmail.com>
The sys_mm_drv_unmap_page function first replaced the tlb entry with
the default one and then read the physical address that was mapped.
However, it was already overwritten, so it always release the default
physical address instead of the truly mapped one.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added sys_mm_drv_update_page_flags function that allows to change access
flags to a already mapped memory region.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Compare value and DAC resolution in `dac_write_value` and return -EINVAL
if the value is above supported resolution.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
This patch handles multiple interrupt lines for errors. Each of the
4 DW SPI error interrupts (txo_err, rxo_err, rxu_err, mst_err) can
use a different line of the GIC, instead of using a single line of
the GIC for all error interrupts (err_int).
Signed-off-by: Julien Panis <jpanis@baylibre.com>
This patch manages DW SPI driver MMIO region. As a result, the driver now
runs properly on 64 bit platforms.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
When CONFIG_SYSTEM_SLOPPY_IDLE is not set, then system
can sleep for -1 means waking Up at the max possible
counter value (INT_MAX)
When CONFIG_SYSTEM_SLOPPY_IDLE is set sleeping K_TICKS_FOREVER
means never wakingUp
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Provide multiple write transaction support for BlueNRG-MS, st_hci_spi_v1
protocol. Since by default, BlueNRG-MS write buffer supports up to 127
bytes; however, it is possible to have consecutive write transactions
so as to send data more than 127 bytes.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Added IS_ALIGNED macro to check if a pointer is aligned to
a given alignment. Additionally, removed a macro with a
conflicting name in drivers/crypto_intel.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Adds conditional usage of locking mechanisms to allow building
without multithreading.
Signed-off-by: Mateusz Michalek <mateusz.michalek@nordicsemi.no>
Now RRAMC is set to use up to 512 B burst writes by default as most
time effective.
Requested slot time was changed to 8000 us for that case, as this is
required in order to hold the longest write operation.
Drivers differs slot duration depending on configured RRAMC buffers count
(CONFIG_NRF_RRAM_WRITE_BUFFER_SIZE).
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
When radio-synchronization was on
(CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE=n) context of writing was shifted
by 4 instead of write-length (this caused redundant, self-shortening
writes to the same block.)
write-len was unset when requested write len was less than
RRAM_MAX_WRITE_BUFFER.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Added synchronization with BLE radio operation to the RRAM flash
driver. The implementation is using framework which is already
provided for nrf52's flash driver.
Additional added resource locking mechanism while driver does writing
which solves mutual exclusion write access problem.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Added a simple driver for RRAM. It is implemented as a flash driver,
because the "RRAM eFlash" macro obeys flash-like constraints.
Although users are not required to erase before write.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Add driver for ScioSense ENS160 multi-gas sensor. The driver includes
support for I2C and SPI, attributes for setting temperature and
humidity compensation and data ready trigger.
Also add ScioSense to the list of vendor prefixes.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
Process the GPIO_INT_WAKEUP flag and set appropraite bits
in the SoC to wakeup the system from deep sleep mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The network tests at tests/net use simulated network interfaces
and set CONFIG_NET_TEST to indicate that. If the config option
is set, then we do not want any extra Ethernet driver to
complicate the testing scenario so all external Ethernet
network interfaces should be disabled.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Cast val1 from sensor_value before multiplication in order to avoid
integer overflow, as indicated by Coverity CID 347136.
Signed-off-by: Renato Soma <renatoys08@gmail.com>
PR #64399 introduced checks for out-of-bounds filter IDs
in CAN drivers, along with logging of said IDs; however,
the call to LOG_ERR in the native POSIX/Linux driver is
missing the 'filter_id' argument.
This commit adds the missing argument to ensure proper
data is printed when the LOG_ERR call is performed.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The pin in the loop start counting from 0, so the condition of the
for loop should not be equal to num_pins.
Fixes#69118
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Clearing virtual wire interrupt after calling handler may cause next
interrupt miss if the same virtual wire changes due to action in handler.
As the interrupt source is read from register, it can be cleared before
calling handler to avoid next interrupt miss due to action/delay in the
callback handler.
Signed-off-by: Venkataramana Kotakonda <venkataramana.kotakonda@intel.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69129
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69133
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69132
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69131
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use K_KERNEL_STACK_SIZEOF() for calculating thread stack size, as this
takes K_KERNEL_STACK_RESERVED into account.
Fixes: #69130
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix missing check of the return value of `bq25180_set_charge_current`
function, resulting in logically dead code, as indicated by Coverity
CID 347197.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
- Fix using custom setup function
- Enable pRegOverrideTxStd and pRegOverrideTx20 in
ieee802154_cc13xx_subg_radio_div_setup struct
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
The driver seems to be designed to use the very last byte of the
buffer(scan, connect), so null terminating the status query
might have unintended consequences.
However we should not use strlen to determine the ssid_len,
to avoid depending on the following buffer(bssid) to be zeroed.
Related to CID 316354
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Clearing virtual wire interrupt after calling callback may cause
interrupt miss if the same virtual wire changes due to action
in handler.
e.g. HOST_RST_WRN pulse within 50 us
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
device power management is not yet supported with eth_mcux
except on the kinetis series, but this should not break
the build for other platforms when PM_DEVICE is set
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
A division by 0 has once been observed inside
intel_adsp_hda_dma_host_reload(). It is apparently caused by a
preceding logic or hardware error, but in any case values, read from
the hardware should be checked for 0 before being used as a divisor.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Due to a typo it is not possible to select the sub-clock oscillator
(SOSC) as a clock source for an RA Microcontroller. This patch resolves
the issue.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
Fix handling bus-off events in the Bosch M_CAN driver backend:
- Cancel all pending TX buffers when entering bus-off state
- Call all pending TX buffer callbacks with -ENETUNREACH when entering
bus-off
- Automatically initiate bus-off recovery if
CONFIG_CAN_AUTO_BUS_OFF_RECOVERY=y
Fixes: #68953
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
If the IPv6 DNS address is not a valid address, DNS will fallback
to the IPv4 DNS address.
Fix copying the IPv4 address to the IPv6 address by using
the IPv6 address destination length.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The lower bits of the brightness control registers were erroneously
shifted even though FIELD_PREP already does the shifting. In practice,
the effect is negliglible but of course should be fixed.
Also add missing parenthesis around shifting operations to satisy static
analysis.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Replace slave_register with target_register and slave_unregister
with target_unregister.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Driver BBRAM for STM32 had a compilation error: "unknown type name
'RTC_TypeDef'" due to missing include file.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The conversion of the raw sensor value overflows because
only a 32 bit multiplication is executed.
Fix the issue by promoting the raw sensor value to uint64_t before
executing the multiplication.
Analysis:
The current implementation overflows for all raw values grater
than 9544(14-bit).
But according to the datasheet the sensor has a maximum resolution of
20-bit. So Multiplying that value with 450.000 would need at least 39
bit to avoid an overflow, hence do it using 64-bit arithmetic.
Fixes CID 330657
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
data->rtc_base is not being used anywhere while data->rtc_registers is
only used as a temporary variable. Remove them from the driver.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
UART_RX_RDY event can be generated from UARTE interrupt or k_timer
handler. When ENDRX event occurs then k_timer is stopped (it can
be restarted if there is another buffer provided). However, if UARTE
interrupt priority is higher than k_timer priority (RTC is used
underneath) then k_timer handler may still be executed later.
K_timer notifies new bytes based on RXDRDY HW event which is
counter by the TIMER (using PPI). It may happen that RXDRDY
event arrives due to byte received into RX FIFO but since there is
not buffer provided it stays in that FIFO. Given all this, it
was possible that RX_RDY event was reported from ENDRX UARTE event,
timer was stopped but because UARTE interrupt had higher priority
timer handler is executed after UARTE interrupt is handled. In
timer handler TIMER counter reports more bytes and calls
UART_RX_RDY event with null buffer and non-zero amount of bytes.
Fixed by generating UART_RX_RDY event only if RX buffer is not
null.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
No need to check if an uint8_t is greater or equal 0 in
lp50xx_set_brightness.
Fixes CID 322654
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The reference document says that the formula for negative
temperatures has two minus signs missing.
fixes#68710
Signed-off-by: Tobias Röhmel <tobias.roehmel@rwth-aachen.de>
The point of this commit is to allow users to request specific
channels. The following code snippet shows how this may now be
achieved:
int requested_channel = 5;
int ret = dma_request_channel(dev, &requested_channel);
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
After #63289, multi-level interrupts are now encoded using
macro magic. This means that using the generic DT_INST_IRQ_BY_IDX()
to fetch the INTID is no longer an option as the queried INTID
will be the one specified through the node's `interrupts`
properties. To fix this, switch to using DT_INST_IRQN_BY_IDX()
which will return the correctly encoded INTID.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Currently, the number of channels supported by the controlled
is computed based on the size of the channel array. This
works well only if there's no gaps (i.e: "dma-channels" property
is used or "valid-channels" property is used with contiguous
channels) but will break if there are any gaps. For instance,
if the user wants to use channels 16 and 17 and specifies them
through the "valid-channels" property, they won't be allowed
to do so because dma_request_channels() will stop at channel 1.
As such, to fix this, simply use the number of channels from
the HAL configuration which is the maximum number of channels.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Change reset pin polarity for MIPI DBI SPI controller, so that the board
devicetree is responsible for setting the GPIO to active low, and the
driver always sets the pin to a logic 1 to reset the display.
Fixes#68562
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the channel suspend with draining fails on stop because of reasons
outside of the scope of the DMA driver (the peripheral is powered off
before trying to drain for example) we must continue and disable the
channel.
The channel can be released by the client despite of it remained enabled.
A new DMA channel request can pick the channel (as it is released) but
re-configuration is going to be skipped and the use of the channel is going
to fail. Then we will see the same drain timeout on channel stop again
since the channel retained the configuration which resulted the first
timeout.
The drain timeout was made fatal by an earlier commit which fixed the
WAIT_FOR return value handling.
Fixes: 6226f9e6e4 ("dma: dw: fix the return value check")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The driver masked the return value of a pin read operation before
checking the error.
Thus not detecting a potential error and leading to logically
dead code, which was detected by coverity in CID 340853.
Anther instance XORs 1 before returning, resulting in an unexpected
return value;
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The res param in offload_freeaddrinfo is not used.
Mark it as unused, to avoid static analysis complaining about
Parse warning (PW.PARAM_SET_BUT_NOT_USED)
Fixes CID 316235
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
uart_emul_fifo_read() didn't regard the size arg, hence if the RX ring
buffer contained more data than the size of the input rx_data buffer
size, this could result in buffer overflow. This becomes more obvious
when configuring device tree property latch-buffer-size > 1.
Signed-off-by: Andreas Anderberg <andreas.anderberg@u-blox.com>
This reverts commit 780b12854c.
"drivers: ieee802154: nrf: cache radio channel"
Implementation affected RCP devices in openthread as MAC layer
does not call `Receive()` functions after transmit is done.
Additionally, after sending a frame to a new channel (for example
while discovery operation), radio switches to RX state immediately
after TX, but continues to listen on old channel for about 5ms,
until MAC layer calls `Receive` operation, forcing to change the
channel.
Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
This CL updates the event data returned by espi_reset.
Return 0 for eSPI bus in reset, and 1 for eSPI bus out-of-reset.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
First, the API ops are available only if
CONFIG_UART_USE_RUNTIME_CONFIGURE=y, but the driver was not guarding the
code. Also, according to the API specs, these functions are optional,
and the interface already returns -ENOSYS if they are not implemented.
To solve both problems, just drop the dummy implementation.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Systematically enable the UART clock again when exiting a low power mode
before reading the UART register.
Even though the previous code worked on STM32WBA, for most series, it is
necessary to enable the clock to access the registers, otherwise they read
as 0.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
info level is printed always to console and it's noisy.
Change to debug level, which can be enabled with
CONFIG_MODEM_MODULES_LOG_LEVEL_DBG
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Whenever UART_RX_DISABLED event is received module attempts to
re-enable receiver since in interrupt driven API receiver is
always on. However, it is possible that there is no free buffers
and in that case attempt to enable the receiver will fail with
-EBUSY. That scenario shall be accepted since the receiver will
be re-enabled when at least one buffer will be freed.
Given that, -EBUSY return shall be accepted (no assert) and
number of pending RX buffer requests shall be reset only on
successful enabling.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
return value of pwm_rpi_get_clkdiv contains implicit conversions
from 'float' to 'double', triggered by floating-point operations
involving mixed data types.
Signed-off-by: Jannis Ruellmann <j.ruellmann@kunbus.com>
Commit b2eaa6448076 ("drivers: dma: intel-adsp-hda: add delay to stop
host dma") added a wait on GBUSY state to host DMA stop.
This is problematic as in some case (like SOF chain-DMA usage),
the host DMA side RUN bit is not cleared when intel_adsp_hda_dma_stop()
is called. It is not possible to wait on GBUSY bit as there are
valid cases where it can remain set.
Address the original problem described in SOF bug #8686 and add a
polling check for intel_adsp_hda_is_enabled(). As per the bug
description, in some cases the GEN/FIFORDY bits are not cleared
immediately and if a new call to intel_adsp_hda_dma_stop() is made, the
PM refcounting will go haywire.
Link: https://github.com/thesofproject/sof/issues/8686
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The CST816S chip ID have an alternative value. It seems that this
field represents in fact a version number of controller. Fix by adding
the new chip ID.
Signed-off-by: Joel Guittet <joelguittet@gmail.com>
Fix coverity integer handling issue (CWE-188).
Modifying a variable through a pointer of an incompatible type (other
than unsigned char) can lead to unpredictable results.
Fix: #67965
Coverity-CID: 248434
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Using the 8 base clock cycles per bit period setting (instead of 16)
reduces the uart baud rate error when using a 12MHz crystal (found on
many RA Microcontroller development kits boards). This setting also
slightly reduces the error when using the internal 48MHz oscillator,
used by the Arduino UNO R4 Minima board currently support by Zephyr.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
With the device_sync_sem semaphore, there is the possibility of
the code not returning to give it back
(mcux_flexcomm_master_transfer_callback is never called),
causing it to get stuck in k_sem_take(&data->device_sync_sem, K_FOREVER)
in subsequent calls.
The i2c driver recovers by other means
(enabling FSL_FEATURE_I2C_TIMEOUT_RECOVERY)
but the callback might not return.
Adding a timeout option allows for this occurrence to be avoided.
Signed-off-by: Guilherme Casa Nova <guilherme.casa_nova@dell.com>
Display is not working on STM32F429i-DISC1 board because
display_blanking_off() needs to be sent to ILI9341 device, but it's sent
to LTDC instead which does not implement it.
This patch adds a LTDC DT property that provides the pHandle of the
display's own controller so that display_blanking_off/on are forwarded to
it when they are called by an application.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Check the return code of mipi_dbi_reset, and do not delay for the reset
wait time unless the mipi controller has issued a hardware reset to the
display.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix usage of MIPI buffer descriptor in ili9xxx driver. Previously, the
buffer descriptor size was being set to display buffer size. For cases
where the write height/width was not equal to the size of the buffer, this
resulted in additional data being written that was not needed. To
resolve this, calculate the mipi descriptor buffer size in the driver
Also, remove the unconditional setting of mipi_desc.height, as this
would override the previous (correct) setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add a custom driver that takes care of loading and launching RISC-V VPR
cores found on the new nRF54 SoCs.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
... in the related parts, so that the driver can be used on nRF54H20
where the clock control is not present yet.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Extend Kconfig definitions and nrfx_config translations so that UARTE
instances that are available in nRF54H20 can be used.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On nRF54H20, only the new shim can be used and the enhanced poll out
cannot be enabled since there is no DPPI support for this SoC yet.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Move code that prepares `NRFX_CONFIG_GRTC_*` definitions based on
information from devicetree from the nRF54L15 nrfx_config header
to the global one, so that the code can be used by nRF54H20, too.
The checks that validate owned-channels and child-owned-channels
DT properties are moved to the nrf_grtc_timer driver so that
the global nrfx_config is not polluted unnecessarily.
The default values in nrfx_config_nrf54l15_enga_application.h
are restored to those from the corresponding template file.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This adds new NXP mailbox driver for MBOX device.
NXP mailbox IP driver supports sending data between cores.
It uses 32 bit register to trigger irq to other core.
This driver implementation uses 4 bits for channel selection of
triggering mode, 4 bits for channel selection of data transfer and
rest 24 bits for data.
NXP mailbox IP Reference Manual UM11126, Chapter 52.
https://www.nxp.com/webapp/Download?colCode=UM11126
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
Address and size are given by the DTS register property
of the qspi nor : to be used by the qspi driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Address and size are given by the DTS register property
of the ospi nor : to be used by the ospi driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add power management support to the gpio-qdec driver.
This is a bit complicated by the fact that the driver has two modes of
operation and the interrupt, timer and idle work ineract with each
other.
The suspend sequence is:
- set the suspended bit (inhibits the poll timer so that it does not
resubmit the idle work)
- cancel the idle work (so that it does not schedule and re-set the
interrupt or timers)
- disable interrupts (if used)
- stop the sampling timer
- disconnect the pins
The resume sequence is more or less the opposite.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Some devices like S32K1xx don't feature an internal 32.768 KHz
oscillator. Also, updated the code to use the existing HAL API
for this purpose.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
1. Configure 'core-clock' to 192MHz to generate necessary 48MHz
2. Support workaround to disallowing ISO IN/OUT EPs to be assigned
the same EP numbers
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
drivers: eth: phy: tja1103: Handle link change
These changes enable -
TJA1103 driver to gracefully handle Link connect or disconnect events
between Ethernet PHY and its link partner and notify it to the
upper network layers
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
These changes enable -
1. S32 gmac driver to gracefully handle
net iface down and up net shell commands and
2. Link connect or disconnect events between
Ethernet PHY and its link partner.
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
Currently, whenever performing TRIGGER_PAUSE operation, the
data line is not disabled. This works well if TX and RX don't
operate at the same time or they operate in ASYNC-ASYNC mode. This
is because sai_tx_rx_disable() will disable transmitter/receiver
all the time since there's no dependencies to take into consideration.
However, in the ASYNC-SYNC mode, sai_tx_rx_disable() may not disable
the current asynchronous side if the synchronous side is still enabled.
As a consequence, the asynchronous side will remain enabled, thus
leading to an underrun/overrun.
To fix this issue, sai_trigger_pause() should disable the data line
each time it's called. This way, even if sai_tx_rx_disable() doesn't
disable the current direction, the data line will be disabled, thus
stopping the consumption/production of frames.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Supurious interrupts can be generated when the SPI device
is disabled. Ignore them within the SPI IRQ handler.
Co-authored-by: Georgij Cernysiov <geo.cgv@gmail.com>
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Allow to use H7 SPI FIFO to improve performance.
SPI FIFO usage can be enabled/disabled from devicetree.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Set the transfer size in SPI H7 and check EOT instead of TXC
to be sure the transaction has finished. This is required to
enable the use of the SPI FIFO, as otherwise SPI seems to
operate in "continuous mode", which produces several SCK cycles
after the last frame has been sent/received. More details in the PR.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
In many cases suspending or resuming of a device is limited to
just a few register writes. Current solution assumes that those
operations may be blocking, asynchronous and take a lot of time.
Due to this assumption runtime PM API cannot be effectively used
from the interrupt context. Zephyr has few driver APIs which
can be used from an interrupt context and now use of runtime PM
is limited in those cases.
Patch introduces a new type of PM device - synchronous PM. If
device is specified as capable of synchronous PM operations then
device runtime getting and putting is executed in the critical
section. In that case, runtime API can be used from an interrupt
context. Additionally, this approach reduces RAM needed for
PM device (104 -> 20 bytes of RAM on ARM Cortex-M).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add cleanups to pin presence checks within the mipi_dbi SPI driver.
The cleanups now verify that GPIO and RESET pin devices are ready,
if they are present for the device instance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use a delegate for reporting the core clock rate of the fake CAN
driver. This allows overriding the delegate at run-time and inspecting its
call count.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Promote clk_ratio_adj to double for internal calculations related to ratio
to avoid compilation warnings related to implicit conversion from float
to double.
Signed-off-by: Mateusz Hołenko <mholenko@antmicro.com>
This adds support for the GRLIB SPIMCTRL SPI controller used in LEON and
NOEL-V systems. SPIMCTRL can operate in two different modes: In the
default mode it allows memory-mapped read access to the flash data. When
set in the user mode, it can be used to generate SPI bus transactions.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Support SFDP probe in flexspi nor driver. This probe will allow the
flash driver to dynamically configure quad spi flashes for 1-4-4 mode,
expanding the flash chips supported with this driver.
The following data is read from the SFDP header:
- quad enable method
- fast read command (1-4-4 is maximum supported)
Fixes#55379
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for reclocking flexspi in ccm_rev2 driver. Clock update
functions are provided for the RT11xx.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for reclocking the FlexSPI on NXP iMX RT10XX. This
functionality requires an SOC specific clock function to set
the clock rate, since the FlexSPI must be reset directly
before applying the new clock frequency.
Note that all clock constants are defined in this commit, since the
memc flexspi driver now depends on a clock node being present.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Updated the shared IRQ handler function in the shared interrupt controller
drivers to include support for the 'irq_number' parameter. When a single
driver manages multiple shared IRQs, it becomes challenging to determine
which IRQ line is invoking the handler. Therefore, I've introduced an
option to share the IRQ number to address this issue.
Signed-off-by: Navinkumar Balabakthan <navinkumar.balabakthan@intel.com>
eb2e5de01c made this a console driver but without adding the needed
hooks. This adds the hooks to support the console interface.
Fixes#65987Fixes#66264
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add the white light channel to the
veml7700 sensor to allow for correction
of light sources with strong infrared
content.
Signed-off-by: Jeff Welder <Jeff.Welder@ellenbytech.com>
Convert ili9xxx display drivers to use MIPI DBI API. Due to the fact
this change requires a new devicetree structure for the display driver
to build, required devicetree changes are also included in this commit
for all boards and shields defining an instance of an ili9xxx display.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI controllers can easily implement MIPI DBI mode C, with the help of
GPIO pins for the reset and command/data signals. Introduce a MIPI DBI
compliant SPI driver, which emulates MIPI DBI mode C (SPI 3 and 4 wire).
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce MIPI DBI driver class. MIPI DBI devices encompass several
interface types. All interfaces have a data/command, reset, chip select,
and tearing effect signal
Beyond this, MIPI DBI operates in 3 modes:
Mode A- 16/8 data pins, one clock pin, one read/write pin. Similar to
Motorola type 6800 bus
Mode B- 16/8 data pins, one read/write pin. Similar to Intel 8080 bus
Mode C- 1 data output pin, 1 data input pin, one clock pin.
Implementable using SPI peripheral, or MIPI-DBI specific controller.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The LIS2DE12 is an ultra-low-power high- performance three-axis
linear accelerometer belonging to the “femto” family with digital
I2C/SPI serial interface standard output.
This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/en/datasheet/lis2de12.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add APIs to:
1. read/write sensor regs on i2c/spi bus enabling adrress
auto-increment in a stmemsc specific way.
2. read/write sensor custom APIs.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
1. Support the dma mode for andes_atcspi200
and use board adp_xc7k_ae350 for testing.
2. Refine the function mechanism.
Signed-off-by: Kevin Wang <kevinwang821020@google.com>
1. Remove the redundant code.
2. Use sys_set_bits and sys_clear_bits instead of customized MACRO.
Signed-off-by: Kevin Wang <kevinwang821020@google.com>
Add driver for the Microchip Polarfire SOC MSS SPI controller.
The interrupts of the MSS SPI are routed through PLIC(Platform level
interrupt controller).
Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
Bind WiFi network devices to the generic WiFi connectivity backend if
the appropriate option is set.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds CAN drivers for XMC4xxx SoCs.
XMC4xxx has multiple CAN nodes. The nodes share a common clock and
a message object pool.
The CAN nodes do not have a loopback mode. Instead there is an
internal bus which can be used to exchange messages between
nodes on the SoC. For this reason tests/samples which rely on the
loopback feature have been disabled.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
It looks like driver references quite a few non-existing properties in
devicetree (see dts/bindings/spi/infineon,cat1-spi.yml). This mistake
was hidden because of DT_INST_PROP_OR(), which expands to the default if
the property is not present. However, after
260fc89643, the issue became visible
because sme DT_INST_PROP_OR() were changed to DT_INST_PROP().
Note that only fields not initialized to 0 (or false) have been kept.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Do not disable the ADC after the end of the measurement to avoid systematic
enabling which is time-consuming in case the configuration is unchanged.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Reducing the number of times the code dereferences the pointer *reg,
which points to SRAM. By using a local variable tmp for operations before
assigning it to *reg.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add basic PM support for STM32 RTC counter.
It is useful for Suspend to RAM support to reenable the RTC register clock
after wakeup from Standby.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Interrupt handling in this chip is broken beyond repair, anyone unfortunate
enough to have to use it will probably come across this error and wonder
what's up.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
It might happens that DT(_INST)_PROP_OR is used with boolean properties.
For instance:
.single_wire = DT_INST_PROP_OR(index, single_wire, false), \
.tx_rx_swap = DT_INST_PROP_OR(index, tx_rx_swap, false), \
This is not required as boolean properties are generated with false
value when not present, so the _OR macro extension is superflous
and the above code can be replaced by:
.single_wire = DT_INST_PROP(index, single_wire), \
.tx_rx_swap = DT_INST_PROP(index, tx_rx_swap), \
Signed-off-by: Roman Studenikin <srv@meta.com>
Fixing this "revealed" bug which got introduced when
a PR added the -Wdouble-promotion flag to GCC builds
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
For the flash driver, the base address is the MCU internal flash
address (usually 0x8000000). This PR gets the that address
from the device tree node "st,stm32-nv-flash"
instead of relying on the CONFIG_FLASH_BASE_ADDRESS
which might differ when building for another flash memory.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the build of the gpio driver BD8LB600FS on the
board intel_adl_crb.
Fixes#68219.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The driver uses pinctrl to configure pins instead of nrfx I2S API.
Check whether MCK pin was actually connected by pinctrl instead of
comparing nrfx_cfg.mck_pin that is always NRF_I2S_PIN_NOT_CONNECTED.
This makes it possible for nRF I2S to provide master clock even when
operating in I2S Slave mode.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The driver cannot handle OUT transactions for an endpoint with an
MPS smaller than 64 bytes. To solve the issue, we will not use one
fixed value, EP_MPS, but instead use the actual MPS of an endpoint,
ep_state->ep_mps.
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Added Kconfigs to define the size of:
- UART backend receive buffer
- UART backend transmit buffer
- Satellites array size
and increased the UART RX buffer size a default to 256 as 128
is just on the edge of to small at a baudrate of 115200.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
The pipe should be closed when suspended, both to save ressources
and to flush it. Without flushing the pipe, the driver may fail
to either resume or suspend the GNSS as the chat module starts
processing old data, which can contain acks to commands, breaking
the scripts.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
The implementation of power management did not account for
being on a power domain when initializing, and handling being
powered on and off at runtime.
The GNSS requires time to start up, which it always does when
powered on, before accepting commands. It also requires time
after resuming and suspending before accepting commands.
This commit implements this timeout, and improves logging to
make the power management more transparent, and removes some
redundant parenthesis for better readability.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Based on edit done at r8a779f0 driver creation
(f5634a1a0e6f607809a7e4b8d1933a85b5eb7642)
following comments on #56043.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Remove old unused defines from header
Use clang-format to apply coding guideline to r8a7795 driver
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add an active discharge api for regulators. This uses the already
existing but previously unused regulator-active-discharge
property.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The GPIO power domain driver needs device power management enabled
to compile if `PM_DEVICE_POWER_DOMAIN` is enabled.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Sort the included headers by name, remove unneeded includes and ensure
soc.h is included prior to the Zephyr CAN headers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
There is default 15K-ohm pull-down for USB controller.
To disable the default pull-down to avoid signal contention in GPIO mode.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Guard use of I2S_EnableSecondaryChannel behind the SDK feature macro
that determines if this support is available, since when this macro is
not defined the SDK function is not implemented.
Fixes#68136
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Set the correct VCO input range for the PLL frequency
with each bit PLL1RGE of the PLL1CFGR register
This get_vco_input_range is similar to the stm32h7 one.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Propagate the current CAN controller operation mode to the CAN transceiver
when enabling it.
Some more advanced CAN transceivers, especially those supporting Partial
Networking (CAN PN), require knowledge of the intended CAN operation mode
(e.g. normal mode vs. listen-only mode).
This commit simply prepares the CAN transceiver API for supporting such CAN
transceivers, although no in-tree drivers require this information yet.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add system call can_get_transceiver() for getting the CAN transceiver
associated with a CAN controller.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The srandom function is not available
unless _XOPEN_SOURCE is set > 500 or an equivalent
declaration is done.
Let's set it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This code was using strptime from the C library in some cases,
but this function is an extension which many embedded libCs do
not provide, and which is not provided by default unless
_XOPEN_SOURCE or a similar macro is defined before the system headers
are included.
We could define _XOPEN_SOURCE for the libraries that provide it,
but instead of treating the host C library differently than
embedded libraries, let's just build the provided version always,
as that should provide better coverage of this code.
Note: It seems picolibc's strptime is broken,
until this very recent patch:
https://github.com/picolibc/picolibc/pull/657
so we should not select it when building for this library
for a while either.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This file uses several functions which are extensions to the the
std C library. Let's explicity select one of the extensions
which includes it instead of relaying on somebody having
set it for this file somewhere else.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This driver doesn't use any APIs outside of the Zephyr C library list, so
it doesn't need this _POSIX_C_SOURCE define.
Signed-off-by: Keith Packard <keithp@keithp.com>
soc\riscv\andes_v5\ae350\soc.h was empty and deleted,so revise
wdt_andes_atcwdt200.c to resolve
'fatal error: soc.h: No such file or directory'.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Use 'struct uc81xx_tres16' for 16-bit 'tres' setup, instead of 'struct
uc81xx_tres8'. This fixes a regression when support for 'uc8175' was added
and 'struct uc81xx_tres' was replaced with 'struct uc81xx_tres16'.
Fixes: 7c46b0b898 ("drivers: display: uc81xx: add support for uc8175")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
- In `set_vendor_ie_header_lm`, case when
`link_metrics_data_len == 0` has been ignored.
This commit fixes that by setting `header_ie->length = 0`
before returning.
- current implementation of enh ACK header IE returns
`-ENOTSUP` when `ack_ie.header_ie == NULL` or
`ack_ie.header_ie->length == 0`. This commit fixes that by
refactoring checks in `nrf5_configure`.
Co-authored-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
Mute GPIO mutes both channel 1 and channel 2.
So, only control it when all channels have to be muted.
Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr>
Use gpio_is_ready_dt in the driver for the TLE9104 before
actually using the GPIO.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
In some hardware designs it might happen that the reset signal
for the TLE9104 is not used only for this purpose, but instead for
instance to reset other devices at the same time. For such a hardware
design it is then necessary to make the reset GPIO optional. The reset
will have to be triggered earlier on.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This implements the daisy chain feature of the low side switch
BD8LB600FS. The daisy chaining is in hardware achieved via
connecting the MISO and MOSI lines of multiple instances of the IC
in a row. It is implemented in the driver through a variable number
of GPIOs on one instance. Therefore, one device tree instance of the
IC will handle multiple daisy chained physical instances.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add support for more than 2 I2S channels to the I2S Flexcomm driver.
Additionally, remove comment stating I2S PCM and Left justified formats
are not supported, as these formats are now validated to function
correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The implementation uses the same approach as STM32F1x.
Program/erase speed can be set by setting 'write-block-size' flash
property to 1, 2, 4 or 8.
Signed-off-by: Patryk Duda <patrykd@google.com>
Add a command line option which will seed the random generator
from /dev/urandom.
This can be usefull for some particular tests in which we are
interested in having different random numbers in each run,
but we cannot provide a different random seed from command line.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Remove receive and transmit timeouts which are no
longer useful as the RECEIVE_READY and
TRANSMIT_IDLE events will be used to efficiently
manage timeouts between transmit/receive calls.
Then update the the in-tree drivers using the
modem_chat module to omit the process timeout
parameter.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
With PM, when resuming from low power mode, reenable the RNG register
clocks and check the health register. If it is not set to the desired
value, it means we exit Suspend to RAM mode, and that the RNG needs to be
reinitialized.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Prevents the system to go in Suspend to RAM low power mode while ADC
measurement is in progress.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When resuming from low power mode, if UART is disabled, this means that
we come from a mode that reset the registers, so we redo a full init of
the driver.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix a bug where after a standby, it was impossible to reenable a GPIO
clock.
A counter is incremented each time pm_device_runtime_get is called, and
decremented each time pm_device_runtime_put is called. The
clock is only enabled if this counter equals 1.
When configuring a GPIO (as input or output), the timer is incremented, and
when disconnecting it, it is both incremented and decremented. Thus the
next time we try to configuring it, the clock is not enabled (since the
counter will now be equal to 2).
This causes a problem when using low power standby mode: after wakeup all
clocks are disabled and the GPIO clock can not be reenabled.
This commit fixes this bug by not incrementing the counter when disconnect
is asked (or in other words incrementing it only when configuring either
an input or an output).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support for a backup standby timer in STM32 LPTIM driver for cases
when the LPTIM is not available (ie standby low power mode).
A counter (typically RTC) is used for such a case.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove initialization of static variable to 0 to prevent resetting the
value when reinitializing the driver after resume from standby.
This has no impact since static variables are initialized to 0 by default.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Provide different loop delays to `wait_until_ready` based upon the
operation that we are waiting for.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Don't monopolise the CPU in `spi_nor_wait_until_ready`. For slow flash
chips, operations can take minutes (Full chip erase on MX25R is listed
as 120s typical, 240s max).
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
When set, this GPIO controller has pins associated with the
keyboard controller. In this case the reg_gpcr property is
overloaded and used to write the keyboard GCTRL register
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds source and header files required for bmp581 I2C driver.
I have used bmp581_user.h to add more usage related definitions
but bmp581.h to add hardware related definitions.
Signed-off-by: Talha Can Havadar <havadartalha@gmail.com>
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
The STM32 DMA driver supports cyclic mode by setting source_reload_en
and dest_reload_en. This causes the dma_callback to be called twice per
buffer run-through, at half-time and when wrapping back to the start of
the buffer.
However, the current implementation only calls dma_callback twice. When
wrapping the first time, it sets stream->busy to false and ignores
subsequent interrupts.
With this change, the busy flag is only cleared in non-cyclic mode.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
For series that have two sampling time common channels, only one was used.
This commit add the support for the second one. The first two different
acquisition time values are used for the sequence and all further values
must match either of them, otherwise generating an error.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This is driver limitation after removing CAN_FILTER_FDF flag #65108.
CANXL driver need to know CAN_FILTER_FDF for configuring Rx filter
so that it receives CAN classic or CAN FD frames when using non RX_FIFO.
So update driver that just supports CAN classic for non RX_FIFO.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Commit eeec09eb9a unintentionally modified
can_calc_timing_data() to be called with the nominal phase parameters
instead of the data phase parameters.
Before the change, the parameters were properly initialized in the macro
MCP251XFD_SET_TIMING_MACRO(inst, _data).
After the commit, can_calc_timing_data() gets called with the parameters
pointing to dev_cfg->common.sample_point instead of
dev_cfg->commom.sample_point_data.
This PR creates a separate function mcp251xfd_set_timing_data()
which calls can_calc_timing_data with the correct data parameters.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Just like for the old driver, for simulation, we cannot
get the UART regiter address for the pinctrl config structure
from DT, as that cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.
Also, do improve the condition for the busy wait during the poll_out,
for simulation, so we only busy wait if we will loop/the
Tx was busy.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The TLA2021 driver depends on it's i2c controller and therefore needs
to be initialized later. ADC_INIT_PRIORITY by default equals
KERNEL_INIT_PRIORITY_DEVICE which should be used by independent devices.
Using this by default causing projects to fail where this driver is
enabled implicitly through board configuration and the priority is not
explicitly set.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This fixes following build error when rv32m1_vega_zero_riscy
board gets compiled:
implicit declaration of function 'INST_DT_CLOCK_IP_NAME'
Fixes#68012
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit introduces a driver for NXP's eDMA IP.
The main reasons for introducing a new driver are the following:
1) The HAL EDMA wrappers don't support well different
eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
revision had to be introduced, thus requiring a new Zephyr
driver.
2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
don't use the DMAMUX IP (instead, channel MUX-ing is performed
through an eDMA register in the case of i.MX93).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit updates the driver to use the flash layout pages,
rewriting it to utilize the flash_page_layout.c driver to
avoid duplicate code.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Several STM32 variants include both shared IRQs for some ADCs and
separate IRQs for others (for example, STM32G473 has 5 ADCs, ADC1 and
ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique
IRQs). The STM32 ADC driver however previously only supported either
separate IRQ lines for each operational ADC in the devicetree or a
single shared IRQ for all operational ADCs in the devicetree which
prevented all ADCs from being usable at the same time when the variant
contained a mix of both shared and separate ADC IRQ lines (only either
all the shared or all the separate and one of the shared might be used
at most for one application).
To allow for all ADCs in an STM32 variant to be usable in a single
application, generate an ISR and initialization function for each
unique IRQn as defined in the devicetree and give the task of
initialization to the first ADC which connects to that particular
IRQ. Each ISR function will generate code to call the ISR for each ADC
associated with that IRQn as was previously done for
CONFIG_ADC_STM32_SHARED_IRQS, allowing an ISR to be shared for the
ADCs sharing an IRQ while simultaneously providing separate ISRs for
each IRQ. Thus, the only information required to have ADCs either
share an ISR or not is provided by the devicetree.
Signed-off-by: Michael R Rosen <mrrosen@alumni.cmu.edu>
Extend the workaround for the unreliable SPI busy flag
to all F7 and L4 devices, which are affected by the same
erratum.
Fixes #67739
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Change the gpio_qdec driver to support optical encoders.
Add a property to use for defining an arbitrary number of GPIOs for the
sensing devices (typically infrared LEDs, but could also be the
biasing for the phototransistor), and one for adding a delay between
turning those on and reading the pin status.
The infrared LEDs typically consume a non negligible amount of power, so
there's also a new idle-poll-time-us property that enables two possible
modes of operation:
- if idle-poll-time-us is zero (default) the LEDs are enabled all the
time and the driver enters polling mode using the GPIO interrupt as
with mechanical encoders. This is usable for mains powered devices and
has the lowest overhead on the CPU.
- if idle-poll-time-us is non zero, then the driver polls the encoder
all the time, turning on the LEDs just before reading the state and
shutting them off immediately after, but when the encoder is idle it
switches the polling rate to idle-poll-time-us to save power, and only
polls at sample-time-us when some movement is detected.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
use CONFIG_SOC_INTEL_ACE15_MTPM instead of CONFIG_ACE_VERSION_1_5.
CONFIG_ACE_VERSION_1_5 leaked from SOF.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixes a compilation error in quectel_lcx6g driver when CONFIG_PM_DEVICE=y.
Corrects the function call in quectel_lcx6g_suspend from
'modem_chat_run_script_run' to 'modem_chat_run_script'.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This commit repairs reading of data from other
channels than 0.
Refactors irq handler outside of DT define.
Trigger registered callback only when proper flag is set.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
A growing number of CAN controllers do not have support for individual RX
hardware filters based on the Remote Transmission Request (RTR) bit. This
leads to various work-arounds on the driver level mixing hardware and
software filtering.
As the use of RTR frames is discouraged by CAN in Automation (CiA) - and
not even supported by newer standards, e.g. CAN FD - this often leads to
unnecessary overhead, added complexity, and worst-case to non-portable
behavior between various CAN controller drivers.
Instead, move to a simpler approach where the ability to accept/reject RTR
frames is globally configured via Kconfig. By default, all incoming RTR
frames are rejected at the driver level, a setting which can be supported
in hardware by most in-tree CAN controllers drivers.
Legacy applications or protocol implementations, where RTR reception is
required, can now select CONFIG_CAN_ACCEPT_RTR to accept incoming RTR
frames matching added CAN filters. These applications or protocols will
need to distinguish between RTR and data frames in their respective CAN RX
frame handling routines.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The max size was determined by looking at the ARCH of the cpu. This really
comes from the ip configuration when generated. Add `max-xfer-size`
property to the devicetree.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Only toggle the hw cs if the cs is not set as a gpio. SPI trancieve
should also return the rx len when in slave configuration.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This cleans up the instantiation macro. DBG_COUNTER was also removed
as that appears to be unnecessary. This also allows for if it is a
serial target to be configured from the devicetree.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The HAS_SPI_DW Kconfig is rather unncessary. If the synopsys designware
spi is to be included. It should come from the devicetree.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
In sdhc_spi_response_get, the logic for slow cards previously only
retried reads 16 times. Instead of using this approach, read from the
card every 10 ms until the command timeout is reached or it responds.
This way, the command timeout will be respected for cards that do not
respond.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adding driver for GC9A01A 240x240 based LCD displays.
Should be working with GC9C01 as well (untested).
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
rssi 31 will be -51dBm or greater, where -51 is valid. Fix the
range by allowing until -51.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
* Internal Clock not getting stable during initialization
* SD clock was not enabled
* Removed duplicate file.
* Removed write to readonly registers
* Moved function pointer structure from data section to RO section
* Wrong macro names
* Refactoring of lower layer header file.
Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@intel.com>
Fixed an issue where `display_read()` in the SDL driver was not working.
In the current implementation, use texture to represent screen images.
To read this, draw it once on another surface and then read it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add SDL_DISPLAY_USE_HARDWARE_ACCELEREATOR to be able to switch
enable/disable hardware accelerator.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The current implementation implicitly assumes that if the device is
configured to have the capability of acting as a CSL endpoint then in
case a delayed reception with matching ID finishes with a timeout no
action is needed. This assumption is correct when RxOnWhenIdle mode is
disabled because the transition to sleep is done automatically by the
driver below. However, it's wrong when RxOnWhenIdle is enabled. This
commit fixes that case by adding a call to event handler that notifies
the higher layer about the event and allows it to transition to RxOff if
needed.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Before, only one sensor device was supported. It
was possible to set a trigger on a second sensor
device, but the filtering of the channel data
would cause no channels from the new sensor
device to be read.
Also in trigger handler log of sampled data, print
the sensor name and channe name (instead of channel
number).
Signed-off-by: Mike J. Chen <mjchen@google.com>
New shim takes more flash and is causing some tests to overflow the
ROM memory. Switching to the legacy shim as default until it is fixed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Remove the CAN_FILTER_FDF flag for filtering on classic CAN/CAN FD frames
as it is not supported natively by any known CAN controller.
Applications can still filter on classic CAN/CAN FD frames in their receive
callback functions as needed.
Fixes: #64554
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for reconfiguring the period of an active PWM channel with
the SCTimer driver. Due to the design of the SCTimer IP, the period can
only be reconfigured when one channel is in use. Otherwise, only the
duty cycle of each channel can be updated.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The clock divider value is not being applied as the address of the
register to which it is being written is incorrect. A check of all RA MCU
datasheets confirms that, in all cases, the SCKDIVCR register is at an
offset of 0x20 (and not 0x21).
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
When adjusting the prescale to increase the I2C SCL low period,
the high period must also be subtracted to maintain a consistent
frequency.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add new shim which is based on nrfx driver.
Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add adaptation layer which allows to provide interrupt driven
API for drivers which exposes only asynchronous API.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Change the synchronization of RMC and GGA NMEA messages from a
timeout to matching their UTC timestamps.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Remove gpio_clock_names and gpio_mcux_lpc_config->clock_ip_name from
drivers/gpio/gpio_mcux_lpc.c.
The drivers/gpio/gpio_mcux_lpc.c file did not compile with xt-clang
RI-2021.8-win32, as the gpio_clock_names was initialised with a
reference to a static const array. The clock_ip_name member was
initialised from this variable, but it isn't used anywhere else.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
When the I2C is in the target mode and encounters the bus error, the
driver has to reset the bus to recover the I2C hardware. However, when
the hardware is disabled, the interrupt enable bits are also cleared
automatically by design. As a result, we need to enable the interrupts
after resetting the I2C hardware.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Add driver for NXP nx20p3483 power path controller that can be used
to control and protect sink and source path of USB-C connector.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add support for ppc shell command with subcommands that can print
the status of PPC (dead battery, sinking, sourcing, vbus detected),
dump registers and request the PPC to exit dead battery mode.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds an API to the Power Path Controllers (PPC) that
may be used with USB-C subsystem to control the current paths,
enabling and disabling sourcing and sinking VBUS and protect against
shorts, overvoltage and overcurrent.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
According to the clic specification
(https://github.com/riscv/riscv-fast-interrupt), the mnxti register has
be written, in order to clear the pending bit for non-vectored
interrupts. For vectored interrupts, this is automatically done.
From the spec:
"If the pending interrupt is edge-triggered, hardware will automatically
clear the corresponding pending bit when the CSR instruction that
accesses xnxti includes a write."
I added a kconfig `RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING` to allow custom
irq handling. If enabled, `__soc_handle_all_irqs` has to be implemented.
For clic, non-vectored mode, I added a `__soc_handle_all_irqs`, that
handles the pending interrupts according to the pseudo code in the spec.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The mechanism for hardware vectoring has changed in the clic spec
(https://github.com/riscv/riscv-fast-interrupt) in 2019. Before
vectoring was enabled via `mode` bits in `mtvec`. Support for this was
added in fc480c9382.
With more current clic implementations, this does not work anymore.
Changing the `mode` bits is reserved. Vectoring can be enabled
individually in the `shv` bit of `clicintattr[i]`.
Since the old mechanism is still used, I added a new Kconfig for it.
If this Kconfig is not set, we use the `shv` bit for harware vectoring.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
The trig field of clicintattr is indeed in bits 2:1. However, the mask
`CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield
`INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally.
Signed-off-by: Greter Raffael <rgreter@baumer.com>
Add support of voltage control to Renesas PFC driver. Voltage register
mappings have been added to r8a77951 and r8a77961 SoCs.
Allow 'power-source' property for 'renesas,rcar-pfc' node. This property
will be used for configuring IO voltage on appropriate pin. For now it
is possible to have only two voltages: 1.8 and 3.3.
Note: it is possible to change voltage only for SD/MMC pins on r8a77951
and r8a77961 SoCs.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Modify the sequence of pinctrl setting. Default setting as input mode
prevents leakage during changes to extended setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When device runtime pm is enabled on console device, do not suspend
device synchronously on each char transmission, but rather use asynchronous
suspension request.
This will save useless and costly suspension/resumption procedure, which
can involve uart device clock suspension but also pin configuration
to sleep state (which itself involves gpio clock activation ...).
On STM32, using asynch device suspension allows to divide by 3 the
transmission time of a character chain.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This change marks each instance of the 'i2c_driver_api' as 'static const'.
The rationale is that 'i2c_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The place where TF-M places its non-secure api header files has changed
Therefore changing it for for all applications that use it.
Signed-off-by: Markus Swarowsky <markus.swarowsky@nordicsemi.no>
This change renames the RX message buffer from g_hciRxMsg to rxmsg,
as it does not follow the Zephyr coding style.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change relocates the tx/rx message buffer from the .bss section
to the .noinit section. This adjustment is aimed at reducing boot time by
lowering the size of the .bss section, without impacting the operational
functionality of the buffer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Add driver for NXP DMIC peripheral. This peripheral is present on the
iMX RT5xx and iMX RT6xx parts, as well as some LPC SOCs. The following
features are supported:
- up to 2 simultaneous channels of L/R PCM data (4 channels are not
supported due to limitations of the DMA engine)
- individual configuration of gain and filter parameters for each DMIC
channel input
The driver has been tested with up to 4 PCM data streams (2 L/R channels),
as well as the MEMS microphones present on the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add definition for DMIC clock source to LPC SYSCON clock control driver.
This constant allows drivers to get the DMIC bit clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow the driver to compile without `CONFIG_NET_NATIVE_IPV4`. This can
happen if the driver is only desired for SSID scanning.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Master Inter-Data Idleness and Master SS Idleness
can configure with STM32 low level spi driver apis.
Signed-off-by: Mustafa Abdullah Kus <mustafa.kus@sparsetechnology.com>
Use proper errno.h error codes in pd_intel_adsp_set_power_enable()
instead of -1.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The write protect register (PWPR) found on RA Microcontrollers is an 8-bit
register at an odd address. It was being accessed using a pointer to a
uint32_t which causes a fault on some devices in the series.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
Add RGPIO gpio driver. This driver is used for i.MX93 and i.MX8ULP.
GPIO pinctrl, read/write and interrupt is supported. Runtime mmio
configuration is enabled, so no need for region definition in
mimx9/mmu_region.c
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Increase the busy wait time granularity while runing in simulation
for poll mode. In this mode, the driver spends a *lot* of time
waiting for the UART to be done. The smallest frame time is
~10µs @ 1Mbps, so busywaiting in very small increments
is very wastefull as we keep shuting down and turning on the simulated
MCU.
Let's increase the busy wait time increments of the driver to 3 micros,
which should not change much the behaviour.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
After #63289, multi-level interrupts are now encoded using macro
magic. This means that using the generic DT_INST_IRQ_BY_IDX() to
fetch the INTID is no longer an option as the queried INTID will
be the one specified through the node's `interrupts` properties.
To fix this, switch to using DT_INST_IRQN_BY_IDX() which will
return the correctly encoded INTID.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit implements parsing of the CESQ extended signal quality AT
command, extracting RSRP and RSRQ which is relevant for LTE connections.
It's used in the U-blox SARA-R5 modem instance. Furthermore, the IMEI,
IMSI is extracted in the same modem.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Now that STM32_LPTIM_CLOCK choice symbol is defined from device tree,
remove the prompt which was defining it as a user selectable entry.
Remove the warning related to possible symbol misalignment with
device tree setting.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The receiver ready flag of the (channel) status register
for the sam controller was not being interpreted correctly
for both the uart and usart implementation,
according to the uart api.
Tested and confirmed using the sam4sa16ca.
Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
As an example, when the gyro range is set to 250 deg/sec the scale
was set to 133 where it really should be 133.160058662. This leads
to a 0.12% error in the value returned. By separating the numerator
and denominator, we're able to drastically reduce the error.
Signed-off-by: Yuval Peress <peress@google.com>
The range map was sorted wrong since the function
bmi160_range_to_reg_val() that uses it checks for the user value less
than the range component of the bmi160_range struct. This means that
no matter what range is set, the value will always end up 2000dps.
Signed-off-by: Yuval Peress <peress@google.com>
Adding a hook for tests to inject a mock transport and migrating the
accel test to test bmi160 specific things. The old version of the test
which checks for read values is now covered by the generic test in
the sensor build_all target.
Signed-off-by: Yuval Peress <peress@google.com>
Add support for getting the following attribute values:
- SENSOR_ATTR_OFFSET
- SENSOR_ATTR_SAMPLING_FREQUENCY
- SENSOR_ATTR_FULL_SCALE
Signed-off-by: Yuval Peress <peress@google.com>
The logic in the driver was not aligned to the datasheet. Also,
temperature reading was not being done in fetch, but in channel_get.
There was also some extra conversions from SI->register->SI when
setting the range, this was causing the register value calculation to
produce an incorrect scale in some cases.
Tests were added to cover these cases.
Signed-off-by: Yuval Peress <peress@google.com>
Update the backend for sensor emulators to include a function for
setting the offset as well as a function to query an attribute's
metadata such as bounds and increment size. Additionally, add
backend support for setting the _xyz channel values.
Make the appropriate test changes to accomodate.
Signed-off-by: Yuval Peress <peress@google.com>
Ignore communication faults of the TLE9104 which are reported
before the communication watchdog is configured.
Fixes#67370
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Reduce some of the arithmetic required to decode a sample. Math is
documented in bma4xx_convert_raw_accel_to_q31.
This improved the accuracy from roughly 0.865mm/s2 to 0.001mm/s2 when
stationary and using a range of 4g.
Signed-off-by: Yuval Peress <peress@google.com>
ssize is a POSIX.1-2001 extension, which may or may
not be provided by the C library, or may be defined
to a different size in the host and embedded C library.
Two internal functions were returning ssize.
As these functions were just trampolines
into the same host API, which are already provided
by the native simulator let's just use those.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
ssize is a POSIX.1-2001 extension, which may or may
not be provided by the C library, or may be defined
to a different size in the host and embedded C library.
Two internal functions were returning ssize, but
one of them was a trampoline into the same host API,
which is already provided by the native simulator
so let's just use that instead.
The other is only carrying data that fits into an
int and is anyhow being cast in/to ints, so let's just
avoid the trouble by defining it as returning int.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The current driver initializes the IADC with the default configuration
(IADC_INITSINGLE_DEFAULT), which aligns the data to the right.
To correctly read the 12-bit sample, it should be masked from the right
instead.
Signed-off-by: Paulo Santos <pauloroberto.santos@edge.ufal.br>
Calling I2S write with less bytes than I2S TX memory block size makes it
possible to synchronize the time when next block is used against some
other, possibly externally sourced, signal. Example use case includes
USB Audio where audio sink and/or source has to be synchronized against
USB SOF. In Asynchronous synchronization type the rate matching is
achieved by varying the number of samples sent/received by 1 sample
(e.g. for 48 kHz audio, 47 or 49 samples are transmitted during frame
instead of 48).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fix the log level of two LOG_ERR() statements which should have always
been LOG_INF(). As confirmed by the author Adrian in #60172
Fixes commit 3fbaed4de9 ("dai: intel: ace: dmic: Refactor of
dai_nhlt_dmic_dai_params_get function")
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/i2c directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
.bss and .data are uncached in Zephyr builds for intel_adsp. No need
to try to manipulate cache of objects in those sections.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Driver is using the RISC-V PLIC interrupt controller without including
the necessary headers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/serial directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/spi directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/gpio directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
SOC_ESP32_NET is now SOC_ESP32_APPCPU, following espressif's
naming convention in the same manner as ESP32S3 app cpu.
SOC_ESP32_APPCU is now a subset of SOC_SERIES_ESP32.
This commit also changes the necessary files, samples and tests
for bisect purposes.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
According to hardware spec, host dma needs some delay to completely stop.
In the bug the host dma is disabled in different path in a few microseonds.
The first setting disabled the host dma and called pm_device_runtime_put
to power off it. The second setting found the host dma was still alive
and calle pm_device_runtime_put again. This results to pm->usage
checking failed.
BugLink: https://github.com/thesofproject/sof/issues/8686
Signed-off-by: Rander Wang <rander.wang@intel.com>
Add support for the 1KHz counter. Update the RTC
driver to allow the 1Hz and high resolution counters
to exist together.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
In order to avoid build failures as described in issue #67242,
make all ST drivers using HAL_ST module dependent to HAL_STMEMSC
and HAS_STLIB libs, which need to be configured in all samples
referring to them.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This is a driver targetting the Bosch BMA 4-series accelerometers. It
has been specifically developed for the BMA422 but should be compatible
with others in that line, excepting the BMA400. Supports key attributes
and async RTIO one-shot operation. I2C operation is supported, with
stubs for a SPI implementation provided for future improvement.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
When using one of the internal channels (die_temp, vbat, vref) the
channels are enabled in the individual drivers and disabled again
whenever an adc conversion is complete.
This creates a race condition if the ADC is used from multiple threads.
This commit moves the disabling of the channels to the individual
drivers.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
This patch enhances the power-down sequence for the HOST (HST) domain
within the Intel ADSP ACE 1.5 architecture. It introduces a check to
ensure that a specific condition, represented by a magic key value, is
met before disabling the HST domain. This additional verification step
ensures that the HST domain is only powered down when it is safe to do
so, thereby maintaining the stability and reliability of the system.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
ERRATA 051421 states that if the SAI is FSYNC/BCLK master,
one of the directions is SYNC with the other, and the
ASYNC direction has the BYP bit toggled, the SYNC direction's
BCLK won't be generated properly.
This commit fixes this issue by enabling BCI for the SYNC
direction. What this does is it makes the SYNC direction use
the BCLK from the ASYNC direction's pad, which, if the BYP
bit is toggled, will be the undivided MCLK. Without this fix,
the SYNC direction will use the ASYNC direction's BCLK obtained
by dividing the MCLK via the following formula: MCLK / ((DIV + 1) * 2).
This is wrong because the ASYNC direction will use an undivided
MCLK while the SYNC direction will use a divided MCLK.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
With the introduction of the "rx_sync_mode" and "tx_sync_mode"
properties, the user may choose which synchronization mode the
SAI should use. To support this, the code had to be changed a
bit such that the software reset and the disable operations
work on all synchronization modes.
What this commit does, is it changes the software reset and
disable sequences such that they work with any of the
supported synchronization modes. Also, the syncMode field
of sai_transceiver_t structure is set to the value passed
from the DTS during sai_config_set().
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In preparation for supporting all synchronization modes, this
commit introduces the rx_sync_mode/tx_sync_mode DTS properties.
Using these, the user will be able to specify which synchronization
mode the SAI should use.
At the moment, the driver does nothing with the values from
said properties but still checks if their values are sane
(i.e: it checks if the directions are both in SYNC mode which
is forbidden). By default, if "rx_sync_mode" or "tx_sync_mode"
is not specified, the direction will be set to ASYNC mode.
As such, below one may find a couple of valid examples
depicting this idea:
tx_sync_mode = <0>;
rx_sync_mode = <0>;
is the same as not specifying any of the properties,
tx_sync_mode = <1>;
rx_sync_mode = <0>;
is the same as:
tx_sync_mode = <1>;
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add support for specifying the domain/kernel clock along with a common
clock divider for the STM32H7 CAN controller driver via devicetree.
Previously, the driver only supported using the PLL1_Q clock for
domain/kernel clock, but now the driver defaults to the HSE clock, which is
the chip default. Update existing boards to continue to use the PLL1_Q
clock.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
ESP32 - S2,S3 and C3 variants have only 14 bits counter.
where as the plain ESP32 variant has 20 bits counter.
application failed to set low frequency(1Hz) in S2, S3 and C3 variants.
to get very low frequencies on these variants,
frequency needs to be tuned with 18 bits clock divider.
so select the slow clock source (1MHz) with highest counter resolution.
this can be handled on the func'pwm_led_esp32_timer_set' with 'prescaler'.
Signed-off-by: Jeeva Kandasamy <jkandasa@gmail.com>
Some MCU have limitations with GPIO interrupts. Add a polling mode to
the gpio-keys driver to support those cases.
This required a bit of a refactoring of the driver data structure to add
a instance wide data, and move the pin specific pointer in the config
structure.
For polling, reuse the button 0 delayed work so we minimize the resource
waste, the two work handler functions are only referenced when used so
at least those are discarded automatically if no instance needs them.
Fix a bug in the PM structure instantiation as well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Adjusted the code to guarantee resource release irrespective of operation
success or failure.
Fixes#67336
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
__bswap_ in zephyr/sys/byteorder.h conflicts with __bswap_ in host's
byteswap.h. byteswap.h from host compiler used in posix_native_64 boards
causes a compilation issue.
This commit renames __bswap_ to BSWAP_ to prevent collision.
Before this commit a compilation error can be created by adding #include
<byteswap.h> to samples/net/sockets/echo/src/socket_echo.c
This does not change external API to byteorder.h, but does change
internal implementation which some other source files depend on.
Replaced manual byteswap operations in devmem_service.c with APIs from
byteorder.h which automatically converts to CPU endianess when necessary.
Fixes#44324
Signed-off-by: Jonathan Hamberg <jonathanhamberg@gmail.com>
With commit 1d7476af, it fixed a build error with config
structure no longer having a base address field but left
the local variable defined. This resulted in a build warning
of an unused variable 'config' in two places.
Signed-off-by: David Leach <david.leach@nxp.com>
When usb middleware sends a start of frame notification to this driver,
call status_cb with USB_DC_SOF.
Signed-off-by: James Zipperer <jzipperer@fb.com>
Add an input driver to read data from an analog device, such as a
thumbstick, connected to an ADC channel, and report it as an input
device.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add driver that based on RPI-PICO's PIO feature for ws2812.
This driver can handle WS2812 or compatible LED strips.
The single PIO node can handle up to 4 strips.
Any pins that can be configured for PIO can be used for strips.
I verified the samples/driver/led_ws2812 sample
working with WS2812(144 pcs) led strip using following patches.
- samples/drivers/led_ws2812/boards/rpi_pico.overlay
```
/ {
aliases {
led-strip = &ws2812;
};
};
&pinctrl {
ws2812_pio0_default: ws2812_pio0_default {
ws2812 {
pinmux = <PIO0_P21>;
};
};
};
&pio0 {
status = "okay";
pio-ws2812 {
compatible = "worldsemi,ws2812-rpi_pico-pio";
status = "okay";
pinctrl-0 = <&ws2812_pio0_default>;
pinctrl-names = "default";
bit-waveform = <3>, <3>, <4>;
ws2812: ws2812 {
status = "okay";
output-pin = <21>;
chain-length = <144>;
color-mapping = <LED_COLOR_ID_GREEN
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
reset-delay = <280>;
frequency = <800000>;
};
};
};
```
- samples/drivers/led_ws2812/boards/rpi_pico.conf
```
CONFIG_WS2812_STRIP_RPI_PICO_PIO=y
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Use proper register mask for software reset register so
reset magic value sent to device is not malformed.
Co-authored-by: Bartosz Bilas <b.bilas@grinn-global.com>
Signed-off-by: Lukasz Madej <l.madej@grinn-global.com>
While waiting for the UART to be ready in ISR
mode, for simulation only, add a tiny delay per
iteration of the busy wait loops to allow
time to pass.
This Z_SPIN_DELAY is an empty macro for any
other target than simulation.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name which will be resolved by the nRF HAL
definitions to the same value.
This allows the TIMER peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The ISR prototype is not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
For simulation, we cannot get the UART regiter address
for the pinctrl config structure from DT, as that
cannot match the one allocated at build time.
So let's override it at runtime with the correct address
which is stored in the UART config structure.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name which will be resolved by the nRF HAL
definitions to the same value.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The ISR prototype used when building without the
interrupt driven UART was not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Interrupt trigger type register each bit indicate the configured interrupt
type. bit value is 0 indicate level trigger interrupt, 1 indicate edge
trigger interrupt.
The level trigger defined to ~BIT(0) equal 0xfffffffe not equal 0.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
A Zero Length Packet can be used by higher layer stack to discover when
an endpoint is being processed by the host. An example of this was
introduced as part of 0127d000a2 ("usb: device: cdc_acm: Use ZLP to
detect initial host read") in the CDC ACM class.
Not invoking the callback for ZLPs results in the higher layer stack not
being informed when the packet is consumed. This manifests as a CDC ACM
USB-IP device that cannot transmit to the host while being able to
receive from the host.
Signed-off-by: Abe Kohandel <abe.kohandel@gmail.com>
Switch to using named IRQs as index-based access makes no guarantees about
devicetree interrupt order.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch to using named IRQs as index-based access makes no guarantees about
devicetree interrupt order.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Consistently use "int0" and "int1" as interrupt names for CAN controllers
based on the Bosch M_CAN IP core. This aligns with the upstream Linux
bindings.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit partially reverts a change which was introduced in the
previous commit 5b9a0e5456.
usb_dc_ep_start_read() should also be called on transfer endpoints
like it has been before, otherwise the endpoint will not be armed
after it has been reconfigured.
Signed-off-by: Manuel Aebischer <manuel.aebischer@netmodule.com>
... so that it is possible to use a GPIO expander pin as the CS line.
Communication with the expander may involve an operation that cannot
be done from the interrupt context (e.g. an I2C transaction).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is a follow-up to commit ea1be7f242.
After the driver performs its initialization, it needs to deactivate
the QSPI peripheral. Otherwise, the peripheral would unnecessarily
consume power until some QSPI operation is performed (and only then
it will get deactivated), what depending on the application may take
a significant amount of time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
`release` is a mandatory method in the `struct spi_driver_api` API but
is not implemented in the SPI emulator. This can cause a test calling
`spi_release()` to segfault. Add a stub implementation that just returns
zero.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
With commit 734adf52c6, the MCUX LPI2C config structure no longer
contains a direct base address pointer. The base address must be
accessed via DEVICE_MMIO_NAMED_GET. Some declarations in the LPCI2C
target mode handler still used the old method of accessing the base
address, causing a build failure. Fix these accesses to use the local
declaration of the "base" variable.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
clangsa reports the error
mdio_nxp_enet.c:245:10: error: label at end of compound statement:
expected statement
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Added Kconfig assignment of qspi timeout.
Per nrfx v3.2 addition of qspi timeout in config
struct.
Signed-off-by: Kelly Helmut Lord <kellyhlord@gmail.com>
Introduce a new arch level Kconfig option to signal the implementation
of the RISCV Privileged ISA spec. This replaces
SOC_FAMILY_RISCV_PRIVILEGED, because this is not a SoC specific
property, nor a SoC family.
Note that the SoC family naming scheme will be fixed in upcoming
commits.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The controller can implement a reception FIFO as deep as 256 bytes.
However, the computation made by the driver code to determine how many
bytes can be asked is stored in a signed 8-bit variable called rx_empty.
If the reception FIFO depth is greater or equal to 128 bytes and the FIFO
is currently empty, the rx_empty value will be 128 (or more), which
stands for a negative value as the variable is signed.
Thus, the later code checking if the FIFO is full will run while it should
not and exit from the i2c_dw_data_ask() function too early.
This hangs the controller in an infinite loop of interrupt storm because
the interrupt flags are never cleared.
Storing the rx_empty empty on a signed 32-bit variable instead of a 8-bit
one solves the issue and is compliant with the controller hardware
specifications of a maximum FIFO depth of 256 bytes.
It has been agreed with upstream maintainers to change the type of the
variables tx_empty, rx_empty, cnt, rx_buffer_depth and tx_buffer_depth to
plain int because it is most effectively handled by the CPUs. Using 8-bit
or 16-bit variables had no meaning here.
Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
Add message buffer allowed values for S32K1xx devices. Except S32K14xW
parts which supports 64 MBs, the rest of the parts support a maximum of
32 MBs.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The entire switch statement is already wrapped in a lock which is
acquired just before configuring the gpio pin.
Signed-off-by: Yuval Peress <peress@google.com>
Alarm interrupt is disabled in cancel_alarm, we should re-enable it
in set_alarm, at meanwhile, should reset the compare register in
cancel_alarm to avoid the contention condition in
cancel_alarm & set_alarm in short time.
This change fixes the test case failure at
zephyr\tests\drivers\counter\counter_basic_api.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
The zephyr-gpio w1 driver introduced in this commit implements
all routines for the w1 api on top of the zephyr gpio driver.
W1 bit read, write, and reset operations are executed by
bit-banging the selected gpio.
Signed-off-by: Hudson C. Dalpra <hudson@bduncanltd.com>
Store the compile-time computed length of the `irq_count` into
a variable so that we have less to do in runtime.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Change the index variable type to `int` from `size_t` to compile
across 32bit and 64bit platforms without generating warnings.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Some STM32F4xx chips have an R division factor in PLL. Add possibility
to configure that.
Even though the output from the R division is not used, it can be
increased to reduce power consumption.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This change adds support for enabling ethernet MAC hardware checksum
offloading for STM32H7 based devices.
In Section 58.5.9 of the STM32H7 reference manual it mentions that
the STM32H7 ethernet MAC supports a Checksum Offload Module (COE).
I have tested the changes on my end where I enabled
CONFIG_ETH_STM32_HW_CHECKSUM and ensured that an application that
runs Zephyr on the STM32H7 can interoperate with a device with a
completely different implementation. Also, I deliberately made
the software not populate the IPv4 and UDP header checksum fields
in their respective headers and the COE was able to populate the
IPv4 and UDP header checksums.
Given that CONFIG_ETH_STM32_HW_CHECKSUM is not enabled by default
application developers have the option to either enable it or
disable it.
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
Reduce code-complexity of stm32_clock_control_init() function, which is
used and exists for both M4/M7 cores.
Replace dublicated code by proper preprocessor guarding.
This change shall reduce code-errors and copy-paste errors since same
functional code is present only once now.
Identify even more common code
Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
Set suspended as initial power state, only when the
CONFIG_PM_DEVICE_RUNTIME config is enabled.
The initial state was incorrect, when CONFIG_PM_DEVICE=y and
CONFIG_PM_DEVICE_RUNTIME=n. In that case, the power state was SUSPENDED,
but the device was actually enabled.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Updated API version enables multi-instance GPIOTE driver.
Additionally obsolete symbol that was used to specify
API version in the past was removed.
Affected drivers have been adjusted and appropriate changes
in affected files have been made.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Like the stm32H5, stm32u5 usb device has an independent
power supply, but control bit is PWR_SVMCR_USV.
The control bit for the stm32H5 is PWR_USBSCR_USB33SV (no change)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In sys_clock_set_timeout(), input "ticks" is used to compute next
timeout point, Ambiq's STimer API used to sets next timeout has input
parameter as ui32Delta, which inside the API is using
"this value to add to the STimer counter and load into the comparator
register" according to its spec, thus the this delta clock is
almost equivalent to input "ticks"'s concept, and is not related to
last_count, it should be computed directly from input "ticks".
This correction fixes the test case failure at
zephyr\tests\kernel\tickless\tickless_concept.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Using SDL_DISPLAY_ZOOM_PCT would cause mouse pointer/touch input
to not click at the correct position.
Signed-off-by: Jakob Krantz <mail@jakobkrantz.se>
This change marks each instance of the 'spi_driver_api' as 'static const'.
The rationale is that 'spi_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This change marks each instance of the 'api' as 'static const'.
The rationale is that 'api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Cache configured radio channel and apply them only when a relevant
radio task is requested.
This allows to configure the channel in the transmit metadata, thus
avoiding unneeded `nrf_802154` API calls in some scenarios.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Remove `IEEE802154_SELECTIVE_TXPOWER` option.
Cache the tx power value in nRF5 driver and make use of it on each
operation.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Rework the interrupt handlers of the FTM driver to support SoCs on
which FTM channels and overflow are routed through individual
interrupts, as opposed to a single OR'ed interrupt.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Enable runtime mmio configuration in mcux_lpspi driver. The fsl_lpspi
driver relies on physical address to determine instance number.
So mmap flag 'K_MEM_DIRECT_MAP' is required.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Enable runtime mmio configuration in mcux_lpi2c driver. The fsl_lpi2c
driver relies on physical address to determine instance number.
So mmap flag 'K_MEM_DIRECT_MAP' is required.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Add return code to lpspi spi_mcux_transfer_next_packet and print the
kStatus_* return code since it information is lost when translated to
errno.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a check to input_kbd_matrix_actual_key_mask_set() to return an error
if trying to change a key mask but the device does not define a keymask
in the first place.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This fix adds the STM32L4P5xx to the list of devices that have an
offset-to-page shift calculation of 12 bits. Previously, the driver
would only shift the offset by 11 bits when calculating the page to
erase.
This would prevent the driver from erasing the correct page.
Signed-off-by: George Beckstein <george.beckstein@ampaworks.com>
Use LL_RTC_EnterInitMode and LL_RTC_DisableInitMode instead
of rtc_stm32_enter_initialization_mode and
rtc_stm32_leave_initialization_mode.
Signed-off-by: Petr Hlineny <development@hlineny.cz>
When device runtime pm is enabled, Backup Domain protection is active
most of the time. RTC driver need this protection to be disabled in
order to set the time or calibration. This fix disable the protection in
set time and set calibration functions.
Fixes: 62843
Signed-off-by: Petr Hlineny <development@hlineny.cz>
There can be a case where not all regulators are being used,
resulting in an unused-const-variable warning,
so let's add a __maybe_unused keyword to suppress it.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This commit modifies the I2S driver to work for STM32H7
family of MCU's. Currently only TX is working.
Tested on nucleo_stm32h743zi. Requires dma1 & dmamux1 to be enabled.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Fix issue #66806, caused by PR #65172.
Return -EINVAL from bt_spi_get_header if op is neither SPI_READ nor
SPI_WRITE.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Current implementation of NXP mbox driver mbox_nxp_imx_mu
is using only one channel 0.
This commit adds support for multiple mbox channels as is
indented by mbox drivers.
Change done in .send api signaling mode leveraging provided
channel id to select correct General Purpose Interrupt.
Another change done in IRQHandler to check and handle all
channels.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
The setting of initial state in handled by the common driver,
which calls the enable function for any regulator that has
regulator-boot-on set, and is not already enabled.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
When not using 4 channel capture, overflows were never reported
to the application, because the check was in the
four_channel_capture_support branch.
Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
Check the return values from the I2C API functions called in init() and
fail driver initialization if unsuccessful.
Fixes: #66827
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The QCCID handler is Quectel specific and as such may not be part
of the modem cellular driver which only supports commands defined
in 3GPP TS 27.007
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
The modem_cellular.c driver now uses a common script to get
signal strenght, which is run on demand. This is more efficient
than polling it, and simpler since every modem doesn't have to
define their own variant of the script.
Additionally, the CSQ handler now stores the "raw" rssi value
returned from AT+CSQ to be parsed by the cellular_modem_get_signal
implementation.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Move the implementations of the cellular API in modem_cellular.c
to an cellular_driver_structure, and implement this API structure
withing the device drivers.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
In Passive Receive mode, ESP modem will buffer rx data.
This fix makes the data still available to user,
even though the peer has closed the socket.
Otherwise, user will fail to get the last rx data,
when the socket is closed by the peer.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Don't execute `irq_enable` in process of the `ra_icu_irq_connect_dynamic`.
The caller of `ra_icu_irq_connect_dynamic` is only `gpio_ra_pin_configure`
at this time. `gpio_ra_pin_configure` calls `irq_enable` just after called
`ra_icu_irq_connect_dynamic`.
So removing 'irq_enable' from 'ra_icu_irq_connect_dynamic' has no effect
on behavior.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
DEVICE_MMIO_MAP() is an unnecessary process, so delete it.
I created uart_ra.c based on uart_rcar.c, but
I forgot to correct the name. I fixed it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Devices like the ATSAM series chips have retained registers
which are used to store memory. The memory is accessed just
like RAM, but since they are registers, their size and
address is used directly.
This commit adds a near complete copy of the generic retained
ram driver and bindings file, adding the reg property to
the bindings file, and updating the init macro in the driver
to use the reg address and size.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Implement level based gpio interrupts, by using a worker queue to
repeatedly call the gpio callbacks until the gpio is no longer active.
Update unit test for new interrupts.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Use #if instead of IS_ENABLED for
CONFIG_SOC_IT8XXX2_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN, otherwise DTS files
are required to provide gpiok and gpiol even if they are not used.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Similar to other ITE drivers, wrap register accesses in ECREG. This will
allow mocking out the registers in tests.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Erase operation with block of 64KByte
larger size than the default 4K sector size
if the flash supports.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add max size check to dac sam and sam0
There is no size check in dac_sam_write_value and dac_sam0_write_value.
Besides, the ret value should also be different.
Fixes#65021
signed-off-by: Gaetan Perrot <gaetanperrotpro@gmail.com>
Move reading PCIE_CONF_CMDSTAT before actual usage. There are four
return branches before value is used.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add an option to enable a input_kbd_matrix_actual_key_mask_set API to
enable or disable keys dynamically in the mask. This can be useful if
the exact key mask is determined in runtime and the device is using a
single firmware for multiple matrix configurations.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This change marks each instance of the 'rtc_driver_api' as 'static const'.
The rationale is that 'rtc_driver_api' is used for declaring internal
module interfaces and is not intended to be modified at runtime.
By using 'static const', we ensure immutability, leading to usage of only
.rodata and a reduction in the .data area.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Only reset cause is supported as there is no common unique id
present on those chips.
Unique ID can be put in OTP but there is no single specification for this.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Use K_KERNEL_STACK_SIZEOF instead of the config directly to set the
stack size in k_thread_create() calls.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Update LPSS DMA init interface which is common and
independent of parent-node.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
We should set the z_clock_hw_cycles_per_sec as the value of
the system clock frequency.
There was a mistake in referencing the clock source set before
initialization.
I corrected it to reflect the clock value after initialization.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
I/O or memory decoding should be disabled via the command register
before sizing BAR for calculation MMIO size
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Only copy up to IFNAMSIZ - 1 number of characters of the interface name to
leave room for null termination of string.
Fixes: #66777
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When reconfiguring a previously used endpoint, it may still be locked
when a write was taking place when e.g. the host application crashed.
The call to udc_rpi_cancel_endpoint seems to do a proper cleanup of
the endpoint, i.e. the write semaphore will be released.
Fixes#66723.
Signed-off-by: Manuel Aebischer <manuel.aebischer@netmodule.com>
When Bluetooth is enabled, it is required to arbitrate flash accesses
between RF and write accesses (for user activity).
A dedicated flash manager is provided as part of STM32WBA BLE lib.
Implement a dedicated driver using FM Apis to handle RF activity.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
STM32WBA controller uses a PKA driver to perform cyphering operations
on keys. Since PKA hardware block requires RNG clock to be enabled, a
synchronization with zephyr RNG driver is needed.
Use RNG enable status to check if RNG could be switched off or needs to
be switched on.
Similarly in entropy driver, don't cut RNG clock if PKA is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The driver works on active low signals only, change the interrupt
configuration to trigger on falling edges only.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
There are some issues with the extended endpoint settings. The incorrect
setting leads to the chip being unable to respond with NAK when the host
polls the extended endpoint for data transfers. Additionally, the controls
for the extended endpoint's ISO and PID data sequence are also incorrect.
This commit addresses these issues to properly support extended endpoint
transactions.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
There are two registers that control the selection of one FIFO as data
buffer for 15 endpoints (ep1-ep15). Both registers should be configured
before sending and receiving data. Additionally, there was an issue with
the corresponding FIFO index setting in the 'usb_dc_ep_read_continue'
function, which has been addressed in this commit.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Turning on clock via clock controller and
resetting PIO device via reset controller on initializing.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Turning on clock via clock controller and
resetting PIO device via reset controller on initializing.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Turning on clock via clock controller and
resetting ADC device via reset controller on initializing.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Changed how to get clock frequency for PL022
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Removed all function calls from Raspberry Pi Pico SDK
Added functions for setting uart baudrate and format
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Changed how to get xtal frequency for Raspberry Pi Pico
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The stm32H5 mcu has an independent USB supply to be enabled
at init with LL_PWR_EnableVDDUSB function like the stm32U5 serie.
Both series have PWR_USBSCR_USB33SV bit in their USBSCR POWER reg.
and other series all have PWR_CR2_USV bit in their CR2 POWER reg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Boot into the deep power down state when `SPI_NOR_IDLE_IN_DPD` is not
enabled. DPD is the correct hardware state for the `SUSPENDED` software
state. Without this change, it takes a cycle of
`SUSPENDED->ACTIVE->SUSPENDED` to get to the low power state.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The previous behaviour led to an issue where we already expected data1
on the first transfer instead of data0. The DesignWare USB DC actually
implements the same behaviour. Also, the next_pid flag has to be reset
on setting up the endpoint.
Fixes#66283.
Signed-off-by: Manuel Aebischer <manuel.aebischer@netmodule.com>
The driver right now re-enters polling mode a couple times after the
matrix has been detected as stable as the key interrupt is still pending
and fires again once detection is reenabled.
Clear pending WUI interrupts before reenabling key press detection to
avoid that.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Information about IOAPIC can be located not in the first
DMAR Hardware Unit Definition subtable. Iterate them all.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Fixes uninitialized variable return by returning zero
at the end of function.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
This code fixes following issue:
The TX data chunk (with NORX set) is send to chip (via SPI) and at the
same time a frame is received (by the LAN8651 chip), there will be no IRQ
(the CS is still asserted), just the footer will indicate this with the
rca > 0.
Afterwards, new frames are received by LAN865x, but as the previous footer
already is larger than zero there is no IRQ generated.
To be more specific (from [1], chapter 7.7):
----->8-------
RCA – Receive Chunks Available
Asserted:
The MAC-PHY detects CSn deasserted and the previous data footer had no
receive data chunks available (RCA = 0). The IRQn pin will be asserted
when receive data chunks become available for reading while CSn is
deasserted.
Deasserted:
On reception of the first data header following CSn being asserted
------8<------
Doc:
[1] - "OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface"
OPEN_Alliance_10BASET1x_MAC-PHY_Serial_Interface_V1.1.pdf
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The description is a bit misleading as the packet is not even read in
the mentioned case by the OA TC6 Zephyr driver.
When the timeout occurs the data (packet) received by LAN865x may be:
- Read latter if still in the RX buffer of LAN865x
or
- Is (probably) dropped by LAN8651 itself as the RX buffer gets overrun
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The parity of the received footer from data transfer (also including the
NORX) shall be checked before members of struct tc6 are updated.
This prevents from updating the driver's crucial metadata (i.e. struct
oa_tc6) with malformed values and informs the upper layers of the driver
that error has been detected.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With the current approach, the driver prevents from TX transmission
when waiting on timeout (standard 100ms) for available memory to be
able to allocate memory for RX packet.
It is safe to just protect the part of reading chunks. In that way
pending TX transmission can be performed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If the DT node for mdio of nxp enet has a mdc freq specified,
use this when configuring the module.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
In init function, start timer with period CYC_PER_TICK if tickless is
not enabled, This change is for fixing the issue that disabling
CONFIG_TICKLESS_KERNEL the OS tick is not work issue, this
causes the OS not starting scheduling correctly.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
This commits create the dts binding for Ambiq BT HCI instance.
And create the SPI based common HCI driver for Ambiq Apollox
Blue SoC and the extended soc driver for HCI.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Fix a possible race condition in the keyboard matrix library where a key
would get pressed between the last read and reenabling the (edge
sensitive) interrupt and the even would be lost.
The window for this to happen is very narrow and had to artificially add
a sleep to reproduce it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the interrupt setup from both edge to edge to active. Edge to
active is all was needed anyway and it makes this compatible with gpio
controller that only support single edge interrupt.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a device driver to read events from a Linux evdev device node and
inject them back as Zephyr input events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The driver currently supports only dedicated FIFO mode (with
dynfifosizing if enabled). Control, bulk and interrupt transfers are
supported, isochronous transfers are not yet supported. The driver
accesses controller registers using sys_io.h, but for debugging purposes
one can get a register map from the driver's config, similar to the
usb_dc_dw.c driver.
Initial support also has vendor quirks for the STM32F4 SoC family.
Tested on NUCLEO-F413HG.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use new common header and remove usb_dw_registers.h.
No functional changes, only renaming of registers and field identifiers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This header is based on drivers/usb/device/usb_dw_registers.h and
describes registers of the DWC2 controllers IP and is intended for use
in both device controller drivers and a host controller driver. The
difference to usb_dw_registers.h is that this header does not confuse
offsets with bit positions, contains all the definitions required for
device mode, has register and bit field names identical to the databook
and no annoying underscores.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
If GDBSTUB is enabled and the kernel runs in tickless mode, the timer
must not convert the delta cycles to a 32-bit data type (cycle_diff_t in
this case). The delta_ticks variable would overflow and the next timeout
would be set before the current timestamp, thus generating an interrupt
right after leaving the handler. As a result, the system would receive
tens of thousands of interrupts per second and would not boot.
Cc: Michal Sojka <michal.sojka@cvut.cz>
Signed-off-by: Marek Vedral <marek.vedral@gmail.com>
rtc_get_time() on STM32 does not implement the -ENODATA return code.
This prevents testing the initialisation status of the RTC.
Fixed by reading INITS flag and adding a error path in
rtc_stm32_get_time().
Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
This reverts commit bffa0c6bddbc91d39f4b01baa34e3d0595760d50.
This FIFO implementation causes a regression by which the SPI
peripheral generates several spurious SCK cyles after the last
data has been sent.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Its default value (100 ms) resulted in PDUs big enough to never make it
through on a slow enough UART (e.g. ~1152-byte PDUs on a UART@115200).
The UART TXs were silently aborted.
A no-timeout value is now allowed and made the default.
Additional warnings are logged when it is likely that a UART TX
was aborted due to a too low timeout for the used baud rate.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
- Disable UART when the PPP interface is brought down.
This prevents an error when it is next brought up.
- Change the level of certain logs to be less concerning
and less verbose.
- Fix warnings regarding the passed parameter types of %p conversions.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
Add a config entry for the keyboard matrix thread priority. This
changes the current default, but that was pretty much an arbitrary numbe
anyay and the exact one should be picked the application so it should be
alright to do so.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add power management support to the gpio keys driver. When in suspend,
disable all the button gpios and interrupts.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Some targets do not give EoD at the end of a register read. They will
auto increment their address pointer on to the next address, but that
may not be of interest to the application where the buffer size will
only be set to the size of only that register. If the target, does
not give an EoD, then the Controller will give an Abort... but this
should not be treated as an error in this case.
There is still however a case where an abort Error shall still be
considered as an error. Athough the driver does not support it yet,
threshold interrupts are to be used if the length of the buffer
exceeds the size of the fifo. There could be the case where the
cpu can not get around fast enough to pop out data out of the rx
fifo and it will fill up. The controller will just give an abort
as it can not take any more data.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Generic Connector for the apollo4p_evb
Ran tests/drivers/gpio/gpio_basic_api
Ambiq does not support DUAL Edged Interrupts.
Added Connector Usages as defined by the Ambiq BSP.
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Process dest_scatter_interval and source_gather_interval
configurations and accordingly set the source and destination
increment values.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The gpio_pca953x gpio driver doesn't have
the input latch and interrupt mask
configuration which causes a lack of accessing
and using those features on an gpio expander
device. Fix it by adding input latch and
interrupt mask configurations in this driver.
Signed-off-by: Vudang Thaihai <vudang.thaihai@brillpower.com>
Change k_heap_alloc wait duration to K_NO_WAIT in kinetis USB driver,
since the usb_dc_ep_configure function may be called from an ISR
context, where only K_NO_WAIT would be allowed as a duration for this
function.
Fixes#66507
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add power management support to ft5336. The chip can go to hibernate and
reduce power consumption to a minimum, the only way to wake it up though
is by pulsing the reset or wake signal. Only reset is implemented in the
driver right now so only allow this functionality if the reset pin is
defined.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The DMA interface allows start and stop to be called multiple
times and driver should ensure nothing bad happens if the calls
are not balanced.
Fix an issue where after a start-stop sequence the DMA would be
powered down, and then a subsequent stop would result in a crash
as driver accesses registers of a powered down hardware block.
Fix the issue by handling stop without actually reading the hw
registers to check channel status.
Link: https://github.com/thesofproject/sof/issues/8503
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Enable the RNG module interrupt every time it is resumed.
It is done to make sure the interrupt is always enabled. The CR register
may not persist when the device clock is disabled on some chips.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Move enabling/disabling the RNG module to acquire/release functions.
It causes enabling the RNG module for the get_entropy_isr function.
It fixes hanging in the get_entropy_isr function.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
STM32U5X has 128k/256k/512k/1M/2M dual bank Flash.
The address of the 2 bank are continuous, so it's no need a "Dummy page"
in "stm32_flash_layout", which cause wrong slot1 section (for secondary
image), and the BANK2_OFFSET is not right either, which cause
"flash_stm32_valid_range" return a failure.
To fix the issue, just set CONFIG_FLASH_SIZE to STM32_SERIES_MAX_FLASH
Tested on NUCLEO-U545RE with mcuboot.
Signed-off-by: Weifeng Li <weifeng.li@aofrio.com>
Update documentation for SPI_NRFX_RAM_BUFFER_SIZE Kconfig symbol
to reflect new usage of it. Now the symbol specifies size of RX buffer.
The change introducing support for RX buffer placed by a linker in
memory region defined in SPIM devicetree node is in a parent commit
of that one.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This patch adds support for RX buffer placed by a linker in
memory region defined in SPIM devicetree node. The buffer is placed
in memory region defined as devicetree node. The memory region node's
reference is then stored in `memory-regions` property of SPIM node.
Added build time assertion to check if `CONFIG_SPI_NRFX_RAM_BUFFER_SIZE`
Kconfig symbol has value greater than 0 when given SPIM node has
`memory-region` property.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Fixed Kconfig to remove dependency between modem_socket and
modem_context, the two do not depend on each other and
should be possible to use independently
Signed-off-by: Alessio Lei <alelei94@yahoo.it>
Improve code readability of this driver by simplifying and reworking
some of the source code, formatting and comments.
This commit is not meant to cause any functional difference.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The LIS2DU12 is a linear 3-axis accelerometer with advanced digital
functions whose MEMS and ASIC have been expressly designed to build
an outstanding ultralow-power architecture in which the anti-aliasing
filter operates with a current consumption among the lowest in the
market.
This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/en/datasheet/lis2du12.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add Kconfig.trigger_template to allow an extensive re-use of
trigger configuration inside all sensor drivers.
This template must be included as in the following example:
module = LSM6DSO
thread_priority = 10
thread_stack_size = 1024
source "drivers/sensor/Kconfig.trigger_template"
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use intA and intB fields of the DMA descriptor to decide when
the interrupt is per block versus when the transfer is complete.
This allows us to return the correct flag to the user.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The MCUX LPC DMA driver now recognizes the compelete_callback
flag. Set this flag so we receive an interrupt after completion
of every block.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The MCUX LPC driver now recognizes the complete_callback
flag. We need to set this flag so we receive a callback
after every block.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
NRFX has introduced HALY software layer which is a superset of HAL
and aggregates some hardware registers manipulations in a single
function calls.
Quote from nrfx changelog:
"HALY is an extension of the HAL layer that aggregates basic hardware
use cases within single functions. Now it is used instead of HAL
in the corresponding drivers."
This commit zephyr's driver to be aligned with the approach used
in nrfx, where drivers has been switched to use HALY instead of HAL.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
NRFX has introduced HALY software layer which is a superset of HAL
and aggregates some hardware registers manipulations in a single
function calls.
Quote from nrfx changelog:
"HALY is an extension of the HAL layer that aggregates basic hardware
use cases within single functions. Now it is used instead of HAL
in the corresponding drivers."
This commit zephyr's driver to be aligned with the approach used
in nrfx, where drivers has been switched to use HALY instead of HAL.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
IEEE 802.15.4-2020 defines four possible values for Key Identifier Mode
field of the Auxiliary Security Header. The current ieee802154 driver
API only supports two of them: b00 and b01. This commit adds support for
the two remaining Key Identifier Mode values. It's done by replacing a
field that can only hold Key Index into a field that can holds a pointer
to the entire Key Identifier field.
See IEEE 802.15.4-2020, sections 9.4.2.3 and 9.4.4 for further reference.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Add support for enabling the clock security system, which can detect
failures of the HSE clock.
Includes tests for nucleo_h743zi and nucleo_g474re.
Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
Isochronous endpoint issue with USB drivers on STM32G491
we setup an isochronous endpoint and are having an issue
where every other frame sends the desired data sandwiched
between garbage data.
For isochronous the parameter ep_kind into the fonction :
HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress) must be PCD_DBL_BUF.
The parameter pmaadress (EP address in The PMA) is like that:
EP address in The PMA: In case of single buffer endpoint
this parameter is 16-bit value providing the address
in PMA allocated to endpoint.
In case of double buffer endpoint this parameter
is a 32-bit value providing the endpoint buffer 0 address
in the LSB part of 32-bit value and endpoint buffer 1 address
in the MSB part of 32-bit value.
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Separating two new functions force and allow l1
to have the current state with separated functions
in the ipc file so that SOF can call these
functions via IPC DMI_FORCE_L1_EXIT. Change related
to the addition of a new parameter to force
DMI L1 exit on IPC request.
Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
Added a spinlock to accesses of registers and struct gpio_ite_data,
except for gpio_ite_isr() function.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Add test case for all drivers that are supporting the die temperature
feature, and fix right away all the yet undiscovered issues.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
When we are sending a network pkt, do not tweak the original
packet but the cloned one. The original behavior is ok too, but
logically we should adjust the cloned packet only that is being
received by the stack. This also means that we avoid one extra
copy to tmp variable when sending the packet.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
This gets rid of the z_ prefix.
Note that z_xt_*() are being used by the HAL so they cannot be
renamed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds a charge_enable handler to facilitate enabling and disabling
a charge cycle. This deprecates enabling and disable the charge
cycle via the CHARGER_PROP_STATUS property.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
Submit resume event after remote wakeup (resume) signalling is
initiated. Handle it same way as in the usb_dc_nrfx driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rename the native Linux SocketCAN driver to reflect that it can can now be
used in both native_posix and native_sim (with or without an embedded
C-library).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
If RC32K oscillator was on during startup, calibration
work was never going to actually calibrate this oscillator.
It happen because lpc_clock_state.rc32k_started was only set when
oscillator was turned on after if was turned off.
Now lpc_clock_state.rc32k_started is also set when rc32k is already
started (possible during boot).
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Extract a helper function for handling an SMB alert, as every
SMBus implementation will have to loop through the peripheral
address which might have triggered the alert.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add includes which are actually required for the compilation
in the headers themselves to avoid include dependencies.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
DDR50/DDR52 modes should use PINCTRL_STATE_SLOW (50MHz), so the lack of a
break statement after enabling DDR mode is expected. Add an explicit
__fallthrough to resolve the issue flagged by coverity scan
Fixes#65324
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Explicitly set host_io fields, instead of using memset(). This way the
fields should have values that are defined in the enum types for each
field.
Fixes#63130
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The plic has a very simple mechanism to claim an interrupt as well as to
complete and clear it. The same register is read from/ written to to
achieve this.
Get the ID of the HART that serviced the interrupt and write to the
claim complete register in the correct context
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
The plic uses contexts to seperate irq enables, threshold priority and
claim complete registers from each core for a given platform. As well as
this, each privilege level has its own context.
for multi-core platform's, we need to be able to enable/ disable a
global interrupt for all the cores that are associated with Zephyr.
To do this, we need to make some assumptions:
1. The privilege contexts are contiguous
2. M mode context is first, followed by S mode.
We know how many cpus are used in an application and each cpu's hartid,
thanks to some very handy inline functions. So we iterate through each
cpu and use the hartid of a cpu in the calculation of the context.
While we are at it, In an effort to make the driver more readable,
allign with the macro naming convention outlined in Linux's PLIC driver
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
With low LPTIM freq when prescaler is set to 16 or 32,
the CONFIG_SYS_CLOCK_TICKS_PER_SEC must be reduced to
LPTIM CLOCK_/prescaler to avoid spurious timer wakeup activity.
Assert error if the CONFIG_SYS_CLOCK_TICKS_PER_SEC
is not compatible with the lptim clock freq.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Rename to LPTIM_PRESCALER, the <st,property> prescaler of
the stm32 LPTimer. This commit gives better readability than
LPTIM_CLOCK_RATIO.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The commit fixes the SHA driver because the ROM API has the following
changes from ES to QS chip:
1. base addres: from 0x13c -> 0x148
2. required SHA context buffer size : from 228 -> 240 bytes
This change also adds a check for the pre-allocated buffer size of the
SHA context when the driver initiliazes.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Remove BT_SPI_BLUENRG Kconfig parameter as it is redundant according to
the new changes introduced by ST SPI protocol V1 and V2.
Remove "config BT_SPI_BLUENRG" from the boards that were using it.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Introduce STMicroelectronics SPI protocol V2 which is used in BlueNRG-1
and successor devices.
Change the size of the variable "size" to 16 bits as it is necessary for ST
BlueNRG-1 and successor devices.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Replace the header acquisition scope in bt_spi_send with bt_spi_get_header.
Add WRITE_DATA_CONDITION in order not to retransmit data without reading
the header as it is meaningless for ST BlueNRG devices.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Update structure of spi.c to have a better and cleaner separation
between STMicroelectronics and Zephyr SPI protocol.
Introduce bt_spi_get_header to separate algorithms well for
header acquisition in different protocols.
Remove header acquisition from bt_spi_rx_thread to make it simpler.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Multilevel interrupt configs are leaking into every single build without
this option being enabled, so guard the Kconfig and include files to
avoid this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for uc8175 display driver. uc8175 has a slightly
different command/data length requirements for certain registers,
namely TRES and PTL, compared to uc8176/uc8179
This commit refactors the driver code and such that setting TRES and PTL
registers are now done by function pointers provided by config->quirks,
by the same token as how it is done for setting CDI register
Signed-off-by: Xiao Qin <xiaoq@google.com>
Configure to grant SI permissions to allow to set MAC,
update hash filter table and promiscuous multicast.
Fixes#66198
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
- Allow non RTIO i2c drivers to be intermixed with RTIO drivers
- Remove reference to rtio_spsc_drop_all()
- Fix impllicit cast which throws an error with more restrictive
compile flags
Signed-off-by: Yuval Peress <peress@google.com>
Ambiq UART requires specific busy wait during initialization for
propagating powering control registers, original k_busy_wait()
used here generated a dead loop because k_busy_wait() relays on
timer, who's driver is initialized after UART(UART init in
PRE_KERNEL_1, timer init in PRE_KERNEL_2), replace k_busy_wait()
with checking power status register is more suitable here.
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Automatic Wi-Fi station reconnection is forced even when
application requests disconnection. This PR adds a check
in the disconnection event reason to decide whether or not
perform the reconnection.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
As the display API now check against valid callback functions and
returns -ENOSYS (or equalent), there is no need to provide
such functions in the driver code
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
The FTM counter modulo register (MOD) holds a 16-bit value, but PWM
set_cycles API allows to set 32-bit cycles values.
Fixes#66226
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fix error writing to the CR register on the first call to SPI configure on
NXP MKE1xF. On the first call, the module clock is not enabled and writing
to the CR register will fail.
Fixes: #66036
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The DMA channel data structure can retain config information.
We need to clear this everytime dma_configure is called on a
channel.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Need to do the ENET module-level clock initialization from zephyr
instead of MCUX HAL, because now there are multiple zephyr drivers with
different init priorities that rely on the module being clocked. MDIO
must be initialized before the ENET MAC, and the MAC driver currently
calls ENET_Init from the HAL to initialize the clock, but MDIO needs the
module clock enabled first on some platforms. So replace the MAC init
with ENET_Up from the HAL, which doesn't include clock init, then do
clock init from a higher priority sys init based on the parent
compatible.
Also, add support for enet clock ungating with clock_control_on on ccm
driver do this with current platforms supported.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
- PHY can be set up as rmii but still use 25 MHz MDC, add DT property
value for this case
- Fix KSZ8081 driver spamming phy status in debug level logging,
and fix some other state/logging logic
- Fix PHY driver not rescheduling monitor work if first configuration
fails, change code path to use goto for errors
- Handle case where some phys are not using the gpio pins in phy driver
Make GPIO properties of ksz8081 phy optional since these hardware pins
may be unused on some boards
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the handler of SI Rx event within
the shim driver itself.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Remove the functions linux_socketcan_setsockopt() and
linux_socketcan_getsockopt() as they are unused.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
During init i2c_ambiq device, the bitrate calculation is not correct,
results in incorrect device speed, or failed to configure i2c device
if clock-frequency is set to higher than I2C_BITRATE_STANDARD
Signed-off-by: Bryan Zhu <bzhu@ambiq.com>
Add a "input kbd_matrix_state" shell command. This prints the state of
a keyboard matrix in a much more compact representation than the normal
input event dump, but also keeps track of any key seen during the
execution and reports that on the "off" command. The output can be used
to help setting the actual-key-mask property.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define the edge-trigger register base address based on whether
the PLIC node in the devicetree has an additional compatible
that supports edge-triggered interrupt.
Limited the implementation to Andes NCEPLIC100 only, updated
the devicetree binding of `andes_v5_ae350` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Do not allow the modem to sleep if the driver is busy.
Fix CTS filtering. Ignore small pulses on the CTS line.
Fix socket restoration. Restored sockets could be mismatched
with a wrong type.
UDP sockets could be duplicated during restore.
Improve IO debug mode. Use warning message for IO debug mode
to easily see IO transitions color coded in a terminal.
Ensure the UART is enabled whenever the driver needs to send
commands to the modem.
Ensure DNS resolver is re-initialized after the modem is powered off.
PROD-307
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
There is reverted CPA check condition in routines:
dai_ssp_pm_runtime_en_ssp_power()
dai_ssp_pm_runtime_dis_ssp_power()
In result disable always timeouts while enable returns before
CPA bit set. This cause sporadic exceptions on HW.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Change the gpio_kbd_matrix_set_detect_mode to skip setting gpio
interrupts if we don't have callbacks configured. This is the case if
the driver is running in poll or scan mode.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The address of most of the registers defined in
the driver are wrong. This fixes it, following
the correct numbering as can be found in the
device's datasheet. Moreover, re-grouping of
the macros according to their functionality.
Signed-off-by: Nikos Agianniotis <na@neq.dk>
In the kconfig descriptions and the links to documents
replace native_posix with native_sim, or a generally
applicable description.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Use native_sim in the help messages platforms examples
instead of native_posix.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
As the display API now check against valid callback functions and
returns -ENOSYS (or equalent), there is no need to provide
such functions in the driver code.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Update the Kconfig for the npcx eSPI driver so it's automatically
enabled if the devicetree node is enabled.
Signed-off-by: Keith Short <keithshort@google.com>
Update the Kconfig for the it8xxx2 eSPI driver so it's automatically
enabled if the devicetree node is enabled.
Signed-off-by: Keith Short <keithshort@google.com>
Add code to configure and program Lcu, Trgmux and Emios_Icu IPs to
get the the rotations by the motor in radians.
Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Co-authored-by: Mayank Mahajan <mayankmahajan.x@nxp.com>
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
`pm_device_runtime_get` and `pm_device_runtime_put` have returned `0`
when device runtime PM is not enabled since #56222. Manually checking
the state is no longer required.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Xtensa simulator console should not be enabled when the target is using
winstream console, otherwise we will have multiple definitions of the
same function.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Enforcing the peer's behavior is not strictly necessary. All the host
should do is make sure it is resilient to a spec-violating peer.
Moreover, a growing number of platforms were disabling the check, as the
spec allows "batching" HCI num complete packets events, stalling ATT RX.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Co-authored-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
If no public address was set, it should just do nothing instead of
erroring. The function should also be static and there's no need to copy
the address struct.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
STM32CubeWB v1.18.0 replaces Master with Central & Slave with Peripheral
in the file app_conf.h (modified in the commit updating lib/stm32wb)
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Use "const LL_TIM_IC_GetCaptureCHx" & "const LL_TIM_IsActiveFlag_CCx"
with STM32F1X series, following changes in stm32cube:stm32f1xx:drivers:
include:stm32f1xx_ll_tim.h
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Use "const LL_TIM_OC_GetCompareCH" & "const LL_TIM_IsEnabledIT_CCx" with
STM32F1X series, following changes in stm32cube:stm32f1xx:drivers:
include:stm32f1xx_ll_tim.h
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Add an optional actual-key-mask property to filter out key combinations
that are not implemented in the actual keyboard matrix.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
U-blox SARA-R4 already exists but the behavior is different,
requiring a separate driver instance. For instance, R5 autostarts,
so this commit also adds support for skipping power on pulse.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Suspend the RNG module when the pool is full to save power. The
generated numbers aren't used anyway.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
When there'is no phy at the address both registers will return
0xFFFF, giving a phy address of UINT32_MAX, not 0x00FFFFFF.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The bit check field is redundant since the callback struct is masked to
a single pin already. Drop it, simplify the code a bit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Use the same ret variable name as the rest of the file, drop a redundant
mask, use gpio_pin_interrupt_configure_dt.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Mute the function declaration warning, the compiler was emitting when
compiling the esp32 Wi-Fi driver with IPv4 disabled. The
net_dhcpv4_start() function was visible during compile time, even when
IPv4 was disabled.
Signed-off-by: Marc Lasch <mlasch@mailbox.org>
The 62833 added a regression at SAM ethernet drivers which always fail
to initialize due to a wrong switch case implementation and without
review from maintainer. This add more information and fix the issue.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The range and sensitivity tables don't match the datasheet
or the DTS binding file. This changes the array lookup tables
to match the datasheet and binding file.
Signed-off-by: Mike Voytovich <mike@rokkresearch.com>
Add a poll and scan mode for the driver. If any of these are set, the
driver does not use the GPIO interrupts to detect when the matrix has to
switch to polling mode. Instead, it keeps polling it all the time,
either by enabling all the columns and poll the rows for activity, or
just keep scanning all the time.
Poll mode is useful if the specific SoC used does not support GPIO
interrupt on all the row GPIOs at the same time, scan mode if it does
not even support selecting all the columns at the same time.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Tweak the polling mode so that the driver never exit polling mode if
poll_timeout_ms is 0. This is useful if the specific driver does not
support idle mode.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The state variable to tracking the unstable state of a key is currently
being cleared based on the bit value, which means that on release it's
not being cleared at all. Fix that by clearing using the bit mask
instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
scan_clk_cycle is used to store values from k_cycle_get_32(), it very
much needs to be a uint32_t.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit introduces a new interrupt controller driver used
for NXP's IRQ_STEER IP.
Apart from introducing the driver itself, this commit contains
the following changes:
1) Switch i.MX8MP to using the XTENSA core interrupt
controller instead of the dummy irqsteer one.
* this is required because the binding for the
irqsteer driver is no longer a dummy one
(since it's being used by the irqsteer driver).
As such, to avoid having problems, switch to
using another dummy binding.
2) Modify the irqsteer dummy binding such that it
serves the IRQ_STEER driver's needs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The command response buffer will return the total number of bytes
transfered. This will write back to the pointer which is to contain
the number of bytes sent or received.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This commit reworks the adltc2990_fetch_property_value function
to pass its result through a variable pointer instead of direct return.
This is done in part to separate the errno value being return in the
default case of the switch from the result of the function, but also
to make it easier the fix a Coverity issue regarding the unhandled
return values of i2c reads.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
This commit adds a missing return value check. Since the I2C write
failed we release the semaphore and returning immediatly instead of
using goto exit.
Fixes#65352
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
This commit adds a missing return value check for a register read.
The affected function was updated to use the regular errno return value
and to pass the result through a pointer instead.
Fixes#65346
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
This commit adds a missing return value check during register read.
Added an imidiate return to remove the seemingly unwanted side
effect of also waiting for the bus read to work.
Fixes#65374
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
This commit adds a missing return value check during register read.
Added an imidiate return to remove the seemingly unwanted side
effect of also waiting for the bus read to work.
Fixes#65383
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Simplify the driver header implementation, so that there are not
structs and unions different per each situtaion, and make just one
function for the enet module drivers to call on each other. Also,
capitalize existing enums.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Make sure that events flagged as high priority are handled when
CONFIG_BT_RECV_BLOCKING is not defined.
Fix for #65892.
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Add an emulated DMA driver. Emulation drivers are great to have
for each driver API for multiple reasons:
- providing an ideal / model driver for reference
- potential for configurable backend support
- seamless integration with device tree
- multi-instance, etc, for all supported boards
- fast regression testing of app and library code
Since many other drivers and lbraries depend on DMA, this might
help us to increase test coverage.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
The LPS28DFW is an ultracompact, piezoresistive, absolute pressure sensor.
Compared to the LPS22DF, the LPS28DFW is waterproof and has a Dual FS
capability and does not have SPI. This commit extends the LPS22DF driver to
be compatible with the LPS28DFW device.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
Do not keep both DMA request enabled whenever the SSP is in use. Manage
the SSCR1_TSRE and SSCR1_RSRE bits in sync with the enabled directions.
When only playback is used there is no need to have the RX DMA request
enabled for example.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
The receive FIFO needs to be drained in a different way depending when it
is done.
- before start
If the RX FIFO is in overflow state then we must read all the entries out
to empty it (it was after all full).
- before stop
The DMA might be already running to read out data. Check the FIFO level
change in one sample time which gives us the needed information to decide
to wait for another loop for the DMA burst to finish, wait for the DMA to
start it's burst (DMA request was asserted) or drain the FIFO directly.
No need to drain the RX fifo at probe time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
When loading the SSP configuration from a blob ignore the bits which would
enable the TX/RX or DMA requests at configuration phase.
The TX/RX enable and DMA request is handled by the driver itself. If the
blob wrongly enables any of the bits can have runtime (startup time)
seemingly random issues.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
For the Ambiq Apollo4x soc, every 32 pins share the same IRQ
number. irq_disable() should not be called for the pin interrupt
disablement, otherwise the interrupt of pins in the same GPIO
group will be disabled as well.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Use the "ambiq,gpio" binding to combine the "ambiq,gpio-bank"
child nodes for Apollo4 Plus soc.
Also update the GPIO driver accordingly.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Interupts should be enabled after int line configuration in bmi.
When the device goes to a suspended state interrupts must be disabled.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
The wake-up control input is IT8XXX2_IRQ_WU66.
Testing the wake-up functionality on GPF6 is normal.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The NET_L2_ETHERNET_MGMT configuration option is required to allow
setting MAC address or PLCA parameters with the LAN865x driver.
To avoid mistakes with per-board configuration files - it has been moved
to Kconfig and automatically selected when the driver support is enabled.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Handle the situation when OA TC6 compliant device signals to the host
that its configuration is lost - i.e. the SYNC bit in the footer is
cleared.
In this (unlikely happen) situation the device is reset and reconfigured.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
As part of IRQ service routine, there is at least one data transmission
performed between OA TC6 compliant device and HOST uC.
As this transmission can happen when there is no valid data to be read
(and its only purpose is to deassert the interrupt) the DV bit in footer
may be cleared. As this situation is expected with this approach - the
LOG level can be safely lowered from error to debug.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
According to the OPEN Alliance 10Base-T1x standard (point 7.7), it is
mandatory to read at least single data chunk (no matter if received data
is valid or not) to deassert the interrupt in the LAN865x (then the tc6
structure fields are also updated from the footer).
Current approach with reading OA_BUFSTS register was providing the
required information (RCA and TXC), but could cause transmission "stalls"
as this operation (i.e. control, not data transmission) is not causing
deassertion of the interrupt IRQ_N line from OA TC6 compliant device.
With this patch - the transmission is always performed at least once, so
interrupt is always deasserted.
As the functionality of oa_tc6_update_buf_info() - i.e reading value of
RCA and TXC - has been replaced with extracting data from footer, this
function can be safely removed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In a previous change, STM32U5 GPDMA specific behavior was set into a
specific configuration applying only to few devices impacted by a specific
silicon erratum.
As part of this change, dma suspension before dma stop was set to apply
to the specific erratum workaround.
It appears, this was wrong and dma suspension before dma stop should
be done on all devices compatible with stm32u5 dma. This fix re-instantiate
the correct behavior.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Wakeup-source configuration is about configuring registers.
It belongs to uart_stm32_registers_configure().
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Some modems or networks require PAP authentication for successful
LCP handshake. Tested on U-blox SARA-R5 with zephyr,gsm-ppp.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
This renames the I2C 'DCR' mode to 'LVR' as that is the variable it
should be looking at and not the dcr value. This also fixes the get
'lvr' mode argument.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Either switching to CAN_DEVICE_DT_INST_DEFINE with [1] missed
updating mcp251xfd or missed in merge. Fix using function
pointer for init in mcp251xfd.
[1]: https://github.com/zephyrproject-rtos/zephyr/pull/62925
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Configure the sw trigger just after calibration
So the conversion can start on regular channel on the
software control bit.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The Transfer Complete flag (TC) is used to check if a transfer is
complete. This mechanism is used before suspending the UART module to
make sure that all data are sent before the suspend procedure.
The UART ISR clears this flag after completion of a async transfer which
causes a hang during UART device suspend setup.
There is just no need to clear this flag in ISR, it is cleared every
time we start a new async transfer.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
In case of boards where REF_CLK signal is not connected
to the GPIO0 by default add the possibility to use
the optional GPIO16/GPIO17 as a REF CLK source.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Simplify and clarify spi_stm32_shift_m by splitting it in
3 smaller functions with clear names.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
In H7, TXP indicates when its FIFO has room for, at least, one
packet. Thus, rename ll_func_tx_is_empty as ll_func_tx_is_not_full,
to be consistent in all platforms.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Avoind calling startMasterTransfer multiple times in a
transaction by moving it to the transceive() function.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
the FIFO Rx need to have a Minimum memory to works
distributed the rest of the ram_size memory between
the different TX FIFOs except the first which is
a control endtype with max data payload of 64 bytes
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Receiving uart messages like: "\r*\n*\n" ('*' is a wildcard here) resulted
in invalid echo and invalid console_getline() output.
For example after receiving "\rabc\nd\n" uart_console_isr() echoes
"\r\nabcd\r\n" (note that "\r\n" before 'd' is missing) and after calling
console_getline() twice we received "" and "abcd".
uart_console_isr() changes single occurences of '\n' and '\r' to "\r\n" and
to avoid outputting "\r\n\r\n" after receiving "\r\n" it keeps track of the
last character. But it was tracking only the control characters not all
characters so in case of inputs like "\r*\n" the '\n' was omitted because
the last tracked character was '\r'.
Its fixed by tracking last character no matter of its type
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Add an option to call an application specific hook when setting the
column to scan. This makes it possible to handle application specific
quirks.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This will allow to init watchdog on HW's supporting different
number of cpus and watchdogs based on runtime arch_num_cpus
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Printing fractionals currently put the sign on integer values on the
fractional part, for example:
longitude : -6.-207483333
Run an extra abs to get rid of the sign there for latitude, longitude
and altitude, compute the sign separately so it works for numbers
between -1 and 0 as well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
While enabling workaround for PAN 58 the PPI driver is used.
This requires the nrfx PPI driver to be enabled thus CONFIG_NRFX_PPI
Kconfig symbol needs to be set.
Jira: NRFX-1616
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This check has to be done independent of whether RAM is used for buffers
or not and depends on device maximum length property.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Instead of assuming only RAM is accessible by EasyDMA, use the generic
DMA accessible function.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Some targets may not have `NRF_SPIM_HAS_32_MHZ_FREQ` or
`NRF_SPIM_HAS_16_MHZ_FREQ` symbols but have `NRF_SPIM_HAS_PRESCALER`
symbol defined. The symbol informs that target supports 32 MHz and
16 MHz frequencies for SPIM instances.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The CLOCK HAL header is only needed for nRF5340 SoC. It's used when
user wants to configure SPIM instance to 32 Mbps. The HAL checks
if is running at 128 MHz as only then 32 Mbps is supported.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
NSEC_PER_SEC is an unsigned literal which will promote variable increment
to unsigned for the comparison operation, thus returning -EINVAL for
negative increment values.
For positive increment, -NSEC_PER_SEC becomes a large unsigned value
which will also return -EINVAL.
Fix by casting NSEC_PER_SEC to an int.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The zephyr bluetooth stack expects the controller to know its public
address, if any. At least for BlueNRG, the public address is forgotten with
every reset/power cycle, so there needs to be a way to set it from within
zephyr. This is accomplished using the `Aci_Hal_Write_Config_Data` HCI
command, as described in PM0237.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
"LL only" is not the only config option of potential interest, e.g. the
public address is also important.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This allows HCI drivers to expose vendor-specific functions to set the
public address.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Previously, the idle bit would be read for X amount of times. This
could vary alot depend on the CPU speed. Timeout is now to happen
from the cycle time.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Code uses local RAM buffer to properly handle the case where provided
USB transfer TX data is not in RAM.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
There's a ternary operator that depends on configuration-defined macro:
`CONFIG_DYNAMIC_INTERRUPTS` is not enabled by default
for any of the platforms that use PLIC,
it is possbile to set it to `=y` though.
This triggered the Coverity check to report it as dead code.
Fixes#65576.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This commit provides support for changing PLCA parameters stored in
lan865x_config_plca structure.
After values are updated, the LAN865x needs to be reset and then
configured with new values.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The LAN865x device after HW reset supports only the non-protected control
transmission mode. When it is reset alone - without resetting already
configured HOST system - one must assure that in HOST's OA TC6 driver
the protection SPI transmission support is disabled.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The ctx->reset member of struct lan865x_data shall be cleared each time
one wants to reset the LAN8651 device.
Before this change this value was only initialized in the lan865x_init().
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change allows modification of the PLCA configuration in the lan865x
driver.
Values in this structure can be set via device tree as well as modified
by the user program.
Without this change the latter use case would not be possible as the
struct lan865x_config structure is defined as read only and its data
is only provided by device tree.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add driver for NXP ENET which is a rework of the old
eth_mcux.c driver which had become unmaintainable due to
fundamental problems with the lack of PHY abstraction.
eth_mcux.c and the corresponding compatible nxp,kinetis-ethernet
will be deprecated and this new driver will be supported instead.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add Driver for KSZ8081 Ethernet PHY. The Generic MII Driver
is not sufficient to use for this PHY chip which has special
vendor implemented behaviors.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add a property to the ethernet controller binding
indicating what type of connection the MAC has with
the PHY device.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The Device Multiplexer (devmux) is a pseudo-device that can
be used to select between multiple included sub-devices.
It is experimental, but its current use is in system
remediation. Take for example, the scenario where the
system console and log subsystem both have the uart backend
enabled. The case may arise, where the chosen backing uart
could be an abstraction of another very high-bandwidth bus
- such as a PCIe BAR, a UDP socket, or even even just memory.
If the "service" (for lack of a better term) that backs this
abstract "uart" experiences an error, it is of critical
importance to be able to switch the system console, uart log
backend, or whatever to another uart (semi-transparently) in
order to bring up a shell, continue to view system logs, or
even just support user console I/O.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Adds the tja1103 enet phy for setting phy options on the mr_canhubk3.
Co-authored-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
MDIO controller is part of GMAC and it requires GMAC ethernet driver to
initialize first because it will reset the whole GMAC hw block during
initialization. Both C22 and C45 APIs are supported.
Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
specific to platform, watchdog reset line can be connected either to
CPU, SOC or none of the entity. These resets cannot be configured from the
application. So added a warning message when application configures this
option
Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
added support for watchdog enable/disable at boot
Pausing watchdog timer when CPU is halted by the debugger and
pausing watchdog timer when CPU is in sleep state is not
configurable through application, so added warning log with return success
Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
clearing interrupt flag will not assert the system reset as per IP spec,
so interrupt flag should not be cleared in isr
use #if macro check directly with DT_ANY_INST_HAS_PROP_STATUS_OKAY for
interrupt
Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
mmu enabled platform needs mapping of physical address ranges to
the virtual address at runtime. So using DEVICE_MMIO_* helper macros to
map physical csr address space to RAM runtime if MMU is enabled
Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
This option let specify at startup the zoom factor to apply on the
SDL window. See CONFIG_SDL_DISPLAY_ZOOM_PCT.
Signed-off-by: Arnaud MAZIN <arnaud.mazin@gmail.com>
SysTick usually has higher measurement resolution than the IDLE timer.
When the time in low power mode is very short or 0, it is possible that
SysTick usually has measures more time since the sys_clock_set_timeout
than the idle timer.
Handle that case to keep uptime correct.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The idle timer has its max value and can overflow. We measure time passed
since the sys_clock_set_timeout call. Take possibility of the overflow
into account.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
When the idle timer is in use, we calculate number of cycles passed
since the sys_clock_set_timeout call.
The cycle counter can overflow easily, when the counter is 32-bit wide.
Handle that case.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The code to handle OA TC6 compliant device's status is generic and can
be moved to device agnostic driver (oa_tc6.c).
Moreover, the original code has been augmented with LOG_WRN() messages.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change fixes semaphores' definition. To be more specific - the
limit was wrongly set to UINT_MAX. With those changes - the 'tx_rx_sem'
now assures that only one execution path (i.e. receiving or sending
data) is executed at a time.
Moreover, the change in 'int_sem' now assures that this semaphore limit,
when reached, is saturated.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit ensures that whole receive function (called from interrupt
handler) is protected by the RX/TX semaphore.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The oa_tc6_update_buf_info() function returns error code when read
(protected or not) of OA_BUFSTS has been detected.
In that situation - one shall re-start the interrupt thread handling
(and hence correctly re-read value of this register) than use old
(stalled) RCA(RBA) data to read chunks (which may result in lockup).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Current code sends extra, last chunk, when packet's size is a multiple
of chunk size (i.e. 64 bytes).
This patch fixes this issue by checking this corner case - i.e. if
the modulo division equals to zero.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The RCA and RBA fields in OA_BUFSTS register are stored with 8 bits each.
On the other hand, when one receives those values in footer, the value
is saturated to 5 bits due to 32 bit size constrain of the footer itself.
To avoid any mismatches - the values read from OA_BUFSTS are saturated
as well.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Zephyr's network stack has issues with network IP header split across
fragments.
To alleviate this problem, the frame would be now aligned to first byte
of the chunk. This would ensure that the header is stored at one network
buffer fragment (as we explicitly set its size to 64B).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The OA TC6 driver requires some bits manipulations in control registers.
Up till now - it has been implemented as an explicit set of read and write
registers' operations.
One good example would be the oa_tc6_set_protected_ctrl() implementation,
which used such scheme.
This patch brings dedicated function for this operation; oa_tc6_reg_rmw().
The aforementioned oa_tc6_set_protected_ctrl() function now uses it
internally.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add the missing dependency of the node status value
and enable the driver by default when they are met.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Revert "drivers: timer: lptim timer clock on stm32u5 has a prescaler"
This reverts commit c14670abea.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes the routing of the events associated with a secondary
i2c target address being routed to the primary config. The
i2c_target_config/slave_cfg was being selected from the
driver address match but then over written by the primary.
This change fully implements the if/else of 10bit addressing
and includes a assert if the slave_cfg is NULL, and explains
why dual 10bit addresses on STM32 won't work.
Signed-off-by: Tim Woolliscroft <tim@opteran.com>
alarm setting function checks channel callback and it returns -EBUSY
if callback is registered. but alarm cancel function doesn't clear
callback function. this prevents from alarm setting after alarm cancel
Signed-off-by: Minho Jin <kilejin@gmail.com>
This driver assumed the ivshmem-v2 output sections would be mapped
contiguously, which is no longer true.
Modify eth_ivshmem to treat each output section independently
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Recent changes to the arm64 MMU code mean that you can no longer map
R/O memory as R/W. Mapping R/W memory now causes a cache invalidation
instruction (DC IVAC) that requires write permissions or else a fault
is generated.
Modify ivshmem-v2 to map each R/O and R/W section individually
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Drops calling the UART FIFO read function during the setup
function (when not in async mode) which could cause issues on
some devices since this function is not called in an ISR.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
The parity, stop bits and data bits config was hard-coded instead of
taken from the device tree.
Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
Increase the SPI RX driver stack size by 128 bytes. Overflows have
previously been observed on real hardware at the default stack size of
512.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The `riscv_plic_irq_enable` & `riscv_plic_irq_disable` are very
similar, refactor them out into `plic_irq_enable_set_state`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Add support of r8a779f0 cpg driver.
r8a779f0 soc has its own clock tree.
Gen4 SoCs common registers addresses have been added in header.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Renesas R-Car Gen4 is different from Gen3 regarding pinmux.
While Gen3 had only one base address to manage all pins,
Gen4 has one set of pinmux registers per GPIO banks.
We could expose one pinmux register per GPIO controllers,
but that would break potential compatibility with Linux
Device tree.
Instead create a reg_base array to parse all reg base from
device tree and identify proper base address based on the pin
definition.
This imply to add a pfc_base parameter to most of the pfc_rcar
function.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Renesas Gen4 SoCs GPIO IPs are using one more
register comparing to Gen3 SoCs.
The new "INEN" register is used to enable general input.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
In the case where a transaction is spilt due to the rx buff len
being longer than the tx or the transaction buffer exceeding the
size of the requested buffer with non gpio CS, the chip select
would be de-asserted/asserted in the middle of the transaction.
Fixes: #57577
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
When CONFIG_IEEE802154_RAW_MODE is set there is no network interface
that could provide pointer to the device the interface is running on top
of. The current implementation of nRF5 ieee802154 driver implicitly
assumes that such an interface is always present, which leads to crashes
when raw mode is enabled.
This commit adds support for IEEE802154_RAW_MODE in nRF5 ieee802154
driver by latching pointer to the ieee802154 device on initialization if
needed so that it doesn't have to be retrieved using the network
interface in run-time.
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Since lsm6dsv16x may be multi-instantiated, triggers must be enabled
and configured on DT basis and not only thru CONFIG_LSM6DSV16X_TRIGGER
macro; if either int1-gpios of int2-gpios (or both) are configured
in DT, the flag trig_enable is set to 'true' for that instance.
The previous implentation was lacking the check of those two Device
Tree properties, so trig_enabled was always true for all instances.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Introduced `CONFIG_PLIC_SHELL` to enable the build of shell
debugging command to get the hit count of each interrupt
controller's IRQ line. This is especially useful when working
with dynamically installed ISRs, which will be the case for
`plic_sw`.
Example usage:
```
uart:~$ plic stats get interrupt-controller@c000000
IRQ Hits
==================
10 177
uart:~$ plic stats get interrupt-controller@c000000
IRQ Hits
==================
10 236
uart:~$ plic stats clear interrupt-controller@c000000
Cleared stats of interrupt-controller@c000000.
uart:~$ plic stats get interrupt-controller@c000000
IRQ Hits
==================
10 90
```
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Maxim Adelman <imax@meta.com>
if-conditionals should have brackets according to Zephyr's
coding standard, and explicitly compares `edge_irq` against 0.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The WS2812 LED strip driver does not use a scratch byte, therefore
free up a byte per pixel which was unused except in the GPIO-based
driver whereby it is used
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Enable a condition as define dma_callback function only if
any one instance of ns16550 has dmas parameter in dts.
This resolves conflict of dma_callback function defined but
not used warning in case of UART_ASYNC_API enabled but dmas
parameter is not provided to any ns16550 UARTs dts instances.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Removed if (IS_ENABLED()) and used #if as they are causing CI failures
and removed LPSS related functions which are not under LPSS config.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Reference counting was broken when adding the enable delay.
Now reverted to previous pattern.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
This commit adds support for more STM32 CPUs that has
a different DMA interface. This was tested only for
the nucleo_l476rg.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously the STM32 DMA driver was dependent on a very specific
name for the DMA in the DTS. This hidden requirement has caused
a bit of confusion. This commit changes the driver to instead
always use the first DMA listed in the ADC node's dma property.
Should fix: #65387
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
These are not needed and are now causing build errors since the
pm_device calls are always there and need the header to become a no-op.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The pm_policy_state_lock_put and pm_policy_state_lock_put functions
already become a no-op if CONFIG_PM is not enabled. Drop the guards
around it in few different drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Due to a typo it is not possible to select the main oscillator (MOSC) as a
clock source for an RA Microcontroller. This patch resolves the issue.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
This add regulator driver for Smartbond DA1469X SOC.
Driver can control VDD, V14, V18, V18P, V30 rails,
full voltage range supported by SOC is covered.
For VDD, V14, V18, V18P DCDC can be configured.
Special VDD_CLAMP (always on) and VDD_SLEPP are added
to allow configuration of VDD in sleep modes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This is called already as soon as the polling thread starts, so the call
in the gpio init function is harmless but redundant, drop it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
When the matrix is connected to consecutive pins on the same port, it's
possible to read the whole row or set the whole column in a single
operation. For the column, this is only possible if the matrix is
configured for driving unselected column, as there's no API to configure
multiple pins at the same time at the moment.
This is more efficient than checking the pins individually, and it's
particularly useful if the row or columns are driven from a GPIO port
expander.
Add some code to detect the condition and enable it automatically as
long as the hw configuration supports it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add an option to drive inactive columns to inactive state rather than
high impedance. This is useful if the matrix has isolation diodes for
every key, as it allows the matrix to stabilize faster and the API for
changing the pin value is more efficient than the one to change the pin
configuration.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Allow enabling the Cortex-m idle timer only if power management is set.
It doesn't make sense to use an idle timer without PM.
It allows adding the idle timer chosen node to dts without enabling the
idle timer by default. Now, the PM config has to be set as well.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Fixes and issue with a variable that has been renamed but whose
reference in the source file has not
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add a Kconfig option to extend the row type to 16 bits, allowing the
library to handle a 16 row matrix.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a typedef for the row type rather than using uint8_t directly, this
allow supporting bigger matrix as an option by using a different type.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Regression failure introduced problem where driver code was not properly
wrapping code that only existed when compiled for IPv4/v6 applications.
Fixes#65549
Signed-off-by: David Leach <david.leach@nxp.com>
On some devices such as STM32U5, there is no UART WKUP dedicated registers
as the hardware block has an integrated autonomous wakeup capability.
Hence it's capable to wake up the device from stop modes (down to Stop 1).
This behavior relies on RCC UESM bit which is enabled by default at reset
and not modified today in drivers.
Since driver will not compile otherwise, remain in this simple
configuration. This might be changed later on, if a need is seen to disable
UESM bit.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit fixes the following compiler warnings:
* implicit declaration of function 'strtoul'; did you mean 'strtok'?
* passing argument 2 of 'parse_named_int' discards 'const' qualifier
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Workaround for DMAT errata was applied on all SoCs declaring STM32U5
DMA compatible.
This errata has been fixed in later SoCs revisions and should not be
applied anymore as this can cause compatibility issues with power mgmt
(can not enter STOP1 in some cases).
Declare a specific Kconfig symbol to restrict the workaround only to the
set of SoCs impacted by the issue and requiring workaround.
Note that I preferred using Kconfig over device tree since it doesn't feel
right to declare a compatible on a silicon bug base.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This is an older driver and didn't support the weak
arch_printk_char_out() hook, which is a link-time symbol that allows
logging to work from the first instruction. Some drivers can't do
that because they need an initialization step, but this one works
great.
Signed-off-by: Andy Ross <andyross@google.com>
Serial wakeup feature was only working whe DBG in Stop mode setting
was enabled.
Add required changes to make it functional also when this configuration
isn't set.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
With the introduction of nrfx 3.0.0, values of `nrf_gpio_pin_drive_t`
constants may be defined differently, depending on the SoC family.
Since the nrf-pinctrl.h file is included also from dts files, it is
not possible to use there different definitions of `NRF_GPIO_PIN_*`
values based on Kconfig symbols that indicate given SoC family (as
Kconfig is processed after devicetree) so that those values could
still match `nrf_gpio_pin_drive_t` constants.
To solve this problem, the pinctrl_nrf driver now uses a lookup table
for mapping `NRF_GPIO_PIN_*` indexes to drive configuration values
required by the GPIO HAL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
So far the driver first changed the configuration of the flash chip
and after that checked the signature of that chip. This could lead
to improper change of the chip configuration if the actually found
one was different than that specified in devicetree.
This commit reverses the order of these two initialization steps and
also restructures a bit the initialization code.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
After integration of nrfx 3.2.0, it is no longer needed to deinitialize
the nrfx_qspi driver to avoid increased power consumption when the QSPI
peripheral is idle. Now it is enough to call `nrfx_qspi_dectivate()`
when a given operation is done. The driver will automatically activate
the QSPI peripheral again when a next operation is requested.
This commit applies the following changes:
- `qspi_device_init` and `qspi_device_uninit` functions are replaced
by `qspi_acquire` and `qspi_release`, respectively; those handle
exclusive access to the QSPI peripheral and deactivation of it or
runtime device power management
- locking is removed from `qspi_send_cmd` as it is the resposibility
of the caller of that function
- `trans_lock` and `trans_unlock` functions are removed together with
the related semaphore as they are no longer needed
- checking of input parameters is moved from `qspi_erase` to its
caller, `qspi_nor_erase`
- `qspi_nor_pm_action` is refactored to properly handle locking of
the QSPI peripheral; checking of the `xip_enabled` flag is removed
from that function as now the call to `pm_device_is_busy()` covers
that (when XIP is enabled, the device is kept indicated as busy)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Consistently use `res` for results of calls to nrfx functions
and `rc` for Zephyr return codes, to avoid mixing up those two
and for example calling `qspi_get_zephyr_ret_code()` for a value
that is already a Zephyr return code. Correct also such call in
`qspi_nor_write()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
After entering the Deep Power-down mode, some flash chips ignore all
commands except from the one that releases the chip from the DP mode
and it is not possible to successfully read their Status Register then.
Since the QSPI peripheral tries to read this register when it is being
activated, it consequently fails to send the actual command that would
release the flash chip from the DP mode if that is to be done right
after QSPI initialization.
Prevent this problem by performing the QSPI activation with all pins
disconnected. This causes that the Status Register value is read as
all zeros and allows the activation to always finish successfully,
and the RDPD command to be properly sent.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Those configuration settings should never be part of driver Kconfig file.
Drop them, since they can easily result in Kconfig symbol circular
dependency error.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The macro SRAM_BANK_PAGE_NUM is specfic to the mtl_tlb
driver and is not universal. So move that from public
header into the driver.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
On STM32WL, the backup memory is defined as part of the TAMP peripheral.
This seems to be a deviation from the stm32 family where this memory is
defined as part of the RTC.
The STM32WL reference manual shows that tamp_pclk is connected to
rtc_pclk. This means that the clock required to run the TAMP peripheral
is the same as the RTC's. A quick port of BBRAM on STM32WL is achieved
by instanciating the bbram device as a child of the RTC and by modifying
the address offset to the first backup register from the rtc base
address.
Signed-off-by: Adrien Bruant <adrien.bruant@aalberts-hfc.com>
When enabling async RX the first time after boot, there is an
additional byte received with the first RX_DATA_RDY event,
which seems to be caused by the RX data not being flushed before
enabling the UART RX DMA.
Adding a request to flush the RX data register before enabling
the RX DMA, solves the issue.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Rework Kconfig to improve handling of multiple UART instances by
using Kconfig template file.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The mcp251xfd supports upto 32 filters. Also store the filter usage in
uint32_t instead of uint64_t.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Fix handling of strncpy in cgnsinf parsing function to avoid
potentially getting a non-null terminated string.
Fixes#58573 / CID: 248403
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Do not enable subsystem/driver shell modules by default and stop abusing
CONFIG_SHELL_MINIMAL, which is internal to the shell subsystem, to decide
when to enable a driver shell.
The list of shell modules has grown considerably through the
years. Enabling CONFIG_SHELL for doing e.g. an interactive debug session
leads to a large number of shell modules also being enabled unless
explicitly disabled, which again leads to non-negligible increases in
RAM/ROM usage.
This commit attempts to establish a policy of subsystem/driver shell
modules being disabled by default, requiring the user/application to
explicitly enable only those needed.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Previously, the PLIC's registers were accessed through uint32_t *,
so all calculated offsets were effectively multiplied by
sizeof(uint32_t). Do the same manuallly now that we have
mem_addr_t/sys_read32.
Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
`get_claim_complete_offset` and `get_threshold_priority_offset` actually
return addresses directly. Rename them to `_addr` for consistency within
the driver. Also change their return type to `mem_addr_t`.
Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
This commit introduces the SOF host DMA driver.
This driver is used by NXP platforms in the context of
SOF's host component to copy data from the host memory
to the firmware (local) memory. This is possible because
NXP platforms can access the host memory directly w/o
an actual DMA engine.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This moves the k_* memory management functions from sys/ into
kernel/ includes, as there are kernel public APIs. The z_*
functions are further separated into the kernel internal
header directory.
Also made a quick change to doxygen to group sys_mem_* into
the OS Memory Management group so they will appear in doc.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
At present, if you want to set a periodic timer again with
set_top_value, the last triggered event is not cleared. This could
result in an old event being served at the next interrupt activation.
The solution proposed in this patch adds the nrf_timer_event_clear
function into set_top_value to prevent this from happening in the
above case.
Signed-off-by: Flavia Caforio <flavia.caforio@amarulasolutions.com>
Adds a clock control device for a PWM node, allowing the PWM
to be controlled using the clock control API.
It is a similar idea to the device driver in linux:
linux/Documentation/devicetree/bindings/clock/pwm-clock.yaml
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The timer driver doesn't annouce/set the timeout at the tick boundary
but at the absolute next expiration time.
It will cause the accumatlation of the tick drift and cannot pass the
kernel/timer/timer_behavior test suite.
This commit fixes the tick drift problem by annouce the time at the tick
bouandry.
Fixes#59594
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Interrupt-driven mode was not working, and disabled by default.
When it was forced on, the behavior was to only have a few bytes:
as many as min(CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE, 9).
After the hardware FIFO was filled by software and emptied by hardware,
no interrupt occured, and enqueuing more data did never happen.
By letting the events enabled for TX (only), then interrupts are still
generated after the first transfer, and the software can then add the
subsequent transfers until all data is print: the UART works.
It does not generate endless interrupts either, which was tested by
adding litex_write8('%', UART_RXTX_ADDR) in liteuart_uart_irq_handler()
to log all interrupts events, and when there is nothing to print, no
interrupt is fired.
It was tested with the Zephyr shell.
Fixes#63794
Signed-off-by: Josuah Demangeon <me@josuah.net>
Use gpio toggle api instead of manually toggling.
Remove redundant text.
Print error and break from blinking if it occurs.
Only print 'how to exit' text if first toggle is successful.
Saves roughly 40 bytes.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Usage:
gpio info [device]
The new command prints gpio controller information
for a specific device if specified or if no device is specified
it prints out all controller information ordered by line name.
Also added Kconfig option so this command can be removed if
resources need to be conserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
This commit implements this enhancement:
https://github.com/zephyrproject-rtos/zephyr/issues/63018
The forms of the gpio commands are now:
gpio conf device pin ol0
gpio set device pin 1
gpio get device pin
gpio blink device pin
Device name and pin subcommands now are
suggested/completed when tab is used.
Pin names are suggested with numbers and line names if
available from the gpio controller’s Devicetree node.
GPIO pin command is now limited to pins that are not assigned
as reserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
nRF5340 SoC has `TASK_STOP` this patch implements disabling
watchdog for that SoC and enables allowing WDT to STOP in WDT setup.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The field config of `nrfx_wdt_config_t` type is redundant in device
config structure. Instead of that local variable is used in the setup
function.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Move a couple of automatic variable assignment off the declaration
block, leaves only structure aliases there, makes it a bit easier to
read.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Move the scan_cycles_idx increment in input_kbd_matrix_update_state
as it's only used there, use a modulo operation rather than the if to
handle the index wrapping condition.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Replace the wait_period_us clamping functions using a single CLAMP,
reposition the debug log as well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
For some STM32 MCUs the busy flag of SPI is unreliable. This is a known
issue of the device and described in the device errata.
As a fix implement a configurable timeout which ensures that a call
to spi_transceive will eventually return.
Fixes#64927
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Remove syscalls that allows user threads to set callbacks that
will be invoked by the kernel.
Userspace is not trusted we can't allow a user thread set callbacks
that will be invoked by the kernel and run with supervisor privileges.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This reverts commit 415b6fc945.
This does not even compile as it attempts to do assignment to a read-only
object (config->config.behaviour).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Split the common keyboard scanning code out of the ITE specific driver
and use the generic code instead.
Note that this changes few timing defaults, the change is not
significant though so I suspect there's no difference in practice.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The SoC header already includes the necessary device headers for
all SoC variants supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Drop the input_ prefix fromthe internal functions. Trying to unify the
input drivers to use the same style for function naming, this makes it a
bit more compact and makes it easier to distinguish the common keyboard
structures and functions from the driver ones.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Set Spi StateIndex equal to index of DT Spi node.
Because number of State array is set base on
number of DT Spi node used. If StateIndex is set
equal to Spi instance, StateIndex can be over array.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
nRF5340 SoC has `TASK_STOP` this patch implements disabling
watchdog for that SoC.
Changed body of `wdt_nrf_setup()` to utilize `nrfx_wdt_reconfigure()`
driver API.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Fixes an unhandled interrupt runtime crash if CONFIG_SPI_XMC4XXX_DMA=y and
CONFIG_SPI_XMC4XXX_INTERRUPT=n.
The unhandled interrupt error is triggered because irq_enable() was called
without calling IRQ_CONNECT() when CONFIG_SPI_XMC4XXX_INTERRUPT=n.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In the interrupt driven spi, spi_context_update_tx() is called once
from the calling thread and then once in spi_xmc4xxx_isr() after each
new byte is received. This actually means that there is one extra call to
spi_context_update_tx(). This is fine if spi_context_update_tx() complete
it's call in the calling thread before the interrupt fires, however, this
cannot be guaranteed especially if the calling thread is pre-emptive and
has a low priority.
Fix this by calling spi_context_update_tx() in the calling thread before
transmitting the first byte.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Get GPR base address using nodelabel as this will align for all the
current in tree platforms. Currently inst 0 of the compat gets wrong
node and base address on RT11xx.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
GPR17 calculation for configuration of RAM banks is incorrect,
bit shift should be 2 per idx, not 1, this is major bug that needs
correcting, currently all RT boards are affected with wrong
configuration.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Currently, the NXP S32 SoCs have three redundant Kconfig hidden
options to define the part number. To streamline this, we will
retain `CONFIG_SOC_PART_NUMBER` to store the part number as a
string and `CONFIG_SOC_PART_NUMBER_<part>` that can be selected
by the boards.
Furthermore, for drivers requiring conditional code compilation
based on the target SoC, they should utilize the series or SoC
config option as applicable, instead of the part number config.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The existing S32K3 Kconfig options employ the `M7` suffix, which is
redundant given that all cores in this series utilize an Arm Cortex-M7
core. Therefore, we should remove it.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
A proper netmask should be set on the loopback interface, so that
source address selection work properly when there are multiple
interfaces in the system.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add Renesas rzt2m gpio driver with basic functionality.
It supports pin mode configuration and writing/reading to/from gpio ports.
Includes dts changes to build blinky sample.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
This adds a new driver for Renesas RZ/T2M.
The driver allows configuration of pin direction,
pull up/down resistors, drive strength and slew rate,
and selection of function for a pin.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This adds a UART driver for the Renesas RZ/T2M
Serial Communication Interface.
The driver implements:
* Polling API,
* Interrupt-driven API.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Move the input_kbd_matrix.h header out of drivers/ and into include/,
this allows external drivers to use it and doxygen to pick it up.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a input_kbd_matrix doxygen group and add this to the other Input
APIs page, add few missing argument documentation entries.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The API field of input_kbd_matrix_common_config should have been a
pointer from the start, clang-16 caught this with a compiler warning.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the row-count and col-count to be optional in the generic
binding, add a second pair of macro to allow the implementation to
specify the numbers from a different property.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define max SYSCLK and AHB clock frequencies as 280 MHz, max APB
frequency as 140 MHz, and enable semaphore clock.
Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
Internal flag (w1500_data.connecting) was not being set to false after
connection. Interface raises NET_EVENT_WIFI_CONNECT_RESULT event with
error status instead of NET_EVENT_WIFI_DISCONNECT_RESULT when
disconnection is manually requested (NET_REQUEST_WIFI_DISCONNECT).
Signed-off-by: Diogo Correia <diogo.correia@fraunhofer.pt>
Remove the direct use of the HAL API to configure clocks and use
Zephyr's clock control API instead.
Currently the PORT peripherals of the Kinetis family are either
clocked by PCC in the case of KE1xF devices, or by SIM for the
rest of the devices. PCC clock driver converts internally the
subsys clock name into the clock gate address. SIM clock driver
expects this conversion to be done by the caller.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add device level power management to rm67162 display. Device level power
management for this controller calls the MIPI DSI detach API, in order
to power down the MIPI DPHY when the display is not active.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for mipi_dsi_detach API to dsi_mcux_2l driver, and
update RT5xx SOC interface to enable halting clocks for the MIPI DPHY.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add module which can handle RX path of UART asynchronous RX API. Module
can be utilized in cases where processing of received data is not performed
directly in the event context but it is delayed. At least two use cases
has been identified (shell async UART backend, asynchronous to interrupt
driven adaptation layer).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The LPC DMA IP offers hardware triggering via a series of SOC-specific
signals, often including sources like GPIO pins or hardware timers.
Support hardware triggers via the "dma_slot" field of the DMA
configuration structure. Currently support is offered for setting the
following:
- Trigger polarity
- Trigger level/edge mode
- burst mode
- burst length
- peripheral request
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
A configurable delay during regulator switch on is currently
only supported by the GPIO and fixed regulator drivers.
This functionality has been moved to the common driver, so it can
be easily added to any regulator driver.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The wait times in the self test procedure, according to the datasheet
are 4 / ODR (current set value).
Update the self test procedure by using the delay corresponding to the
current ODR value that is set, instead of default ODR.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
This reverts commit d963900dbd.
Since i.MX 93 is supported by mcux_ccm_rev2, remove i.MX 93 support
from mcux_ccm driver.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
i.MX93 share similiar register layout with i.MX RT11xx. Change ccm driver
to align with i.MX RT11xx, and make it easier to enable other drivers.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The LPS22DF is an ultracompact, piezoresistive, absolute pressure sensor
that functions as a digital output barometer. The LPS22DF provides lower
power consumption, achieving lower pressure noise than its predecessor.
This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/en/datasheet/lps22df.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
It is just used to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Corrected comapare value of dma_is_enabled as it is compare with
wrong macro to check if channel is enabled or not.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Enhance LPSS DMA to support UART and I2C DMA transfer by
enabling init priority of DMA based on dependency on
parent device.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Replace unrelated part name with the actual driver name in the
adxl372.h header file.
Fixes: a3e7cea ("adxl372: Add driver for ADXL372 high-g accelerometer")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
'native_posix_source_files' is used only when CONFIG_NATIVE_APPLICATION=y,
but it was set unconditionally regardless of this Kconfig option.
Set 'native_posix_source_files' under CONFIG_NATIVE_APPLICATION=y to narrow
scope of this variable.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Affected CONFIG_ADC_ADS114S0X_GPIO=y build.
register_addresses was wrong type for
ads114s0x_write_multiple_registers()
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Move all the generic code from the Nuvoton NPCX keyboard scanning driver
into input_kbd_matrix.c. While doing that convert few configs into
devicetree properties and tweak few other things to enable the generic
code to support multiple instances.
This is limited to 8 rows for now, and that's fine for all the current
in-tree drivers, the limit could be removed down the road but this
should be fine for now, added few generic build checks to make sure a
driver does not go over the limit, as well and some more implementation
specific checks.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
For example, if a driver needed to reserve address before it does a
ENTDAA, it would need to get free address in a loop, but the get
free address func would return the same address everytime. It needs
the start address, which would be the last free address it go, to
be passed in to get the next free address.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add pinctrl to the Davinci GPIO driver to allow muxing pins dirctly
in this driver.
Also aligned the macro backslashes as line continuation character at
the end of each line with each at the same position and removed the
GPIO_DAVINCI_DEVICE_INIT macro which seems to be not used.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Sort the Kconfig and CMakeLists include blocks again, and mark the start
and end of the blocks so that the CI can keep them sorted.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
- Add support cc1352p7 used by beagleconnect_freedom
- Since this is a multi interface device, auto config does not work.
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
Having a % FIFO watermark isn't very useful as it doesn't convey how long
the SoC can sleep (or do other work) while batching sensor data. Convert
the attribute to a batch duration using ticks. Currently the ticks are
in system ticks, but eventually when an external clock is attached to
the sensor it will be in the external clock's ticks.
Signed-off-by: Yuval Peress <peress@google.com>
Add streaming implementation for icm42688 using both threshold and
full FIFO triggers.
Signed-off-by: Yuval Peress <peress@google.com>
topic#sensor_stream
Introduce a streaming API that uses the same data path as the async API.
This includes features to the decoder:
* Checking if triggers are present
Adding streaming features built ontop of existing triggers:
* Adding 3 operations to be done on a trigger
* include - include the data with the trigger information
* nop - do nothing
* drop - drop the data (flush)
* Add a new sensor_stream() API to mirror sensor_read() but add an
optional handler to be able to cancel the stream.
Signed-off-by: Yuval Peress <peress@google.com>
topic#sensor_stream
Convert the ITE keyboard scanning driver from kscan to input, add the
corresponding kscan compatibility node to the current board, build test
only.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Use GPIO_OUTPUT_INACTIVE to initialize the pin so that the ACTIVE_LOW DT
flag is honored and use the gpio_pin_set_dt functions to set the
(logical) value of the pin instead of gpio_pin_configure_dt, that
tries to reconfigure the pin each time.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Initialize the MDIO peripheral clock (normally done during GMAC
initialization) before trying any MDIO transfers, preventing startup
errors.
Signed-off-by: Nick Kraus <nick@nckraus.com>
We need to do a build assert for the fifo enable status of 'I2C2'.
There is a problem with using instance to obtain property when
any one I2C port is not enabled.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit enables clock control on the i.MX8QM and QXP boards.
This is achieved through the following changes:
1) The "reg" property is no longer marked as required
for the "nxp,imx-ccm" binding. This is necessary because
in the case of i.MX8QM and i.MX8QXP the clock management
is done through the SCFW, hence there's no need to access
CCM's MMIO space (not that you could anyways).
2) The DTS now contains a scu_mu node. This node refers
to the MU instance used by the DSP to communicate with
the SCFW.
3) The CCM driver needs to support the LPUART clocks
(which will be the only IP that's supported for now)
and needs to perform an initialization so that the
NXP HAL driver knows which MU to use to communicate
with the SCFW.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Use arch-specific sys IO APIs to access the memory-mapped
registers to ensure safe memory operations
fixes#62956
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Added some defines and helper functions to help with the
arithmetics so that the bit shifts and stuff do not look like
magic number.
Converted manual bit shift/set/unset to use macros provided by
Zephyr.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Most of the public APIs in `riscv_plic.h`
(except `riscv_plic_get_irq` & `riscv_plic_get_dev`) expect the
`irq` argument to be in Zephyr-encoded format, instead of the
previously `irq_from_level_2`-stripped version. The first level
IRQ is needed by `intc_plic` to differentiate between the
parent interrupt controllers, so that correct ISR offset can be
obtained using the LUT in `sw_isr_common`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Use a config struct to store per-instance device config during
init and connect the IRQ based on the devicetree instead of
hardcoded value and instance number.
The `get_plic_dev_from_irq` is still a placeholder for now and
always return the first instance.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Many (or almost all) drivers contain the specified prefixes
related to the driver subsys so add the missing one for the
BQ24190.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
This patch set provides support for T1S ethernet device - LAN8651.
For SPI communication the implementation of Open Alliance TC6
specification is used.
The driver implementation focuses mostly on reducing memory footprint,
as the used SoC (STM32G491) for development has only 32 KiB RAM in total.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Those files provide generic functions to handle transmission between chip
conforming OA TC6 standard and Zephyr's network stack represented by
struct net_pkt.
The communication is performed via SPI and is focused on reduced memory
footprint (works with SOC equipped with 32 KiB of RAM) and robustness of
operation.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
NXP USB bindings were combined into one binding and using
a property corresponding to HAL enums which is improper use
of devicetree.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
ep_ctrl and ep_trans_type is not used inside it82xx2_usb_dc_isr, this
triggers a compile warning. Move these variables to a smaller scope.
Signed-off-by: Ting Shen <phoenixshen@google.com>
Add drivers for gpio_i2c_switch which is present in beagleconnect freedom
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
The load switch / LDO pin configuration function now
correctly configures the associated GPIO pin.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
When using console debug server hooks, not all characters are
processed if the server hook returns non-zero for one character
while there are other characters in the buffer. This is seen
when using a fast console (like USB) where multiple characters
come in before the ISR is called. Fix it by continuing to
process characters instead of returning from the ISR with
characters still in the buffer.
Fixes: #64661
Signed-off-by: Mariano Goluboff <mariano.goluboff@nordicsemi.no>
Some NXP S32 shim drivers are using macros defined in
soc/arm/nxp_s32/*/soc.h but not including soc.h. Those still
can be built because the header file is included indirectly
by some other header files. This is very fragile, it should
be included directly
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Remove the depenency on TF-M so that this driver can be used when PSA
is provided by something else than TF-M.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
user dma config is not fully saved in dma_sedi_chan_config
function. When dma_sedi_start function it will check local
context, it will cause failure here.
Signed-off-by: Ning Yang <ning.yang@intel.com>
This CL is to minimize `CONFIG_SOC_SERIES_XXXX` definitions when we
introduce a new chip series. Most of them are relevant to register
layouts in different npcx soc series. It moves soc-specific register
definitions from `reg_def.h` to its own soc.h file.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add basic support for ams TSL2561 light sensor. Triggers, attributes
and manual integration time are currently not supported.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
Both the BQ27421 and BQ27427 have a few preset Chemistry profiles.
For the BQ27421 there exists three variants of the IC, and for the BQ27427,
it can be configured. The chemistry profile among other things includes the
taper voltage, which is used to detect charge termination.
This adds an optional `chemistry-id` config option to the driver. On the
BQ27421, it will confirm that the correct variant of the IC is mounted,
and on the BQ27427, it will configure it with the correct value.
Side note: The reference manual for the BQ27427
(https://www.ti.com/lit/ug/sluucd5/sluucd5.pdf) currently contains some
errors and inconsistencies regarding these registers. The table on page 7
appears to be correct.
Signed-off-by: Tobias Pisani <topisani@hamsterpoison.com>
Implement RTC support in counter driver for STM32WBA devices.
Changes are made according to the following specificities:
- Similarly to STM32U5, it is not connected to EXTI.
- On this series, there is no bit in BCDR register to enable RTC. Enabling
RTC is done directly via the RCC APB register bit
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Enables setting the initialization priority of the nPM1300 independently
from other MFDs.
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Enables setting the initialization priority of the nPM6001 independently
from other MFDs.
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Added initial version of Infineon AIROC WIFI driver
Added initial version of binding file for Infineon AIROC WIFI
driver
Rename CONFIG_ABSTRACTION_RTOS_COMPONENT_ZEPHYR to
CONFIG_USE_INFINEON_ABSTRACTION_RTOS
Exclude cy8cproto_062_4343w platform from
drivers.modem.esp_at.build test
Change revision hal_infineon to
69c883d3bd9fac8a18dd8384624b8c472a68d06f
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 SDHC/SDIO driver
Added initial version of binding file for Infineon CAT1 SDHC/SDIO
driver
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
With CSL enabled, when nrf5_stop is called,
nrf_802154_sleep_if_idle() will be called, and if the radio is
busy with another task, another IEEE802154_EVENT_RX_OFF event
will be pended right away, resulting in another call
to nrf5_stop(), effectively busy waiting until the
radio has reached idle.
In simulation, this whole operation (busy wait loop) is
done without letting the CPU sleep, in an infinite loop,
and therefore without letting any time pass
(note that in the POSIX architecture,
no time passes if the CPU does not go to sleep).
And therefore the radio will never be done with whatever
it is doing, resulting in the simulation being stuck
in this loop.
Let's add a very minor delay to this loop, which is
conditionally compiled only for the POSIX architecture.
Which effectively mimics the time it takes for the CPU
to loop thru, let's time pass, and allows the radio
to eventually be done.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
MDIO is currently initialized in the ETH NXP S32 NETC
driver for Physical Station Interface (PSI), so do not
try to build the MDIO driver if the ETH driver is not built
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
There is no require to prevent building nxp s32 netc
shim driver if NET_TEST is set, so just remove this
unnecessary dependency
Fix#64944
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add a property for I2C channel switch selection. This property will
write to the SMBxxCHS register according to the I2C node you selected,
which can make channel swapping.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Added boot state detection, so that the reference count is
set correctly and enable/disable work as expected.
With this fix it is no longer necessary to set
regulator-boot-on when the regulator is enabled in hardware.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Care must be taken to avoid any flash access while programming the flash
attached to the FlexSPI either via executing XIP code or reading RO data.
Remove locations where a constant device pointer might be dereferenced
within the mcux_flexspi_nor driver, to help avoid RWW hazards.
Fixes#64702
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use MDK directly instead of via USBD HAL to not mix direct register
accesses with USBD HAL. In my opinion this change is not really
necessary but reviewers are strict about consistency.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
There is no point in setting the feeder or consumer at runtime. The time
saved due to not checking conditions on each transaction is smaller than
the additional cost of calling function via pointer.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Do not enable nor disable endpoint done interrupts at runtime because it
is not necessary. Simply keep all relevant interrupts enabled when USBD
is active and disable all interrupts when USBD is disabled.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Ensure strict order within interrupt processing to eliminate workaround
in IN transfer acknowledged handler. EPDATASTATUS and DMA done events
are processed in a way that eliminates the possibility for race condions
between interrupt handler and host IN tokens.
Store last started DMA endpoint and use it in common handler for all DMA
finished events. Unify use of ep dma waiting variable because atomics
only make sense if all accesses are through atomic functions - here the
accesses are guarded with critical section.
Do not disable SETUP interrupt when DMA transfers data on endpoint 0 but
simply postpone handling if currently active DMA is on endpoint 0.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
There is no point in calling an empty function on every single DMA
transfer start. While the empty function is just BX LR the fact that is
is called on every DMA transfer makes its impact visible. This change
improves CDC ACM echo throughput by approximately 2%.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Early DMA process handling actually decreases performance in real world
scenarios because real world scenarios tend to be CPU bound. Moreover
the actual optimization is questionable because DMA semaphore can only
be released after the respective endpoint end event is handled. Remove
early DMA processing altogether and only check pending DMA at the end of
interrupt handler.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rely on semaphore to serialize access to DMA instead of busy looping
after triggering DMA. With this change Ozone Code Profile generated with
J-Trace Pro on nrf52840dk_nrf52840 board running headphones microphone
sample shows following Load changes (trace data was reset once playback
and recording started and percentages were taken when memcpy reached
200 000 Run Count):
* usbd_dmareq_process() from 17.16% to 2.24%
* memcpy() from 9.37% to 8.36%
* nrf_usbd_common_irq_handler() from 8.89% to 10.88%
Mark nrf_usbd_common_stop() as static because the caller must acquire
DMA semaphore before calling this function and the only place where it
is used is already acquiring the semaphore.
Disable EP0 SETUP interrupt when there is active DMA on EP0 to eliminate
the need for aborting DMA on EP0. This code path should not really
happen in real life though because hosts must not issue new SETUP before
a relatively long timeout (at least 50 ms).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename local usbd copy from nrfx_usbd to nrf_usbd_common and use it in
both USB stacks. Renaming header to nrf_usbd_common.h allows breaking
changes in exposed interface. Mark all doxygen comments as internal
because local usbd copy should not be treated as public interface
because we are under refactoring process that aims to arrive at native
driver and therefore drop nrf_usbd_common in the future.
Use Zephyr constructs directly instead of nrfx glue macros.
No functional changes.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
One of the ARM architure files, defined since long ago
CONCAT having the exact same purpose as Zephyr's _CONCAT.
Unfortunately this header is included almost always
and the macro defined in all ARM based platforms,
which seems to have lead to many uses of this macro
instead of _CONCAT.
Fix it by using _CONCAT instead.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If the gpio had pull previous enabled, but new config
request wants the pull disabled, the code was failing
to clear the previous pull setting.
Signed-off-by: Mike J. Chen <mjchen@google.com>
The ISR for CQ mode was unconditionally writing into the I2C message
buffer for all transfer types. The correct data was transferred on the
I2C interface, but the clobber caused CONFIG_I2C_LOG_LEVEL_DBG to
display incorrect data for I2C writes.
This change will also help performance of large I2C write transactions.
Signed-off-by: Keith Short <keithshort@google.com>
Some chips, that use Cortex-M SysTick as the system timer, disable a
clock in a low power mode, that is the input for the SysTick e.g.
STM32Fx family.
It blocks enabling power management for these chips. The wake-up
function doesn't work and the time measurement is lost.
Add an additional IDLE timer that handles these functionality when the
system is about to enter IDLE. It has to wake up the chip and update the
cycle counter by time not measured by the SysTick. The IDLE timer has to
support counter API (setting alarm and reading current value).
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics.
Note that for some peripheral instances is needed to define the
HAL macros of the peripheral base address because there are gaps
in the instances or there are SoCs with a single instance.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Fixes compile warning:
drivers/eeprom/eeprom_emulator.c:645:13:
warning: 'rc' may be used uninitialized [-Wmaybe-uninitialized]
645 | int rc;
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Fix settings for TEAR and DPHYCMD0 to match initialization data
provided by MCUX SDK driver. The following fixes were needed:
- Tear effect signal should only be sent at the VBLANK interval, so TEON
should be set to 0x0
- DPHYCMD0 LP-RX VHYS trimming was incorrectly being set to 37mV, when
it should be set to 66mV (the default value)
These changes resolve some flickering and blooming that occasionally
occurred during initialization
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit names a couple of choices to allow the default
value to be overridden by Kconfig files out of tree
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Since the accelerometer's HM (high-performance mode) bit is forced to 1,
the 1.6Hz frequency is available by setting the ODR to 11.
1.6Hz is a low-power mode that conserves energy and is suitable for
some applications, such as determining the orientation (portrait or
landscape) of a device.
Signed-off-by: Samuel Tardieu <sam@rfc1149.net>
Build errors where introduced by
c76d5b882c and are fixed with this
commit. They are trivial fixes of malformed lines.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Add in DT the possibility to configure both INT1 and INT2
pin. The driver will then assign one of the two (either 1
or 2, according to what value drdy_pin is set) to a gpio
for receiving drdy interrupts.
The other pin may be used in the future to receive event
interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The HCI receive path has a delay between reading the header and payload
from the controller to give the controller time to setup the SPI
peripheral for the next transaction. Add the same delay on the transmit
path for the same reasons.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add log output when the HCI interface is forced to retransmit a packet
because the controller is not ready.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The way that the QSPI peripheral is activated has been changed in
nrfx 3.2.0. Now the peripheral is not activated during the driver
initialization. Instead, the driver activates the peripheral when
the first operation is requested or when `nrfx_qspi_activate()` is
called. In case of XIP, the latter needs to be used, as there may
be no standard operation request.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove CONFIG_IPM_IMX_REV2, as this Kconfig is no longer needed. The
driver can now be enabled with CONFIG_IPM_IMX.
Update NXP HAL to remove this Kconfig as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove nxp,imx-mu-rev2 compatible. This IP block is the same as the
nxp,imx-mu device, and should be handled by the same compatible
Instead, use CONFIG_HAS_MCUX to determine which HAL APIs should be used
to interact with the messaging unit IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The init scripts need a missing wait for OK after sending
AT+CGMM and the AT+CMUX command specifies more parameters
than nessesary, and in some cases incorrectly.
This commit adds the missing wait for OK and fixes the AT+CMUX
commands in the init scripts.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
1. Issue a reset during init to ensure the registers
are in their reset state.
2. The value in counter_set_top_value was not written
to the register. This function now returns -ENOTSUP
3. Make sure the RTC is enabled before we issue RTC_Start
command.
4. Replace calls to SDK API's RTC_StartTimer and
RTC_StopTimer with RTC_EnableTimer
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This chip uses an active low reset, so the correct behavior here is to
define the pin as ACTIVE_LOW, using GPIO_OUTPUT_ACTIVE to assert the
reset and set to 0 to deassert.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This chip uses an active low reset, so the correct behavior here is to
define the pin as ACTIVE_LOW, using GPIO_OUTPUT_ACTIVE to assert the
reset and set to 0 to deassert.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The current code deasserts the reset, just to re-assert it immediately.
Just initialize with OUTPUT_ACTIVE, delay and then de-assert.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix the SFDP command to be sent by the qspi driver
to get the SFDP table from the NOR quad flash.
Note that CONFIG_FLASH_STM32_QSPI=y and CONFIG_SPI_NOR=n
HAL_DMA_Abort declared as weak to fix compilation error with stm32f7x
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Modify SPI configuration to match the features introduced in PR #63437.
Set the property "controller-data-delay-us" to zero for boards
which are using BlueNRG-MS.
Fix Chip Select configuration for stm32l562e_dk board.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Real UARTs usually write 1 to a few bytes at a time through a
latch buffer. Add latch buffer property to binding for
uart_emul and limit fifo_read and fifo_fill to not exceed the
latch buffer.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Define local thread to emulate different thread priorities.
A UART driver may call back from within a thread with higher
or lower priority than the thread calling the UART API. This
can hide potential concurrency issues, especially if the
thread priorities are the same, or even using the same thread
in case the system work queue.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Maxim MAX20335 is a PMIC with Ultra-Low IQ Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
The pca9685 driver assumes the chip will be in "restart" mode
after putting it to sleep. This is not necessarily the case, which
can cause setting the prescaler to fail.
This fix allows the precaler to always be set and only restart the pwm's
when the chip was actually in restart mode after being put to sleep.
Signed-off-by: Jaap Versteegh <j.r.versteegh@gmail.com>
Added chat script and initial config to support Telit ME910G1.
Needed to edit power_pulse pin timing in accordance to datasheet.
Signed-off-by: Jeff Welder <Jeff.Welder@ellenbytech.com>
This is a partial revert of one-line from commit 06cfbd4159 ("drivers:
power_domain: Introduce a gpio monitor driver") which not just
introduced a new driver (no problem with that) but also changed the
initialization priority of another, unrelated and existing power domain
driver without even trying to compile it:
https://github.com/zephyrproject-rtos/zephyr/pull/61166#issuecomment-1780959157
```
west config manifest.project-filter -- +sof
west update
west build -b intel_adsp_ace20_lnl modules/audio/sof/app/
ERROR: /soc/ssp@28100 POST_KERNEL 43 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@29100 POST_KERNEL 44 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2a100 POST_KERNEL 45 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2b100 POST_KERNEL 46 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2c100 POST_KERNEL 47 < /soc/dfpmccu@71b00/io0_domain 51
ERROR: /soc/ssp@2d100 POST_KERNEL 48 < /soc/dfpmccu@71b00/io0_domain 51
```
Also note a reviewer (@ceolin) expressed concerns about this unrelated
change but it was ignored:
https://github.com/zephyrproject-rtos/zephyr/pull/61166#discussion_r1357908984
Using `CONFIG_KERNEL_INIT_PRIORITY_DEFAULT` here may be "bad" for some
reason(s) and maybe it should be changed in the future, but it's nothing
compared to breaking _compilation_ of code that has been validated for
months and been released in production
(https://github.com/thesofproject/sof-bin/releases/tag/v2023.09)
So the very urgent thing is to very quickly revert to the previous state
to unblock development. Then we can discuss what is the better thing to
do here.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
The existing driver and sample:
- drivers/bluetooth/hci/rpmsg
- samples/bluetooth/hci_rpmsg
are no longer correctly named, since they now use the IPC subsystem to
send and receive data. The IPC subsystem can use RPMsg as a transport,
but that is one of several selectable backends.
I initially wanted to deprecated both the BT_RPMSG Kconfig option as
well as the zephyr,bt-hci-rpmsg-ipc chosen node in Devicetree. However,
this proved to be undoable in the case of the Kconfig option. This is
because it's a choice option, and those have special behavior. In
particular, the only practical way to deprecate would've been to keep
the old Kconfig option outside the choice (much like it's done in this
commit) but then also add a 'depends on !BT_RPMSG' on each of the
remaining choice symbols *except* on the new BT_HCI_IPC one. This, however,
only works correctly for .conf files. If a board instead sets the
default BT_HCI_BUS_TYPE in the Kconfig.defconfig file then the Kconfig
tree parsing would fail, because it'd try to set it to a value
(BT_RPMSG) that is no longer part of the choice.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Implementation of PM in the driver requires PM to be enabled. This was
enabled in the SoC until now and was recently removed.
Fixes#64608
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Unify spelling of CAN Flexible Data-rate abbreviation to "CAN FD" instead
of "CAN-FD". The former aligns with the CAN in Automation (CiA)
recommendation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For serialized nRF IEEE 802.15.4 Driver host, avoid using
`nrf_802154_csl_writer_anchor_time_set` too often by caching the CSL
RX time and period and using them to detect any shift on the periodic
pattern.
This improves power consumption by limiting the number of serialized calls.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Add a new `clist` regulator shell subcommand that prints
the list of supported current limits for specified regulator device.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Power rails of some peripherals are controlled externally.
This is a case in embedded controllers, where the power of
some I2C devices are managed by the main application
processor.
To ensure that zephyr drivers access the devices where is
powered on, introduce a "monitoring" power domain. It works
by registering interrupt handler with gpio a pin, so that
when power state changes, it will notify relevant drivers.
Additionaly add CONFIG_POWER_DOMAIN_INIT_PRIORITY to replace
harcoded init priority.
Fixes: #51349
Signed-off-by: Albert Jakieła <jakiela@google.com>
Adding initial support for Renesas RA UART.
To avoid complicating initial code for supporting the SoC,
I have implemented only the bare minimum for now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add initial support for Renesas RA GPIO.
To avoid complicating the initial code for supporting the SoC,
I have implemented only the bare minimum for now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
To avoid complicating the initial code for supporting the SoC,
I have implemented only the bare minimum for now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
To avoid complicating the initial code for supporting the SoC,
I have implemented only the bare minimum for now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add initial support for Renesas RA clock generation circuit.
It returns a fixed value to simplify the first commit to get the UART
working now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
In the CONFIG_SPI_NOR_SFDP_MINIMAL configuration this value is hard
coded to 256 bytes. Make it configurable via devicetree.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
We currently have three keyboard scanning drivers in the code base
(npcx, it8xxx2 and mchp_xec, last two yet to be converted to input).
These have been largely copy pasted from each other and share a lot of
the same structure and code.
This PR lays a foundation to start decoupling feature from those drivers
into a common code base, and it is heavily inspired by the current
regulator common data/config one.
Feature wise this only moves the thread struct, stack and initialization
to the common code and declares the thread callback as the only API, but
the intent is to move as much code as possible in there an only abstract
device specific callbacks in the api structures.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add the get_config API to the stm32 I2C driver.
It will return the value of the Clock Control register for i2C V1 bus
or the TIMING register for the I2C V2 bus.
This is hold by a i2c_config_timing structure of the device data
Add a bool to check if the I2C is configured or not.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The multi-level encoding of the interrupt number currently
happens in the `gen_defines.py`, which is called in the
`dts.cmake` module after `kconfig.cmake`. However, the number
of bits used by each level is defined in Kconfig and this means
that `gen_defines.py` will not be able to get that information
during build.
To fix this, do the multi-level encoding in C devicetree macro
magic instead of the python script. This ticks one of a
long-standing TODO item from the `gen_defines.py`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Relocate multi-level interrupts APIs out of `irq.h` into
a new file named `irq_multilevel.h` to provide cleaner
separation between typical irq & multilevel ones.
Added preprocessor versions of `irq_to_level_x` as `IRQ_TO_Lx`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit adds a GNSS driver for the Quectel LCX6G
series of GNSS modems (LC26G, LC76G, LC86G). It is
based on the modem subsystem, and the GNSS utilities
added in the two previous commits.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds generic matches and handlers for the RMC,
GGA and GSV messages to be implemented as part of all
NMEA0183 based GNSS modems.
NMEA0183 based GNSS modems must place the
struct gnss_nmea0183_match_data struct as the first struct
in their data struct. Their data struct shall then be set
as the user_data for the modem_chat instance.
Lastly, the gnss_nmea0183_match callbacks must be included
in the unsolicited matches for the modem_chat instance.
The GNSS modems will initialize the NMEA0183 match instance
using gnss_nmea0183_match_init.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds utilites to parse the RMC and GGA
NMEA0183 messages, which contain all data which shall be
published using the struct gnss_data.
It also adds a test suite for the added utilities.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds parsing utilites for common string
representations of values contained in GNSS messages.
These utilites both parse and validate the integrity of
the data.
Unit tests are also added to validate the parsing
utilities.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds dumping of GNSS data and satellites to
the log if CONFIG_GNSS_DUMP_TO_LOG is selected
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds a library which dumps the contents of the
gnss structures gnss_info, navigation_data, gnss_time and
gnss_satellite as a string.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds the public header for the GNSS API, along
with the initial GNSS Kconfig file and an entry in the
common linker file for registered GNSS data callbacks.
A very naive implementation of the GNSS data callback is
provided as well in drivers/gnss/gnss_publish.c
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Fix the data acquisition thread function signatures to avoid a stack
corruption on thread exit.
Fixes#62637
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
changes enable flash driver to provide api interface to send reset memory
spi command to the spi flash. The reset memory command would bring the
spi flash to its default power-on state and loose all the volatile register
settings.
Flash reset is needed when more than one controller access the flash chip
in a shared mode.
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
This reverts commit 97bb67d66c.
The revised FIFO draining seems to cause failures due
to channel shift with Intel MTL platform.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Let the caller decide what should be done in case of the transfer failure.
It will reduce the number of error log prints when the i2c scan is
called for the bus where nothing is connected.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
The default is that the high time for open-drain clk is one
PPBAUD, which is typically very short. Some device require
a longer high time during the open-drain address phase so
add a property to allow device tree to override the default.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Remove the MCTRLDONE wait in mcux_i3c_request_auto_ibi().
I've seen this code getting stuck where the MCTRLDONE
bit is never set in the MSTATUS register by the controller
and this function spins forever. Documentaiton of the
MCTRLDONE bit only mentions it being set for EmitStartAddr
and ProcessDAA, but not for AutoIBI requests.
All the calls to this function do completion checks
afterwards, and with a timeout, so I believe the MCTRLDONE
check is not needed (and may not even be correct).
Signed-off-by: Mike J. Chen <mjchen@google.com>
At high i3c rates, the mcux_i3c_do_one_xfer_read()
could get into an infinite loop where the rx_count
kept returning 0 but the complete status bit
was never set. I believe the problem was that
the function was not emptying the FIFO fast enough,
so tighten the loop that processes the FIFO.
Signed-off-by: Mike J. Chen <mjchen@google.com>
mcux_i3c_configure() was saving values to a ctrl_config_hal
struct, but config_get() was not returning the values in
that struct. Remove that struct from the static data of
the driver and instead just have it on the stack. We init
that struct as needed just before calling the SDK API
I3C_MasterInit(). There's no reason to keep it around.
Change mcux_i3c_configure() to save a copy of the configuration
in the static data common.ctrl_config, which is what is
returned by config_get().
Signed-off-by: Mike J. Chen <mjchen@google.com>
Fix the problem not apply pinctrl eventhough the config is defined.
In practice, the setting is equals to soc default.
So, there is no apparent change in behavior.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change the CAN controller driver implementations for the
can_remove_rx_filter() API call to be consistent in their validation of the
supplied filter_id.
Fixes: #64398
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds support for using the fixed and GPIO regulator drivers when
multithreading is disabled, such as in MCUboot.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
for nucleo_stm32g0b1 board.
the HSI48 clock is the clock used by default for the USB controller,
however its default tolerance is not enough for the USB specification,
leading to some random errors depending on many factors, including the
upstream HUB or host.
this commit adds an option in the device tree to enable the STM32 Clock
recovery system (CRS) using USB SOF packet reception as a reference,
which brings the HSI48 within the required accuracy for USB transfers.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
To avoid glitches when configuring GPIO output, make logic closer to
that of V2 after 79ee5a876f.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Modified files (yaml, dts, overlay, and c) which were using spi-cpol
and spi-cpha to be compatible with the new structure.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Corrects set_config to allow MAC config
at runtime.
* Add missing device lock
* Use correct mac argument
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
In driver runtime configuration function, calling
calling pm_device_runtime_get/put() will have the effect of performing
pinctrl change from sleep to default and back from default to sleep
which is useless and in turn enables and disables GPIO clocks two times.
Stop this crazyness and purely enable/disable clock, which might be
superfluous in some cases but which remains much more reasonable than
than the previous implementation.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
pm_device_runtime_enable() will call i2c_stm32_suspend() if
pm_device_init_suspended() isn't called.
Since the aim is to perform suspension, just need to call
pm_device_runtime_enable().
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
During i2c_configure API execution, there is no way core
can go in low power mode. Hence, call to pm_device_busy_set/get API
is useless.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
The initialisation of the device data struct was giving a build error
when using the adi,adin1110 devicetree compatible.
Fixed to allow both adi,adin2111 and adi,adin1110 devices to
be defined.
Signed-off-by: Jason Murphy <jason.murphy@analog.com>
Add driver support for adxl367 accelerometer.
The ADXL367 is an ultralow power, 3-axis microelectromechanical
systems (MEMS) accelerometer that consumes only 0.89 μA at
a 100 Hz output data rate and 180 nA when in motion-triggered
wake-up mode. Unlike accelerometers that use power duty cycling
to achieve low power consumption, the ADXL367 does not alias
input signals by undersampling, but samples the full bandwidth of
the sensor at all data rates.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Allows device tree to enable usage of the controller feature
where HS clock is disabled when not in use, which is good
for reducing power consumption if MIPI DSI is mostly idle.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version of dsi_mcux_2l hardcoded some MIPI DSI
transfers to use high speed mode but others used low power mode.
Now dsi_mcux_2l will use high speed mode by default for all
transfers unless a new msg flag is set to indicate the
transfer must use low power mode. Note that the new flag
is different than the existing MIPI_DSI_MODE_LPM flag, which
so far only applied to cmd messages sent in video mode,
or could be interpreted as for all messages, but would not
allow per message mode control.
This new message flag allows client to control transfer
mode per message transfer.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Previous version hardcoded the SMARTDMA slot to either
RGB565 or RGB565_SWAP, but that would be incorrect
if the pixfmt was RGB888. Use the mipi device
pixfmt to set the slot.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Underlying nrfx driver was modified so now it forwards the event
to the user callback only if it was enabled.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
The BCM2711 SoC exposes 58 GPIOs. The first 28 (bank 0) are accessible
to users via the 40-pin header, while the others (bank 1) are used for
controlling on-board peripherals.
This also update doc of `rpi_4b` board.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Add support for CAN statistics to the SJA1000 CAN controller driver. The
hardware does not support distinguishing between being unable to transmit
dominant versus being unable to transmit recessive bits.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Don't re-use the `rxmsg` buffer in the `bt_spi_send` function. This
buffer is still used by the RX thread after releasing the SPI semaphore.
The current re-use can result in buffer corruption if the RX thread is
swapped out as a result of the `k_sem_give`.
Moving the semaphore release later can result in deadlocks due to
buffer allocation being performed while holding the semaphore, so
instead just eliminate the re-use entirely.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Extract the HCI message handling out to a dedicated function to simplify
the main thread function. This also solves a bug as a side effect.
Previously `discardable` and `timeout` were never being reset after
an advertising report was received, resulting in ALL events after the
first advertising report being treated as discardable.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Disable power management for this particular test case as it expects a
particular pattern of pm get/puts that isn't matched by the driver and
usage in SoF.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The counter_native_posix driver currently does not support top value
configuration, i.e. `ctr_set_top_value` returns `-ENOTSUP`. This commit
adds support for top value configuration, and with the counter API now
fully implemented, adds `counter` to `supported` peripherals for
native_posix target.
It also resolves an existing bug in which the
counter ISR did not reset upon reaching `TOP_VALUE`.
And adds support for multiple channels
Signed-off-by: Jason Wright <jason@jpw.nyc>
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
If an event occurs between the status registers being read and
the event being cleared, the interrupt line will remain active.
As the interrupt is edge triggered, all future interrupts
will being ignored. This problem will also occur if an I2C
transation fails in the callback.
The state of the interrupt pin is now checked at the end of the
callback, and a retry is attempted if the interrupt has not
been cleared.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
"const k_tid_t" is "struct k_thread * const" and not "const struct
k_thread *" as the code may be assuming. Just drop it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add support for CAN statistics to the Microchip MCP2515 CAN controller
driver. The hardware only supports reporting RX overruns.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The scaling factor for current measurement was incorrect.
Full range scaling during charge is 1.25 * charge current
limit, and there is no additional scaling factor applied
in different charge modes.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Enable driver for intel lw uart.
Changes from review:
- refactor spinlock to inside of loop
- use menuconfig for kconfig
- add CONFIG_UART_INTEL_LW_AUTO_LINE_CTRL_POLL
Signed-off-by: Teoh Shi Lin <shi.lin.teoh@intel.com>
When rx_timeout is set to a sufficiently small value,
rx_timeout_slab could potentially get set to a greater
than necessary value that causes spurious UART_RX_RDY
events.
Fixes#62828
Signed-off-by: Jacob Preston <jacob.preston@synapse.com>
add basic sensor support for 3-axis accelerometer, currently
this driver support data acquisition and motion detection
features.
Signed-off-by: Karthikeyan Krishnasamy <karthikeyan@linumiz.com>
Because shadow variable warning is turned on, a warning was thrown and
could fail some twister tests that don't use the -W option. This commit
gets rid of the warning.
Signed-off-by: David Corbeil <david.corbeil@dynon.com>
The OSEL bits in ALHASCTL register are present only
in ACE1.5 version - MTL. Platforms ACE2.0 do not have
the OSEL bits. Therefore DAI_ALH_HAS_OWNERSHIP
configuration option should be set only for
particular ACE1.5 version
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Remove the HWSEM locking around stm32_exti_disable().
The STM32 EXTI driver uses the core-local interrupt mask regsiters on
STM32H7x7 asym. dualcore MCUs. There is no need to lock the HWSEM
guarding the EXTI when accessing these registers.
Some sensor drivers toggle their interrupt mask every time the sensor
triggers the IRQ line. Locking the HWSEM fails e.g. in situations where
one coprocessor serivces the sensor and the other coprocessor sets up
its interrupts initially during bootup. This prevents the sensor driver
from locking the HWSEM and causes a kernel panic on the corresponding
CPU.
Note: The opposing stm32_exti_enable() was already correctly without
locking.
Signed-off-by: Martin Gritzan <martin.gritzan@gmail.com>
Let's make the nrf rtc kconfig depend on the SOC_COMPATIBLE
options which are set both by the real and simulated targets
so the configuration matches in both cases.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This contribution addresses the support for various types of modems in
gsm driver. As some 4G modems have failed to return correct output
from AT+CREG?, so AT+CEREG? is the right AT command in such situation.
This commit provides the possibility for user to select one type of
AT command. This PR fixes zephyrproject-rtos#63917
Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>
This CL uses BUILD_ASSERT macro to check whether `thr-sel` is out of
range instead of using NPCX series definitions.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace Nuvoton NPCX series definitions with new Kconfig definitions in
the npcx drivers. The benefit of this approach is that we won't touch
the npcx driver sources again during introducing a new npcx series next
time.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
STM32WB MCUs have two AES peripherals: AES1 for application use and AES2
dedicated for network stack. This patch modifies stm32 crypto driver to
use AES1 peripheral when building for STM32WB.
Signed-off-by: Lukasz Hawrylko <lukasz@hawrylko.pl>
If the underlying PWM device does not have a PM callback,
the PWM LED driver will flood the console with error logs.
The change ignores the error if there is no PM callback
for the PWM device.
Signed-off-by: Dennis Grijalva <dennisgrijalva@meta.com>
Add wakeup_duration support. (WAKE_DUR in WAKE_UP_DUR)
Value is configurable through DT per instance.
Signed-off-by: Adrian Wojak <adrian.wojak@outlook.com>
Use a new property, "clock-mux" to select the clock mux for the SAI.
Previously, the clock mux was being selected using the "bits" specifier
of the "clocks" phandle property, which is not the purpose of this
specifier. This can be shown by the regression introduced by 5bebbb91,
which changed the "bits" field to the clock gate shift (which is the
intended meaning).
This incidently worked for the SAI1 and SAI3 peripherals, as the lower 2
bits of the correct clock source selection (0b10) are the same as the new
value placed in the "bit" specifier. For SAI2, the clock source was
switched to PLL3 PDF0 by this change.
To resolve this, use an explict "clock-mux" property for this selection.
Fixes#63541
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
As the automatic start requires that the zephyr exe is run as
a root user, it is somewhat cumbersome to use. Remove the script
support and require that the zeth device is created beforehand
by the net-setup.sh script found in net-tools zephyr project.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
This change slightly simplifies the configuration of a CSL receiver and
generalized CSL_RX_TIME to EXPECTED_RX_TIME as a re-usable primitive
across several timing-sensitive IEEE 802.15.4 standard sub-protocols
(namely BE-PANs/DSME/CSL/RIT/TSCH).
This API change is based on the rules outlined in RFC #61227.
Fixes: #62918
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Improves standard conformance of the IEEE802154_CONFIG_ENH_ACK_HEADER_IE
option and introduces certain "soft MAC" capabilities around header IEs:
* Introduces types and helpers that allow driver maintainers to
represent, parse, write and validate header IEs.
* Introduces helper functions to access non-aligned fields in header
IEs, namely element IDs.
Updates the only existing L2 and driver pair that uses
IEEE802154_CONFIG_ENH_ACK_HEADER_IE: OpenThread platform radio and nRF5
and improves header IE validation in the nRF5 driver.
This change should help further driver maintainers to support
OpenThread's CSL and vendor IE extensions. It is based on the rules
specified in RFC #61227.
It is also a precondition to generically support both, "soft MAC" and
"hard MAC", approaches to header IEs in the TSCH protocol, namely the
time synchronization IE.
Fixes: #62940
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
"Sleeping" has a well defined meaning in Zephyr related to threading and
power management. This differs from OpenThread's definition:
- Deprecates the "SLEEP_TO_TX" capability as it is redundant and
conflicts with all of Zephyr's nomenclature, #61227, RFC 2863, Thread
standard and IEEE 802.15.4. This binds the API to an implementation
detail of OpenThread, instead. See #63670 for the agreed migration path.
- Renames the "SLEEP" event to "RX_OFF" which conforms to the
nomenclature in Zephyr, this API and IEEE 802.15.4.
Fixes: #62995
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
As noted in PR#63165 checking of result should use comparison to
success value instead of checking if result is negative. It will
allow to check if function returned invalid but positive value.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
These two functions are used together so there is no need for
splitting them into two functions. This commit also makes this
function required to be implemented by the TCPC driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
TCPC API functions should be able to inform the caller if the function
is supported and successfully executed. Bool values doesn't allow this
so it is needed to change the type to int.
For is_rx_pending_msg function the return code should conform to
existing error codes, so in case of function being not supported,
the -ENOSYS should be returned. In case of successful execution,
if there is no pending message, the -ENODATA should be returned and
in case of message pending, the value of 0.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add "chip" subcommand that displays the vendor, product and device
identifiers for all TCPC referenced by USB-C connectors.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Add a new SPI shim driver for Intel SoCs. Builds upon the SEDI bare
metal SPI driver in the hal-intel module.
Co-Authored-By: Kong Li <li.kong@intel.com>
Signed-off-by: Ye Weize <weize.ye@intel.com>
The receive FIFO needs to be drained in a different way depending when it
is done.
- before start
If the RX FIFO is in overflow state then we must read all the entries out
to empty it (it was after all full).
- before stop
The DMA might be already running to read out data. Check the FIFO level
change in one sample time which gives us the needed information to decide
to wait for another loop for the DMA burst to finish, wait for the DMA to
start it's burst (DMA request was asserted) or drain the FIFO directly.
No need to drain the RX fifo at probe time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Update interface of memc flexspi driver to better handle multiple
devices. Previously, using multiple devices on one FlexSPI bus would
require the user to configure each device to install its command table
(referred to as a LUT table by the driver) at an offset, so that it did
not overlap with other devices on the bus.
This commit changes the interface of the memc flexspi driver to instead
configure the LUT and flash device in one call. This allows the memc
driver to record the port each LUT sequence is used with, so that
future FlexSPI transfer requests can have their LUT offsets adjusted
based on the target port (which will correspond to a target device)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check XIP state based on the value of CONFIG_FLASH_BASE_ADDRESS. This
check should be more reliable than the SOC based method currently
used.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduces a (currently redundant) buffer length sanity check to prepare
for L2s that support PHYs with PHY payloads > 127 bytes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Introduces a (currently redundant) buffer length sanity check to prepare
for L2s that support PHYs with PHY payloads > 127 bytes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
When LPUART1 is not defined, the driver did not compile even if
any other LPUART was defined. This patch fixes that.
Signed-off-by: Nando Galliard <nando.galliard@protonmail.com>
Updated the Async API allowing the code path
for DMA while Async is enabled. Added common
DMA function that sets up both tx and rx dma
channels.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Annotate the calculation with type casts to force
promotion to uint32_t and then cast back down
to uint16_t for the return. This solves the issue
with invalid voltage (mV) values being returned
due to overflow during the conversion from the
register value on the max17048 chip.
Signed-off-by: Martin Calsyn <martin.calsyn@outcomex.com.au>
There is no fallthrough statement or comment so I assume break is
missing.
Fixes build time warning from some tools.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Currently the Kconfig for eth_mcux selects nocache if
HAS_MCUX_CACHE is set. But, for platforms that have a flexspi
cache but not a CPU cache, this is invalid, so clarify this
in the Kconfig definition.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This reverts commit 1c2d326579.
which was limited to CONFIG_UART_ASYNC_API=y case and causing regression
otherwise.
Fixes#63885
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Add option for overriding the maximum number of wait loop iterations for
entering/leaving freeze mode. Set the default to 10000 (as opposed to a
default of 1000 used in the HAL).
Fixes: #56171
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
i2c_rcar.c includes soc.h header which doesn't need for this source
and exists not for all boards. soc.h header doesn't exist for rcar-gen3
soc based on arm64 core.
soc.h consists soc-depended defenitions and need to be included
by soc-depended sources.
Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Only copy frame data for non-RTR frames as RTR frames do not carry any
data. The limitation of how much data to copy is currently handled in the
NXP HAL.
Fixes: #57002
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Only copy frame data for non-RTR frames as RTR frames do not carry any
data. Limit the amount of data copied to the actual DLC.
Fixes: #57002
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The k_mem_block structure has been obsolete for some years with
a few loose ends still remaining. As its usage in the usb_dc_mcux
codebase was confined to needing its "void *" pointer field, it
was simple to enough to hoist that field to remove another loose end.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If the channel was used for 16bit in the once, subsequent 32bit sample size
audio will be broken since the SCS bit remains set.
Example sequence with SOF:
normal audio playback with 16bit
ChainDMA audio playback with 16bit
normal audio playback with 16bit
The last playback results garbled audio.
Introduce intel_adsp_hda_set_sample_container_size() helper function
to handle the SCS bit and use it in the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
- if we have input enable use CY_GPIO_DM_xxxx else
CY_GPIO_DM_xxx_IN_OFF;
- added bias_high_impedance option
- Updated HIGHZ drive mode, now it sets if:
--- we have bias_high_impedance
--- or if input_enable and no addition bias mode
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
This driver uses the math library, so it cannot use the minimal C
library. However, it should be fine with any complete C library, not just
newlib.
Signed-off-by: Keith Packard <keithp@keithp.com>
The macro K_THREAD_STACK_MEMBER has actually been deprecated
since v2.4.0 in the macro doxygen description, but it was
never marked with __DEPRECATED_MACRO. Since this was being
used in various drivers, make it follow the deprecation
process.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit adjust the chat scripts for the simcom
sim7080 and gsm_ppp compatibles to fix an issue found
when trying to use a sim7080 modem. The CMUX command
includes optional parameters which are not identical
for all modems, so the AT+CMUX command has been adjusted
to only contain the mandatory parameters.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Extend the NXP S32 GPIO driver to be able to route external interrupts
to either SIUL2 EIRQ interrupt controller or, when available on the
SoC, WKPU interrupt controller.
Since WKPU can support up to 64 external interrupt sources and SIUL2
EIRQ up to 32, gpio_get_pending_int() is removed and the interrupt
controller specific API must be used instead.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Introduce an interrupt controller for the NXP S32 WKPU peripheral
that can be integrated with GPIO to trigger interrupts through
external interrupt pad inputs.
WKPU can trigger interrupts from certain input pads that support this
function, as well as wake-up events to the power management domain. This
patch only adds WKPU functionality as an interrupt controller to extend
the number of input pads that can interrupt the core. Power management
functionalities are not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
There is inherent race condition between i2s_nrfx_write() and I2S
interrupt handler because I2S operates independently from the rest
of the system. If software takes too long to supply next TX pointer
then nRF I2S peripheral will simply resupply the previous buffer.
The race window is rather short. The failed race executes as follows:
1. i2s_nrfx_write() checks state and loads next_tx_buffer_needed
2. I2S interrupt handler executes and calls data_handler() which
notices empty TX queue and therefore sets next_tx_buffer_needed
3. i2s_nrfx_write() continues with the queue TX path (because the
next_tx_buffer_needed was false when it was accessed)
If next i2s_nrfx_write() executes before next I2S interrupt:
4a. i2s_nrfx_write() notices next_tx_buffer_needed is true and
supplies the buffer directly to I2S peripheral. Previously queued
buffer will remain in the queue until the just supplied buffer
starts transmitting. Effectively swapping whole I2S block leads to
clearly audible artifacts under normal circumstances.
If next I2S interrupt executes before next i2s_nrfx_write():
4b. data_handler() notices that buffer was reused and stops despite
having a buffer available in TX queue
Modify i2s_nrfx_write() to always queue the TX pointer first and only
supply the buffer to nrfx if the queue was empty when interrupt handler
executed. This prevents both the out-of-order TX and premature stop.
Fixes: #63730
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
When SPI is enabled, pinctrl driver configures all the pins in UART pinctrl
config as gpioModeDisabled.
Signed-off-by: Rihards Skuja <rihards@skuja.eu>
Since #53979, runtime PM can be applied on serial device used by console.
While it should be transparent on serial driver side as the application
(console in this case) is driving the PM runtime requests, on STM32
it requires some modification on serial driver as UART interrupts are
generated to handle internal power management house cleaning.
When these interrupts are generated, PM runtime should also be driven
to ensure clock availability when treating the uart ISR.
On STM32, some additional changes are required
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
There seems to be a copy-paste error where GetDMAError() et al is used
twice. The comment states that it is actually getMACError() et al that
should be used in the second instance.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
When backlight pin is not defined, a display suspend will cause
a crash since it looks at the wrong pin when deciding if
it exists.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
rand32.h does not make much sense, since the random subsystem
provides more APIs than just getting a random 32 bits value.
Rename it to random.h and get consistently with other
subsystems.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Limit the number of the copied ssid to WIFI_SSID_MAX_LEN
and avoid a possible one byte overflow.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Per the MX25UM51325G datasheet, all page programs in OPI DTR mode need to
start at an even address, and be of even length. Update the minimum
write size reported by the driver and check all writes when OPI DTR mode
is enabled, so that subsystems using the flash driver can align to this
requirement.
Fixes#63639
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The can_sja1000_handle_error_warning_irq() function should only attempt to
start bus-off recovery, but not wait for the result.
Fixes: #63712
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Ensure that the Bluetooth rpmsg driver thread is temporarly in
cooperative mode using `k_sched_lock`.
The previous commit added the documentation on `bt_recv` stemming from
the general consensus among maintainers that `bt_recv` may not be called
from preemptible priorites.
Many uses may be affected by this race condition, since the default
configuration of rpmsg driver selects a preemtible priority.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The desired current/voltage properties make use of milliamps/volts while
the present current/voltage properties make use of microamps/volts.
Fix the desired current/voltage properties to be consistent with the
present current/voltage properties where they're most likely to be used
with.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Fix a build warning on 64 bit architectures:
zephyr/drivers/sensor/default_rtio_sensor.c:238:17: error: format '%zu'
expects argument of type 'size_t', but argument 2 has type 'uint32_t'
{aka 'unsigned int'}
num_channels type changed to uint32_t in 96175fcc47.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the integer arithmetic to divide first before multiply.
The muliplication of sys_clock_hw_cycles_per_sec() by ten leads
to a really big number on boards with high-speed clocking, thus
to the overflow warning, and to errors for integration tests.
Fixes: #63678
Signed-off-by: Stephan Linz <linz@li-pro.net>
Do not propagate unused parameter. ISR callback is already handling
the given flags, there is not need to propagate it through internal
calls.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
get_entropy_isr() has to return the number of bytes copied or
a negative value in case of error.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Return -ENODATA in neorv32_trng_get_entropy_isr when
there is no data available. This is consistent with other
drivers.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
get_entropy_isr() has to return the number of bytes copied or a negative
value for error. Since this driver is assuming that it will always
(????) get the number of requested bytes, change the function to return it
instead of 0.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit fixes the following issues with the PCM data format output
by the MCUX SAI driver:
- WS signal should be only one clock cycle in length for short PCM
format
- Word count should not be fixed to 2, except for classic I2S format
- BCLK polarity should be on falling edge for PCM long and short format
Additionally, the I2S_FMT_CLK_ constants now flip the frame and bit
clock polarity from the normal value expected for the selected I2S
format, as expected by the API.
Fixes#63041
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
When upgrading to version 3.4, our hardware lost ethernet connectivity.
Our hardware assumes a fixed link and does not communicate with the
underlying phy via the mdio bus.
I confirmed that the atsame54_xpro board also will lose ethernet
functionality when the atsame54_xpro configures the phy via to use a
fixed link...
The eth_sam_gmac driver changed the initialization behavior to call
net_if_carrier_off and notes to wait until phy link is up (via
callback.) However, when in a fixed link configuration, the callback is
never called. So the net_if_carrier_on event never occurs.
This patch adds a check to see if link is up already before calling
net_if_carrior_off. This check works because in fixed-link mode, link-up
is set synchronously during phy driver initialization.
I tested that atsame54_xpro with fixed-link configuration will now work
after this patch.
Signed-off-by: Thomas Chiantia <thomas.chiantia@gmail.com>
Remove excessive debug logging from the SJA1000 driver backend. Logging
each register access makes generic CAN debug logging unusable.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add padding to the header and remove unnecessary memset in order to fix
alignment faults in cores such as M0 or ones that support
CONFIG_TRAP_UNALIGNED_ACCESS
Signed-off-by: Yuval Peress <peress@google.com>
The rpmsg_close() call uses the HCI reset command to reset the
controller. But when building as controller-only we do not bring in the
infrastructure to send HCI commands (nor should we) and rpmsg_close()
will not be called anyway.
Fixes#63534.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The code is designed to handle RF0L and RF1L in
line 1, but they were being sent to line 0. Becuase
they weren't handled, the interrupts would never
be handled which locked up the chip.
Signed-off-by: Abram Early <abram.early@gmail.com>
Prevent use of isochronous endpoints as bulk and/or interrupt endpoint.
The issue was observed when trying to use 4 CDC ACM instances where the
4th instance would claim the isochronous IN endpoint 0x88 to be bulk.
Because the isochronous endpoints cannot respond with handshake packet
the iso endpoints cannot be used as bulk or interrupt substitue.
Properly fail endpoint check and therefore make 4 CDC ACM instances not
enumerate at all because the hardware has endpoints that only allows up
to 3 CDC ACM instances.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The PCA9633 i2c LED controller offers an All Call address in its nominal
operation, allowing simultaneous communication with all instances present
on the same i2c bus. The default address is 0x70. While this functionality
is convenient, it is possible that the board uses another i2c component
that also uses this address (for example, the shtcx). In such cases, the
address conflict prevents the proper functioning of the system.
The idea is to add a "disable-allcall" property to the device tree. If this
option is present, the initialization of the PCA9633 forces the bit 0
(ALLCALL) to be set to false, thereby disabling this function. It is
necessary to add this property to all PCA9633 devices on the bus to free up
the address 0x70.
Signed-off-by: Steve Jacot-Guillarmod <steve@piziwate.net>
When the legacy LLCP implementation was removed this Kconfig option was
mistakenly left over. Remove it now with all its users.
Fixes#63212.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
`last_load` is the full N cycles and `SysTick->LOAD` should
be loaded with `last_load - 1` for the calculations work
correctly.
Note: This only affects a kernel in ticked operation.
Tickless kernels periodically restart the timer correctly.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The existing implementation did not properly
handle when `SysTick->VAL` is zero.
This caused three subtle edge cases:
* val1=0,COUNTFLAG=0,val2=0
This should result in no cycles elapsed,
however `(last_load - val2) = last_load`.
So an extra `last_load` cycles was returned.
* val1=0,COUNTFLAG=0,val2=(last_load-1)
This should result in 1 cycle elapsed,
however `val1 < val2` so an extra `last_load`
cycles was returned.
* val1=[2,1,0],COUNTFLAG=1,val2=0
This should result in `last_load` cycles elapsed.
However, `last_load * 2` cycles was returned.
To fix the calculation, val1 and val2 are first
wrapped/realigned from [0:last_load-1] to [1:last_load].
Tidy comments to better reflect the SysTick
behaviour and link reference manuals.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The workaround for the nRF52 anomaly 109 that is implemented in
the nrfx_pwm driver uses interrupts generated by a selected EGU
instance and by the enabled PWM instances (even if the interrupts
are not used in generation of the PWM output signals).
Add required IRQ_CONNECT calls so that those interrupts are
properly handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not only the return code of TI's RF command queueing mechanism but also
the command status need to be checked to assert that a command was
executed successfully. This change introduces additional checking of the
command status.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The frequency synchronization command requires a proper frequency to be
set in order to be successfully executed. The command not being executed
leads to unnecessary internal error handling wrt command scheduling.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Moves the RX callback closer to where it's actually being used also
removing the necessity to declare a function prototype.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver API now distinguishes between operational UP/DOWN states as
required by Zephyr's network API and receiver on/off states as an
internal driver state for improved standard conformance.
This change closes the gap between the driver API requirements and the
implementation in this respect.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Replaces the mutex by a semaphore for ISR readiness as requested by the
driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Checks whether the receiver is already on before trying to switch it on.
This also closes a gap wrt the driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Restructuring and renaming of driver-internal functions for improved
readability and maintainability:
- distinguish between externally exposed API methods
(cc13xx_cc26xx_sub_* prefix) and internal helper methods
(drv_* prefix).
- extract a few functions to reduce complexity and improve re-use
Also removes unnecessary initial runtime blanking of static (.bss) data
in the newly introduced extracted buffer initialization functions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The pre-alloacted size of the buffer for the SHA ROM API code increases
in npcx4 chip. This commit adds a new property context-buffer-size to
sha0 DT node in npcx9 and npcx4 separately. The driver can pre-allocate
buffer with the correct size based on the property.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Fixes an issue that reload mode is not disabled in case of an error.
From this case the driver could not recover because in msg_init()
no new transfer could be initialized.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Since 2f003e59 reworked the structure of k_mem_slab information fields,
we need to update the logging statements in the i2s_mcux_sai driver to
access these fields correctly.
Fixes#63527
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Different nRF52 devices have different maximum TWI DMA transfer size,
and it's easy to hit the limit with i2c displays on nrf52832 (8 bit) and
nrf52810 (10 bit). Currently neither the driver or the hal validate the
limit, leading to random NACK errors when trying to transfer more data.
Add a check on the driver to fail gracefully when going over the limit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define all the register offset directly in the driver according
to the RISCV PLIC specification as they are not configurable,
see: https://github.com/riscv/riscv-plic-spec.
Updated devicetrees that has PLIC accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Removing the edge-trigger Kconfig as it is supported by default
in the RISCV PLIC specifications.
Define the edge-trigger register offset in the driver instead
of retrieving the value from devicetree as it is not something
configurable. The value 0x1080 is defined in Andes & Telink
datasheets.
Updated build_all testcase.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Previously, the uart_emul device did not support interrupt-driven
receive, which is an unwritten requirement for hooking up a uart to
the Zephyr console driver.
The console is a fairly high-traffic subsystem, and we should be able
to perform more extensive testing on it, aside from maching twister
output against a regular expression. With this change, we can use
the emulation uart within the body of a ZTest.
Testing Done:
```shell
west build -p auto -b qemu_riscv64 -t run tests/drivers/console_switching
...
*** Booting Zephyr OS build zephyr-v3.4.0-4277-gae0d63471be1 ***
Running TESTSUITE console_switching
===================================================================
START - test_read
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
PASS - test_read in 0.005 seconds
===================================================================
START - test_write
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
PASS - test_write in 0.003 seconds
===================================================================
TESTSUITE console_switching succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [console_switching]: pass = 2, fail = 0, skip = 0...
- PASS - [console_switching.test_read] duration = 0.005 seconds
- PASS - [console_switching.test_write] duration = 0.003 seconds
------ TESTSUITE SUMMARY END ------
===================================================================
PROJECT EXECUTION SUCCESSFUL
```
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Zephyr's code base uses MP_MAX_NUM_CPUS to
know how many cores exists in the target. It is
also expected that both symbols MP_MAX_NUM_CPUS
and MP_NUM_CPUS have the same value, so lets
just use MP_MAX_NUM_CPUS and simplify it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The instruction length can only be 0~5.
Use am_hal_iom_blocking_transfer and specify clearly the TX/RX direction.
Hold CS to continue to RX expected response after instruction transmission.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The commit fixes the SPI mode improper configuration.
Otherwise the MODE_3 and MODE_0 cases would never be entered as expected.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Flash is clocked with HCLK, while CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
reflects SYSCLK. HCLK = SYCLK / AHB prescaler.
When dealing with flash latency, use HCLK instead of SYSCLK.
This changes reverts a abusive change done in an old commit (efd8ee465c)
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Latency should be set before HCLK clock increase. Not doing so can result
in broken behavior.
For instance, at startup, MSI is @4MHz on L4 series.
If MSI is required to be configured at 48 MHz for future use a USB clock,
this will be done in set_up_fixed_clock_sources(). If flash latency is
not correctly set at this point fetching flash will fail..
Move flash latency configuration before setting up fixed clocks.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit adds a timeout of 300ms to the generic (gsm_ppp) init
chat script. This delay is required for some modems (discovered on
a Telit ME910G1-WW) to allow it to enter CMUX mode. Without this
delay, the modem simply refuses to respond to any CMUX commands.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Decouples the generic MII PHY driver from the adin2111 driver by making
it depend on an ethernet-phy compatible devicetree node rather than the
adin2111 driver not being enabled. This makes it possible to add the
adin2111 driver to tests/drivers/build_all/ethernet
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Simplifies the adin2111 ethernet driver to use the generic driver class
initialization priority instead of a driver-specific priority.
Suggested-by: Georgij Cernysiov <geo.cgv@gmail.com>
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
The adin2111 ethernet driver supports both adi,adin2111 and adi,adin1110
devicetree compatibles, however it failed to build when both compatibles
existed in the same devicetree. This may be an unusual configuration for
real systems, but was found when extending
tests/drivers/build_all/ethernet to cover both compatibles.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Remove unnecessary calls to __ASSERT_NO_MSG() in CAN controller driver
timing setter callbacks. The CAN API functions can_set_timing and
can_set_timing_data() already provide run-time timing parameter validation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
I2C scan might fail as peripheral is still busy completing last
operation. This makes sure transfer call waits for free line.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Commit 2f003e59e4 ("kernel: Re-factor k_mem_slab definition") moved
block_size into from k_mem_slab to k_mem_slab_info without updating i2s
handlers. Use the new member to fix build failures.
Fixes: #63363
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The current approach is a bit impractical in the upper layer.
This patch removes the two fifos that hold the transfer buffers
and replaces them with a byte array for the setup packet and
a pointer to a data buffer. The data buffer is mandatory for
all types of transfers except control without a data stage.
The waste of eight unused bytes for non-control transfers should
be insignificant, since an additional pointer would be at least
half of it, and then there would be the overhead of handling it.
This patch also clean up the transfer flags, rename owner to callback
as it reflects the upper layer use case, and add an additional member
to hold the pointer to the USB device (peripheral on the bus).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Aling with the changes in UDC done in the commit ad81b3b797
("drivers: udc: move transfer status to buffer info structure")
This allows us to get the result of synchronous transfer and
simplify uhc_submit_event().
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This continue PR #31270. The updated changes are:
- Updated to work with latest zephyr
- Inplace reads/writes of registers
- Batch read of RX messages when multiple messages can be read
- FIFO abstraction of RX/TEF queues
- Handle ivmif errors
- Use READ_CRC for register reads
- Use bitmasks instead of bitfield members
- Rename mcp25xxfd to mcp251xfd
- General cleanups
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.
The nrf53 pretick requires just one RTC1 CC channel.
The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.
Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.
The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.
Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add RTC pretick option that triggers HW activity one tick before and
RTC event that leads to the interrupt. Option is active only on nrf53
network core.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Rearranges the sys_mem_blocks fields so that information that describes
how much of the memory block is used is co-located. This will allow
easier of its statistics into the object core statistics reporting
framework.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Use clock control API to retrieve the counter module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
add host controller driver support for emmc version 5.1.
The driver expose zephyr sdhc api interface for emmc host controller.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Adjusted the prompt of the load command to make it more obvious that
the user is being prompted for keyboard input.
Signed-off-by: Kelly Helmut Lord <helmut@helmutlord.com>
A little refactoring that simplifies dealing with nanosecond timestamp
values in packets and further decouples calling code from PTP:
Benefits:
- simplifies calling code by removing redundant conversions.
- prepares for removing PTP dependencies from net_pkt.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the STM32 ADC driver
nocache check.
Copied from commit 818aa2d
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This introduces pwm capture shim driver for NXP S32 EMIOS,
the driver uses SAIC mode that is supported for all channels,
to capture the counter value on each edge for period/pulse
measurement
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This prepares support pwm capture APIs by extended current pwm
shim driver but use a differrence hal component:
- Introduce a Kconfig options that will be set when PWM pulse
generation API is used, it is also used to select the hal
component. Guarding current code inside this Kconfig option
- Increase #pwm-cells to 3, flags is supported for PWM capture
- Do not require duty-cycle and polarity be set in dt, PWM
capture doesn't need it.
- Rename emum value for pwm-mode to keep only key information
- Add preprocessor in case no channel is configured for generate
PWM output, to avoid warning when build
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This enables and declares interrupt handlers for eMIOS,
the handlers defined and implemented at HAL, the driver
takes the name for each id from interrupt-names devicetree
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add .close() implementation for the HCI RPMsg driver.
When running on the nRF5340 application core, it will power-cycle the
network core.
Signed-off-by: Pawel Osypiuk <pawelosyp@gmail.com>
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
Changes the interpreted unit of the threshold temperatures to match the
description (millidegrees).
Signed-off-by: Bernt Johan Damslora <Bernt.Damslora@nordicsemi.no>
Add "st,stm32-flash-controller" as compatible for STM32H7 so that
what is defined for STM32 in general is also defined for STM32H7.
Already most of the other STM32 versions have this addition.
Also removed the specific STM32H7 flag check in
/flash/driver/Kconfig.stm32.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Updates Ethernet PHY devicetree bindings to be more consistent with
Linux by using the standard `reg` property for the PHY address instead
of a custom `address` property. As a result, MDIO controller bindings
now require standard `#address-cells` and `#size-cells` properties.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Some Ethernet PHYs used the devicetree node name `phy`, while others
used `ethernet-phy`. Be consistent and use `ethernet-phy` throughout.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
For all STM32 ADC that use common sampling times, there is a check made to
ensure that all channels of a sequence use the same sampling time.
The value was not reset between reads, resulting in error if two
consecutive sequences used different values.
This commit adds a reset of this value once read is done.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The number of IRQ first level bits is not necessarily 8 bits
now, so use `CONFIG_1ST_LEVEL_INTERRUPT_BITS` instead of
hardcoded value.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The serial_test.c driver uses size_t to store read_size,
which becomes a 64-bit type when built for 64-bit
architectures. This is incompatible with the print
format %d which is 32-bit. Updated to %zd
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit moves the dependency management between the
RING_BUFFER and UART_ASYNC_API or UART_INTERRUPT_DRIVEN
options to the Kconfig Kconfig.test.
If either UART API options listed are selected, the
RING_BUFFER option must be selected. This is now handled
automatically by Kconfig instead of causing a build
assert.
The asserts where added with this PR #59880, and are
removed in this commit.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit fixes an error where the irq_isr callback is set
to an undefined variable instead of NULL.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Values are specified in the datasheet(page 30, table 18).
Values match with values defined in lsm6dso-common.yaml
Signed-off-by: Jeroen Reeskamp <jeroen.reeskamp@vention.nl>
Update the CAN controller drivers to solely use the sjw and sjw-data
devicetree properties for setting the initial timing when devicetree timing
parameters are specified in Time Quanta (TQ).
Any timing set via the CAN timing APIs will contain either user-provided or
automatically calculated SJW values. This includes any timing parameters
calculated from bus-speed and bus-speed-data devicetree properties.
Update the CAN controller driver tests accordingly and remove the
CAN_SJW_NO_CHANGE definition as it has lost its meaning.
Fixes: #63033
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Change the CAN timing calculation APIs to automatically calculate a default
(Re-)Synchronization Jump Width (SJW) value. The calculated value can be
overwritten by the caller if desired.
This allows automatically scaling the SJW according to the number of Time
Quanta (TQ) used for phase segment 2 instead of relying on a compile-time
fallback value defined in devicetree.
This reduces the can_set_timing()/can_set_timing_data() API functions to
simple setters (with validation).
Fixes: #63033
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix wrong debug message when port B of tachometer is captured.
Signed-off-by: Evan Chang <MCCHANG1@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This allows testing code that uses the UART interrupt-driven API and
UART asynchronous API.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Zephyr increments the gain until it reaches the maximum value and
then sets the registers to zero which is incorrect.
The values set in the DMIC config should be restored.
Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
Add `mdio_read_c45()`/`mdio_write_c45()` APIs for Clause 45 access
and remove the `protocol` MDIO binding property so that MDIO bus
controller can support more than one protocol.
A new MDIO header is introduced with generic opcodes, MMD and
registers addresses, to be used by MDIO and PHY drivers.
Existing MDIO drivers that support both Clause 22 and Clause 45
access are migrated to the new APIs.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Rename argument `devad` to `regad` to indicate this is the register
address in a given PHY device and to not be confused with the
Clause 45 device address within a port.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
When slave_address is 10 bits, data type should be
uint16_t instead of uint8_t,
like the data typeof data->slave_cfg->address.
https://github.com/zephyrproject-rtos/zephyr/issues/55987
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On S32K344, the offset in memory map between each channel
is 0x4000 for most channels, but there is specific case is
between channel 11 and 12 which is 0x1D4000 instead. As a
consequence, 32 channels are divided to two parts: one
starts from channel 0 -> 11. The other is from channel 128
to 145. The channel gap is from 12 -> 127.
For user and data structures in shim driver, the channel's
value comes from 0 --> 31. Above constraint will be counted
when interact with the mcux sdk
Beside that, the DMAMUX register in this platform is very
specific, not in identical with DMAMUX channel, so shim
driver is updated to cover this case
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add new dt binding for edma v3 that inherits whole dt
properties from current version. One more property is
added for SoCs that don't have separate error interrupt
id, use same id with channel interrupt
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
The current implementation iterates over all channels
even if only several channels share the same irq. This
introduces one more dt property to describe an offset
between two channels share the same interrupt id.
Beside that, the error interrupt must be put as last
element of "interrupt" dt property.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
The dma-channels devicetree value - 1 = maximum valid channel
The dma-requests devicetree value - 1 = maximum valid request
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
A buffer overflow happens in send() when size is negative because
it is promoted to signed when used in memcpy.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the driver is passing the whole buffer, let's zero it to avoid
pass garbage in case of size != buffer's size.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
It is possible to happen a buffer overflow in ipm_send due the lack
of a checking for negative value.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the driver is passing the whole buffer, let's zero it to avoid
pass garbage in case of size != buffer's size.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
It is possible to happen a buffer overflow in ipm_send callback
due a wrong comparison between signed/unsigned types.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Replaces the previous approach to define bands via hardware capabilities
by the standard conforming concept of channel pages.
In the short term this allows us to correctly calculate the PHY specific
symbol rate and several parameters that directly depend from the symbol
rate and were previously not being correctly calculated for some of the
drivers whose channel pages could not be represented previously:
* We now support sub-nanosecond precision symbol rates for UWB. Rounding
errors are being minimized by switching from a divide-then-multiply
approach to a multiply-then-divide approach.
* UWB HRP: symbol rate depends on channel page specific preamble symbol
rate which again requires the pulse repetition value to be known
* Several MAC timings are being corrected based on the now correctly
calculated symbol rates, namely aTurnaroundTime, aUnitBackoffPeriod,
aBaseSuperframeDuration.
In the long term, this change unlocks such highly promising functional
areas as UWB ranging and SUN-PHY channel hopping in the SubG area (plus
of course any other PHY specific feature).
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Aligns the name of the return value variable with what is used elsewhere
in the driver and the subsystem for improved readability and
consistency.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Preparative change to introduce build-time configured channel pages.
This fixes the description of the driver's available PHYs and makes
channel page and channel range independent from runtime attributes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
SPI API allows `spi_buf_set` structures with no buffers linked to them
(with `.buffers = NULL`). Correct the spi_nrfx_spis driver so that it
is able to deal with such structures.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Based on review of the similar charger driver API, it's been demonstrated
from the community that embedding a per value property type when fetching
properties. Separating off the property types from the property values
themselves also allow an array of property types to declared as static
const.
Break up fuel_gauge_property struct into a fuel_gauge_prop_val union and a
fuel_gauge_prop_t property type as inputs into fuel gauge API functions.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Based on review of the similar charger driver API, it's been demonstrated
from the community that embedding a per value status code when fetching
multiple properties isn't particularly wanted or needed. It was largely
considered not worth the additional maintenance to have the extra per
property error information.
Remove the status field from the fuel_gauge property value structs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The fuel_gauge_set_prop() function prototype declares a function that sets
multiple fuel gauge properties at once. The naming suggests it ought to
fetch a singular property at a time. Moreso, some clients may just want to
set properties one at a time and may feel uncomfortable using a prototype
for fetching multiple properties when wanting to fetch them one at a time.
Modify fuel_gauge_set_prop() to fetch a single property and add
fuel_gauge_set_props() to support fetching multiple properties. Modify
existing tests/drivers/samples.
This is part of #61818 work.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The fuel_gauge_get_prop() function prototype declares a function that
retrieves multiple fuel gauge properties at once. The naming suggests it
ought to fetch a singular property at a time. Moreso, some clients may just
want to fetch properties one at a time and may feel uncomfortable using a
prototype for fetching multiple properties when wanting to fetch them one
at a time.
Modify fuel_gauge_get_prop() to fetch a single property and add
fuel_gauge_get_props() to support fetching multiple properties. Modify
existing tests/drivers/samples.
This is part of #61818 work.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
When radio is set to promiscuous mode it is desirable to receive
invalid frames. This skip a few checks and allow an invalid and
non-standard frames be delivered for diagnose.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The i2c_ll_stm32_v2 driver requires manual timing configuration for
"fast mode plus" speed.
This adds an error message linking to the appropriate documentation.
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
While recent browsers seem to transparently try to use https for
http://www.st.com/... URLs, they are effectively not working anymore, so use
https://www.st.com/... URLs instead.
curl http://www.st.com/en/evaluation-tools/nucleo-g070rb.html -m 5 -v
* Trying 104.89.117.48:80...
* Connected to www.st.com (104.89.117.48) port 80 (#0)
> GET /en/evaluation-tools/nucleo-g070rb.html HTTP/1.1
> Host: www.st.com
> User-Agent: curl/8.1.2
> Accept: */*
>
* Operation timed out after 5002 milliseconds with 0 bytes received
* Closing connection 0
curl: (28) Operation timed out after 5002 milliseconds with 0 bytes
received
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This commit does not introduce any functional change to the
codebase. Just removes certain redundant checks from
various CMakeLists.txt files in order to bring more coherence
in the codebase.
Signed-off-by: Jilay Pandya <jilay.pandya@zeiss.com>
Send a fw ready reply message as soon as possible.
This is usually used on host side which is waiting
for this message in order to establish the
communication with the remote processor - see
imx_dsp_rproc driver from Linux.
This can be enabled by IPM_IMX_FW_READY_REPLY config,
which is by default N.
Set CONFIG_IPM_IMX_FW_READY_REPLY as Y for
openamp_rsc_table sample, running on nxp_adsp_imx8m.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Refines the `system_mm.h` to include `zephyr/types.h` instead
of `zephyr/kernel.h` as that is all it needs.
Updated the includes of `mm_drv_ti_rat.c` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Based on RM0456, each PLL in the STM32U5 has the
capability to work either in integer or fractional mode.
In this update, the fractional mode can be enabled
by setting the fracn value in the device tree.
Signed-off-by: Jatty Andriean <jandriea@outlook.com>
Split the read function into 2 versions (date and no date) since they
don't have common code.
It improves readability.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Add support for using the sub second registers. It allows reading and
setting alarm with the sub second tick resolution.
The RTC module is configured to get as high frequency as possible, which
equals the source clock (RTCCLK) divided by 2. To get such frequency,
the asynchronous prescaler is set to 1.
According to RM, setting the asynchronous prescaler to a high value
minimize consumption, so the change increase the power consumption.
Use a config to enable the sub second support.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
RTC drivers uses only seconds, so transition to microseconds is
necessary.
Change way of calculation tick<->time to avoid unnecessary
conversations.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Synchronize reading two separate registers. In some edge cases the read
registers could point different dates.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
The config values have been hardcoded as magic values. Introduce
universal calculation based on the DTS entries.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This separates the DT device init macros into two: one for
UART accessed via IO port or MMIO, the other for PCIe UART.
All the conditions needed to setup the device structs are
getting complicated. Hopefully separating them would make
them easier to decode, and to avoid the conditions having
too many levels.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of PCIE0 and PCIE1, use no suffix for IO port/MMIO IRQ
configuration funct, and suffix PCIE for IRQ config on PCIE
bus.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Use CODE_CODE_1() instead of macro trampolines when
CONFIG_UART_NS16550_PARENT_INIT_LEVEL is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Using COND_CODE_1() is more intuitive when looking at the code,
instead of some macro trampoline magic.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This simplifies DLF and PCP enabling devicetree macros with
DT_ANY_INST_HAS_PROP_STATUS_OKAY() instead of the complicated
ones.
Also, this moves the macro to initialize struct elements into
the struct initializer itself. This makes it clearer on which
element is being initialized directly inside the struct
initializer instead of having to do mental macro trampoline
to find the correct macro.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Enabled intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS I2C to transfer and
receive data.
Signed-off-by: Bindu S <bindu.s@intel.com>
Introduce support for Texas Instruments TMAG5170
high-precision linear 3D Hall-effect SPI sensor.
This driver allows to configure measurements on
magnetic and temperature channels. It is also
possible to read rotation of the magnet.
Signed-off-by: Michal Morsisko <morsisko@gmail.com>
Added usage of dma_parent phandle instead of using parent-child
method to get DMA base address.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Adds initial support for hm330x dust sensor series. Allows to read PM1,
PM2.5 and PM10 concentrations in atmospheric environment. A further
update to the driver may add support for also reading "standard" CF1
concentrations by exposing of a custom sensor attribute or a Kconfig
option. Tested with Grove - Laser PM2.5 Sensor (HM3301) attached to a
Wio Terminal.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Enable backends by default, instead of requiring some other module to
turn them on. This aligns with the behaviour of sensor drivers and
`BT_RPMSG`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Be explicit about the HCI backend that Bluetooth unit tests require.
Some unit tests depend on `BT_HAS_HCI_VS`, so also enable that.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
DT_DRV_COMPAT was unused for this driver. To get a node identifier
DT_NODELABEL() macro was used. Refactor to use the correct interfaces
using instance number 0.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The at86rf231 frame buffer access mode read differs from all other
transceivers by only transfer one more byte after PSDU data instead
three. This difference is not evaluated in the current version of
the driver. The current change add the necessary check and read the
missing data (EQ, TRAC).
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Previously, the `uart_console_isr()` routine assumed that the
return value of several uart API functions would only ever
return the equivalent of a boolean value. In fact, an integer
is returned on occasion, and that integer can take on many
values.
Since unary operations would either go to "true" or "false"
and since any non-zero integer evaluates to "true", even a
return value of something like `-ENODEV` would evalueate
to true.
Explicitly compare against the integer-equivalent value of
the expected boolean output.
With this, in the case of errors, negative return values do
not evaluate to "true", and the infinite loop is avoied.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Currently, the driver imply understand that all instances
will use dma when CONFIG_SPI_MCUX_LPSPI_DMA is set. There
might be an instance doesn't need DMA, so instead of enforce
spi_transceive API to use DMA, add more flexible to enable
DMA only when required
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
When the alternate setting is configured as func3, in addition to
the setting of func3-gcr, some pins require external setting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Implement the RTIO/Sensors V2/Async API for the AKM09918C. Add a decoder
API implementation as well.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Update the decoder APIs to vertically decode the raw sensor data. This
means that instead of getting each channel on a frame by frame basis,
the API takes a channel specifier and returns as many frames of that
given channel as there's room.
The goal of this is to make the end decoded result the most useful and
usable for the Zephyr application. See #60944 for details.
Signed-off-by: Yuval Peress <peress@google.com>
With update to handle DSI transfer length in MIPI_DSI driver, the logic
can be removed from the RM67162 driver. The driver now will simply
continue writing data until the full buffer is sent.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for SMARTDMA transfers, and byte swapping of RGB565 data.
Additionally, the limits on TX data size have been impelemented in the
MIPI DSI driver, as opposed to the RM67162 display where they were
previously added.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce SMARTDMA dma driver. The SMARTDMA is a peripheral present on
some NXP SOCs, which implements a programmable DMA engine. The DMA
engine does not use channels, but rather provides a series of API
functions implemented by the firmware provided with MCUX SDK.
These API functions can be selected by the dma_config slot parameter. A
custom API is also provided to allow the user to install an alternate
firmware into the SMARTDMA.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Limit DSI data TX to the max payload size possible with this peripheral,
rather than relying on display drivers to respect this limitation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Fix the assignment of initial CAN bus timing parameters for the CAN-FD data
phase.
Fixes: #62979
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add MDIO driver that works through GPIO pins. This driver is
useful when a microcontroller doesn't have MDIO bus or when multiple
separate MDIO buses are required. The driver provides access to
the MDIO bus through GPIO pins for any SoC that has GPIO pin control
available.
Signed-off-by: Aleksandr Senin <al@meshium.net>
Switch from using DEVICE_DT_DEFINE()/DEVICE_DT_INST_DEFINE() to using
CAN_DEVICE_DT_DEFINE()/CAN_DEVICE_DT_INST_DEFINE() for remaining drivers.
This unifies CAN controller device driver initialization regardless of the
driver implementing CAN statistics support or not.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove CHANNEL_COUNT limit used to check the channel bitmask.
This value was not applicable on STM32L1 where channel can go up to 31.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove unwanted "pm_device_runtime_get" lock which makes i2c power
management working incorrectly.
Fixes: #62790
Signed-off-by: Petr Hlineny <development@hlineny.cz>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This fixes the following compile time warning;
drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: In function 'sys_mm_drv_mm_init':
include/zephyr/sys/__assert.h:44:52: error: format '%p' expects argument
of type 'void *', but argument 2 has type
'long unsigned int' [-Werror=format=]
__ASSERT_PRINT("\t" fmt "\n", ##__VA_ARGS__)
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The PIT maximum load value may not be always 32-bit. Allow the SoC to
define this value from devicetree.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Depending on the SoC design, the PIT channel interrupts can be
individual or OR'ed together to a single interrupt line.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This periodic timer (PIT) has a single load value register for each
channel, which is currently used for both alarm and top callback APIs.
If using both APIs together (which is a valid use-case) it will write
to the same register causing unexpected behavior of the timer.
The nature of the PIT is to trigger an event (like interrupts) at a
certain rate, and not to produce single-shot events. Hence keep only top
callback functionality.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This is a specific case for NVMe where given data buffer pointers must
be dword (4 bytes) aligned.
There is no virtual memory management between the user thread and NVMe
driver (which one could detect such wrong alignement on physical memory
and thus reallocate the memory properly, so it would be fully
transparent for the user thread), thus the need to push that check to
the user.
This has been going under the radar so far as Qemu does not seem to
follow NVMe specifications where PRP1 (in DPTR) must always be
dword-aligned. It really does not follow the rule: specifications
details that if bits 1:0 of PRP1 are set, the controller may generate
an error or treat the address as if these bits were unset. Seems like
a bug in Qemu, I did not check the code there however.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Former way was difficult to read, so let's have a better way which
easily follows the specifications.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will provide a detailed error status report.
As for most of the original code of the driver, this is a backport of
the work done by Jim Harris in FreeBSD.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Convert DEVICE_DEFINE to DEVICE_DT_INST_DEFINE, this allows the build
system to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Adjust some DT_INST macro as well while at it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Fix an incorrectly declared compatible and adjust some DT macros as
well.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert SYS_INIT to DEVICE_DT_INST_DEFINE, this allows the build system
to track the device dependencies and ensure that the interrupt
controller is initialized before other devices using it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
On some STM32 families (such as F4), temperature and Vbat sensor share the
same ADC channel, which can lead to conflict when reading them, and wrong
measurement can follow.
To alleviate this problem, this commit moves the setting of the common
path internal channel to the sensor drivers themselves instead of doing
it in the ADC driver.
The teardown is still done in the ADC driver, systematically, instead of
channel by channel (which has the same result).
By moving this logic in the sensor drivers, the properties temp-channel,
vbat-channel and vref-channel becomes useless and are thus removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Introduce hwinfo driver for Texas Instruments SimpleLink CC13xx/CC26xx
SOC series, with support for retrieving device's ID and cause of reset.
By default, the pre-programmed, 8-bytes length IEEE MAC address is used
for device's ID, with option ('HWINFO_CC13XX_CC26XX_USE_BLE_MAC') for
use 6-bytes length BLE MAC instead. By default, read-only values stored
in FCFG (Factory Configuration) are used but additional Kconfig option
('HWINFO_CC13XX_CC26XX_ALWAYS_USE_FACTORY_DEFAULT') is also provided,
which allows to use values from writable CCFG (Customer Configuration)
area. In all cases, device ID value is provided in big-endian which
matches what TI's UniFlash tool returns.
For reset cause, 'SysCtrlResetSourceGet()' function from TI's driver
library is used and its value is mapped to Zephyr's implementation.
Importantly, only root cause of reset is available on CC13xx/CC26xx
platform as described in MCU Technical Reference Manual ('RESET_SRC'
field in 'RESETCTL' register):
"Shows the root cause of the last system reset. More than the
reported reset source can have been active during the last
system reset but only the root cause is reported."
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Use clock control API to retrieve the module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add CAN stats for MCAN drivers.
Update MCAN drivers to use CAN_DEVICE_DT_INST_DEFINE
which initialises and registers CAN stats if enabled.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
A file just named `init.c` is not that descriptive inside of a project
that has a lot of files of already. Rename to `ethos_u.c`.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The Ethos-U driver was using IRQ_DIRECT_CONNECT. This is not what the
driver needs as this will not detect a context switch when coming out
of the isr, and this is needed as the isr will release a semaphore.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add phandle prop to reference any regulator that must
be enabled in order for the LPADC to function as intended.
Change LPADC driver to use this property if present.
LPADC on LPC55S36 depends on VREF peripheral, enable for this platform.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add binding, include header, and driver for NXP VREF IP block.
NXP VREF is an internal voltage reference generator on some SOCs
that fits well with the regulator API in zephyr.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When timer calibration for SmartBond(tm) was added, opaque type
clock_control_subsystem_t that used to have device tree ordinal
number was changed to enum to allow values that are not in device
tree (like no clock selection).
During this process counter driver for SmartBond(tm) was not updated
accordingly, resulting in wrong frequency being reported to counter
driver.
Failure could be seen when samples/drivers/counter/alarm was execute on
da1469x_dk_pro board.
With this fix counter driver uses correct type when
clock_control_get_rate is called and counter test works again.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Add an explicit include of zephyr/arch/cpu.h before fsl_clock.h so that
the Zephyr cpu definitions are parsed before the hal ones.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
PRE_KERNEL_1 is more suited for dealing with devices, so move out of
EARLY.
Verified on hardware and things seem to behave the same. Something was
changed since this was first introduced as this was not possible for
some reason.
Fixes#62627
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added ability to read contents of TMP116 configuration register by adding
an attribute get function that supports the SENSOR_ATTR_CONFIGURATION
option. Followed the same approach as the TMP108 driver. Interpretation of
the returned value is left up to the caller.
Tested using Nucleo-F401RE and Temp-Log 2 (TMP116) click board and
confirmed a read of the configuration register returned the expected
value.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
The Cat.1 STM32L1 MCUs do not provide the subsecond feature. This disable
subsecond related code for these MCUs.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
STM32 BBRAM depends on RTC to work. This changes STM32 RTC init stage to
PRE_KERNEL_1 to allow RTC driver to initialize before BBRAM driver.
Some adjustments are made so that kernel API is not used during the init
procedure.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
Modify STM32H7 SPI driver so that it updates the rx/tx
pointers correctly (depending on the frame size) when DMA
is enabled. Also, make the dummy rx/tx buffer cache-coherent.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
The way of setting a nocache region in devicetree has changed.
Adapt the H7 SPI driver to this new circumstance.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
This commit fixes an issue with the nrfx uarte driver to allow the
async and interrupt driven UART APIs to coexist on different uart
instances. As both APIs cannot be used simultaneously for a given
instance, there is no need to handle
CONFIG_UART_EXCLUSIVE_API_CALLBACKS in this driver.
Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
There was a new Kconfig for USB-C init priority that is conflicting
with currently used Kconfig for init of VBUS and TCPC.
This commit changes the names to more specific related to the subsystem
they belong to.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The SDK function ENET_SetCallback is deprecated and has
been removed in the latest SDK.
Update the driver to set the callback during Init by using
the callback config param.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
bsearch() tries to find the exact match for the key, otherwise it
returns NULL. However, here we want to find two elements our key lies
in-between. This requires some rather complicated logic that pretends
it found the exact match even if it didn't. Replace this with a simple
implementation of binary search.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
The value of n_comp is wrong for ntc-thermistor-generic. Introduce a
helper macro to compute n_comp correctly for both thermistor types.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
The pullup resistance was assumed to be the maximum ADC value. This is
incorrect when the reference ADC voltage and the thermistor pullup
voltage differ. Use the pullup_uv property from DT instead.
The equations for the thermistor resistance are also wrong. The correct
equations are (see https://en.wikipedia.org/wiki/Voltage_divider):
R1 = R2 * (Vin / Vout - 1)
for the positive-connected resistor, and
R2 = R1 * (Vin / Vout - 1)^-1
for the negative-connected resistor. These were transformed so that
they can be computed using integer math.
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
GSM_MUX and UART_MUX are being marked as deprecated.
The new modem subsystem MODEM_CMUX and MODEM_PPP
should be used instead.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
GCC format-truncation kicks in on this printk whenever the logging
configuration transforms the LOG_WRN below into a noop, and the snprintk
return argument become unused.
Fix that by switching to strncpy, fixes:
zephyrproject/zephyr/drivers/modem/hl7800.c:1786:74: warning: '%s'
directive output may be truncated writing up to 53 bytes into a region
of size 21 [-Wformat-truncation=]
reproduced with:
west build -p -b mg100 -T samples/net/telnet/sample.net.telnet
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit adds Kconfig variables to configure ADLTC2990. This commit adds
basic driver code for analog devices ltc2990 sensor.
Signed-off-by: Jilay Pandya <jilay.pandya@zeiss.com>
Rework RAM disk driver to be configured using devicetree and
support multiple instances.
This patch also removes a copy of the RAM disk driver,
tests/subsys/fs/fat_fs_dual_drive/src/disk_access_test_drv.c,
that was there for testing multiple disk drivers support.
Bonus: one SYS_INIT() less and a memory region can be exported to the
host.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit updates the modem_cellular driver to use the
new naming scheme for the modem_chat functions.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This driver only supports a single instance. This commit cleans up the
device definition and indicates this.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Assert the source clock is defined in the device tree to ensure the
reference is valid.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
The DT_INST_CLOCKS_CELL macro takes as the first argument the device
instance and not the cell index. This change correctly gets the second
index of the first device as intended.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Dom0less is Xen mode without privileged domain. All guests are created
according to hypervisor device tree configuration on boot. Thus, there
is no Dom0 with console daemon, that usually manages console output
from domains.
Zephyr OS contains 2 serial drivers related to Xen hypervisor: regular
with console shared page and consoleio-based. The first one is for
setups with console daemon and usually was used for Zephyr DomU guests.
The second one previously was used only for Zephyr Dom0 and had
corresponding Kconfig options. But consoleio is also used as interface
for DomU output on Dom0less setups and should be configurable without
XEN_DOM0 option.
Add corresponding XEN_DOM0LESS config to Xen Kconfig files and proper
dependencies in serial drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Co-authored-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Drivers should only log extra information during initialization if
debug logging is enabled. Otherwise it always clutters the console
when not required.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The fuel gauge API uses separate get/set property structs to indicate what
properties are readable or writable. This lead to duplication in property
names and potential confusion for new users of the API. See issue #61818.
In addition to above, drivers already determine at runtime if a property is
supported for read or write actions.
Join the get/set fuel gauge property structs as a single struct.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
There's no need to use APPLICATION level. Also create a custom init
level that runs late in the process (depends e.g. on SPI which runs at
high priority level, 70).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This is the final step in making the `zephyr,memory-attr` property
actually useful.
The problem with the current implementation is that `zephyr,memory-attr`
is an enum type, this is making very difficult to use that to actually
describe the memory capabilities. The solution proposed in this PR is to
use the `zephyr,memory-attr` property as an OR-ed bitmask of memory
attributes.
With the change proposed in this PR it is possible in the DeviceTree to
mark the memory regions with a bitmask of attributes by using the
`zephyr,memory-attr` property. This property and the related memory
region can then be retrieved at run-time by leveraging a provided helper
library or the usual DT helpers.
The set of general attributes that can be specified in the property are
defined and explained in
`include/zephyr/dt-bindings/memory-attr/memory-attr.h` (the list can be
extended when needed).
For example, to mark a memory region in the DeviceTree as volatile,
non-cacheable, out-of-order:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_VOLATILE |
DT_MEM_NON_CACHEABLE |
DT_MEM_OOO )>;
};
The `zephyr,memory-attr` property can also be used to set
architecture-specific custom attributes that can be interpreted at run
time. This is leveraged, among other things, to create MPU regions out
of DeviceTree defined memory regions on ARM, for example:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-region = "NOCACHE_REGION";
zephyr,memory-attr = <( DT_ARM_MPU(ATTR_MPU_RAM_NOCACHE) )>;
};
See `include/zephyr/dt-bindings/memory-attr/memory-attr-mpu.h` to see
how an architecture can define its own special memory attributes (in
this case ARM MPU).
The property can also be used to set custom software-specific
attributes. For example we can think of marking a memory region as
available to be used for memory allocation (not yet implemented):
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_NON_CACHEABLE |
DT_MEM_SW_ALLOCATABLE )>;
};
Or maybe we can leverage the property to specify some alignment
requirements for the region:
mem: memory@10000000 {
compatible = "mmio-sram";
reg = <0x10000000 0x1000>;
zephyr,memory-attr = <( DT_MEM_CACHEABLE |
DT_MEM_SW_ALIGN(32) )>;
};
The conventional and recommended way to deal and manage with memory
regions marked with attributes is by using the provided `mem-attr`
helper library by enabling `CONFIG_MEM_ATTR` (or by using the usual DT
helpers).
When this option is enabled the list of memory regions and their
attributes are compiled in a user-accessible array and a set of
functions is made available that can be used to query, probe and act on
regions and attributes, see `include/zephyr/mem_mgmt/mem_attr.h`
Note that the `zephyr,memory-attr` property is only a descriptive
property of the capabilities of the associated memory region, but it
does not result in any actual setting for the memory to be set. The
user, code or subsystem willing to use this information to do some work
(for example creating an MPU region out of the property) must use either
the provided `mem-attr` library or the usual DeviceTree helpers to
perform the required work / setting.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add wrapper functions for Xen memory managment hypercall. They can be
used for unprivilaged Zephyr guest initialization and for domain
management, when Zephyr is used as Xen Domain 0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds possibility to call hypervisor HVM parameter functions
for specified domain (instead of only DOMID_SELF). It is needed for
configuring domains, that were created from Zephyr control domain.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Add Xen domctl API implementation for Zephyr as control domain.
Previously Zephyr OS was used as unprivileged Xen domain (Domain-U),
but it also can be used as lightweight Xen control domain (Domain-0).
To implement such fuctionality additional Xen interfaces are needed.
One of them is Xen domain controls (domctls) - it allows to create,
configure and manage Xen domains.
Also, used it as a possibility to update files copyright and licenses
identifiers in touched files.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds interface for evtchn allocation that can be used by
privilaged domain. Domain 0 can specify both dom and remote_dom
parameters for hypercall, where in others domains dom should be always
DOMID_SELF. It is needed for creating pre-defined channels during
domain setup in Zephyr Dom0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Xen-related Kconfig options were highly dependand on BOARD/SOC xenvm.
It is not correct because Xen support may be used on any board and SoC.
So, Kconfig structure was refactored, now CONFIG_XEN is located in
arch/ directory (same as in Linux kernel) and can be selected for
any Cortex-A arm64 setup (no other platforms are currently supported).
Also remove confusion in Domain 0 naming: Domain-0, initial domain,
Dom0, privileged domain etc. Now all options related to Xen Domain 0
will be controlled by CONFIG_XEN_DOM0.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Move memory mapping of Xen node to Grant Table driver system init
function. After moving mapping we don't need anymore records of
xen-xen node into 'mmu_regions' array, so they were deleted from
all SoCs: Rcar Gen3/Gen4 and XenVM.
We need at least 16M of virtual address space to map memory of Xen
node, so the virtual memory sized has been increased to 32 MB, it
should be enough for basic use-cases and mapping of 16M mem region
of Xen node.
Unfortunately, after moving we also need to increase number of XLAT
tables. The previous code was more efficient if we talking about
usage of XLAT tables, because it mapped grant tables using a higher-
order table that allows mapping blocks of 2MB. And after the changes
is maps every 4KB page, so we need more XLAT tables.
Increase number of grant frames, it is needed to sync stage 1 and stage 2
memory mappings, previously we map only one page on stage 2 and further
usage of unmap regions can cause MMU translation errors.
Perform mapping stage 1 before mapping for stage 2 (add to physmap),
because right after stage 1 we can try to access memory and if it is
unmap in stage 2, error will be received during translation.
Note: Xen Grant Table driver doesn't use Zephyr Device Model.
Authored-by: Mykola Kvach <mykola_kvach@epam.com>
Co-authored-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add RSU UPDATE function id in sip_svc to set the RSU UPDATE
ADDRESS in sip_svc_v2 for Intel Agilex SOCFPGA platform.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
This commit adds support for the ATMEL HSMCI peripheral
for the SAM4E MCU series, enabling native SD card support.
Signed-off-by: Vincent van Beveren <v.van.beveren@nikhef.nl>
Add all available instances of the ADC series
MAX11102-MAX11117 to the ADC shell.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add a MBOX driver wrapper around the NXP MU, simular to
the existing wrapper around the NXP S32 MRU. This allows Zephyr IPC
to work based on the MU, on a number of NXP boards.
Also update the SHA of NXP HAL to enable the Kconfig for this driver.
Signed-off-by: Yicheng Li <yichengli@google.com>
The ipm_cavs_idc driver was used with the old intel_s1000
board which has been removed. On the audio DSP side,
the IDC under CAVS is being handled by SoC layer code.
Now the ipm_cavs_idc is not needed anymore for anything.
So remove it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Support connecting different display for each SPI and I2C
at the same time.
In a case like DTS below.
```
&spi1 {
ssd1306_spi: ssd1306@0 {
compatible = "solomon,ssd1306fb";
...
};
};
&i2c0 {
ssd1306_i2c: ssd1306@3c {
compatible = "solomon,ssd1306fb";
...
};
};
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Determine sh1106 from the `compatibility` value instead of
the SSD1306_CONTROLLER_TYPE setting.
Change the settings in `boards/shields/ssd1306/sh1106_128x64.overlay`
to follow this change.
Remove the SSD1306_CONTROLLER_TYPE from its Kconfig.defconfig,
and set the `compatibility` to `sinowealth,sh1106`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
When multiple devices are connected, the SSD1306_REVERSE_MODE setting
cannot switch for each device.
Add an equivalent setting to the devicetree properties to replace it.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Store properties defined in dts in ssd1306_config's fields.
And replace code that uses DT_INST_PROP (0, ...) by config properties.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Split the native tty serial driver in a top and bottom to enable using it
with embedded libCs.
Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
Update single phase bit in register when changing data->qdec_config.
Otherwise the changed settings has no effect.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
The Cadence I3C was not building with CONFIG_I3C_USE_IBI, this fixes
the build and will give a small code size reduction when enabled.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
If a transfer happen in rapid sucession. It was possible for
the core to not be ready to accept another command. Poll on
the idle status bit until the core is ready to accept new data.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Due to a bug, after a completed transfer happen. Only the first
command response error was read. This fixes the issue so all
commands are read for if an error occurred.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The current implementation uses both, host and card capabilites to derive
the maximum bus width to be used. However, in cases where a MMC device is
not connected to the host via shdc using the full bus width of 8 lines,
device initialization fails. Introducing the `bus-width` property
circumvents this by reducing the host bus capabilites and forcing
communication with the MMC device using 1, 4 or 8 lines.
Signed-off-by: Mourad Kharrazi <mourad.kharrazi@ithinx.io>
Fix another i2c_dump_msgs_rw:
/drivers/fuel_gauge/bq27z746/emul_bq27z746.c:282:26: warning: passing
argument 1 of ‘i2c_dump_msgs_rw’ from incompatible pointer type
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Zephyr version 3.4 changed the SPI context structure and macros
which broke the logic in the MEC172x SPI driver configuration API.
This was not detected by CI due to no tests for this driver are in
the tree. The driver now behaves like most other SPI drivers requiring
a different configuration structure pointer to be passed if any item
in the configuration changes.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Enable PM on STM32 entropy driver.
Only supports PM_DEVICE for now, runtime support will be added later.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Regulator voltage setting is not applied if the device output
is already configured for the requested voltage.
This change is needed to ensure correct device behaviour.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
According to the reference manual the overdrive should be enabled after
setup of the sysclock (HSE or HSI) and enabling the PLL (PLLON).
The flash latency should be enabled after the PLL has been turned on,
but before switching the system clock to the PLL.
Signed-off-by: Max van Kessel <max_van_kessel@msn.com>
This commit follows the parent commit work.
This commit introduces the following major changes.
1. Move all directories and files in 'include/zephyr/arch/arm/aarch32'
to the 'include/zephyr/arch/arm' directory.
2. Change the path string which is influenced by the changement 1.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Warning callback by default is configured to happen
at the same time as reset, which results in unexpected
behavior from the point of view of Zephyr API. Return
-ENOTSUP from install_timeout if trying to set up
callback with 0 warning time, and add kconfig to configure
the warning time.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
STM32F2 and STM32L1 Cat. 1 only provide the coarse calibration feature
which is not supported by the code yet.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
This replaces the verbose LL_RTC_CONVERT_BCD2BIN and LL_RTC_CONVERT_BIN2BCD
by the bcd2bin and bin2bcd Zephyr provided equivalent
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
This adds mutex a lock in rtc_stm32_set_time and rtc_stm32_get_time to
ensure consistent data reading. Also performs register reading in a single
operation in rtc_stm32_get_calibration for the same reason.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
LL_RTC_Init() internally uses LL_RTC_EnterInitMode() wich uses a blocking
while loop. This rewrite uses the less CPU time wasteful local
rtc_stm32_enter_initialization_mode() instead. As a side effect
LL_RTC_InitTypeDef in rtc_stm32_config is not needed anymore.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
Calling LL_RTC_Init causes the RTC to stop while being configured thus
inducing time drift. This commit avoids doing it at each reset if the RTC
is already properly configured.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
As shadow registers bypass is enabled, an erroneous reading may occur at
each day or second increment. This commit fixes this issue.
Signed-off-by: Johan Lafon <johan.lafon@syslinbit.com>
The redefinition of ZTEST_DMEM in the SBS emulator is unused. We ought to
remove it as it's dead code.
Remove the unused #define ZTEST_DMEM.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In order to ease user thread testing with fuel gauges, enable syscalls for
the fuel gauge emulator backend API.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Manufacturer id is skipped when reading jedec_id, due to wrong
address mode.
Before: flash_stm32_ospi: Jedec ID = [60 20 00]
After: flash_stm32_ospi: Jedec ID = [ef 60 20]
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Change introduces a new configuration option that can be used to disable
GPIO interrupt support to reduce memory footprint.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Configure the Number of Completed Packets event threshold to 1, so the
SiLabs Bluetooth controller will always send the Number of Completed
Packets HCI event to the host, even for small numbers of transmitted
packets.
Fixes#62279
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
Make HCI driver compatible to the updated versions of the
EFR32 Bluetooth library BLOBs consisting of:
* libbluetooth_controller
* libbgcommon
* librail
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
Use DEVICE_DT_INST_DEFINE instead of DEVICE_DEFINE to declare the device
structure. This ensures that the device gets an ordinal and is
initialized before any device depending on it.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Initial version of Infineon CAT1 SPI Driver supporting synchronous
and asynchronous data transfer API
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Adds support for forcing XIP support at boot time, and reduces the
init priority of the driver so that it inits earlier.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
ST7735S requires the COLMOD command be repeated as part of writing
pixels, otherwise it goes back to some kind of default which is likely
wrong.
ST7735S works correctly after this plus the previous two commits; tested
on STM32L462 + KD0096FM.
Signed-off-by: David Lamparter <equinox@diac24.net>
Use a continuous transaction with CS kept low for the entire batch of
row address, column address and actual pixel data write. This is
required by ST7735S and shouldn't hurt elsewhere.
Signed-off-by: David Lamparter <equinox@diac24.net>
When doing a TX-only SPI operation, the RX not empty flag will never get
set, thus this will just hang forever.
Found/tested on STM32L462 trying to drive some WS2812 RGB LEDs.
Signed-off-by: David Lamparter <equinox@diac24.net>
Add driver for the TI TCAN4x5x series of CAN controllers. These CAN
controllers are based on the Bosch M_CAN IP and interfaced via an SPI bus.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Create dac_mcxu_lpdac.c file to implement mcux lpdac, add binding for
the mcux lpdac, update Kconfig.mcux and CMakeLists.txt file to support
mcux lpdac.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Reset the device on initializing if reset-node is available in dts.
`snps,desingware-i2c` does not define reset-node itself.
Add more of an element that inherits `reset-device.yaml` to
the `compatible` section to allow defining the reset-node
for using this feature.
For example.
```
compatible = "reset-device-inherit-node", "snps,designware-i2c";
```
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This commit resolves an internal dependecy between GET_DIRECTION and
GET_CONFIG configuration. GET_CONFIG api is internally needed by
GET_DIRECTION api.
Signed-off-by: Martin Kiepfer <m.kiepfer@teleschirm.org>
The Nuvoton NCT38xx is a multi-function device providing a TCPC
controller and a I/O expander (GPIO driver). Add a multi-function
driver to manage exclusive access to the device.
Tested with "twister -T tests/drivers/build_all/gpio".
Signed-off-by: Keith Short <keithshort@google.com>
the sam xdmac driver does not yet implement the
get_status() function. with this commit the function
will be implemented. Fixes#62003
Signed-off-by: Sven Ginka <sven.ginka@gmail.com>
Seems like the SSD1306 controller needs a bit of time after power up
before it can take i2c commands. This causes problems with
microcontrollers that have no other delays in the startup sequence, like
rpi_pico.
There's currently no good way of modeling this in Zephyr right now, and
there's also no clear indication of how much time the device needs in
the datasheet that I could find, but it seems like 10ms is enough for
that to start reliably so add a delay in the ssd1306 init function to
ensure that at least that time has passed from system power up.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Remove `threshold-reg-offset` DT property and implement them with static
inline functions in `reg_def.h`
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add `thr-sel` prop. to select the relevant threshold register for adc
comparator since there're two adc modules in npcx4 series.
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add multi-device support in npcx adc driver since there is more than one
adc module in npcx4 series. And each adc's reference voltage might be
different, this CL introduces the `vref-mv` prop. to select its own
reference voltage.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Kate Yen <htyen@nuvoton.com>
Only provide implementations for optional operations if needed. This
patch deletes quite a few dummy `pin_interrupt_configure` ops (now
optional), and adjusts ifdeffery on some drivers so that optional ops
are only provided if they implement real functionality.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This change allows to have GPIO interrupts configured
that will work while chip enters low power modes where
PD_COM is turned off.
PDC controller can wake up system on GPIO changes even when
PD_COM is off.
This is done by adding PDC entries that will wakeup Cortex-M33
at the same time when WAKEUP controller is programmed to
handle GPIO state changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Hardware supports only one edge for GPIO interrupt.
This adds software implementation that hides hardware restriction.
With this change user code can use GPIO_INT_TRIG_BOTH and does not
have to do it in application code.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Init level for GPIO drivers is set PRE_KERNEL_1.
Smartbond(tm) driver had it set to POST_KERNEL by accident.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Fix the whole v_empty setting code, this was using a wrong scaling
factor, but also incorrectly clearing the recovery voltage part of the
register.
Change the code to read the previous value and mask out the bits not
used by VE.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Introduce I2C target transfer using the PIO mode. Add an option
"target-pio-mode" in the yaml file, determined by the DTS, to dictate
whether I2C target transfer uses the PIO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Disable the timeout setting when both the clock and data are
in a low state. This allows for I2C host clock stretching
without a timeout limit.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
IT8XXX2_I2C_STR is a register of read-only, non-writable to clear.
Here we can set hardware reset bit in the IT8XXX2_I2C_CTR register
to clear the status of IT8XXX2_I2C_STR.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The old acpi implimentation is replaced with acpica interface
and updated x86 arch porting with the new interface.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Previously the pwm capture only support capturing on channel 1
and 2, because the slave mode controller was used, which uses
the signal TIxFP which is not available for channel 3 and 4.
This commit adds optional support for four channel capturing by
changing the method of capturing PWM signals to not use the
slave mode controller to reset the counter register. Instead the
counter is reset in the ISR. This will result in a slight loss
of accuracy but is still within an acceptable range.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This commit adds option to dump i2c messages of only specified
devices. It makes it easier to debug communication of specific
i2c device instead of logging all i2c communication.
The filter of devices is specifiec in device-tree using the
node with "zephyr,i2c-dump-filter" compatible string.
Example of device-tree node:
i2c-dump-filter {
compatible = "zephyr,i2c-dump-filter";
devices = < &display0 >, < &sensor3 >;
};
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the format of printed messages to align the
following strings and make it more readable.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit changes the parameter of i2c_dump_msgs function from
string name to pointer to the device structure.
It allows for comparison of device pointers and allow to use
the printed device name in i2c shell commands.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
LOG_LEVEL > LOG_LEVEL_OFF guards were protecting a couple of function
declarations. These functions were being used without taking this fact
into consideration. These guards are now applied around the stack_stats()
function only.
Signed-off-by: Diogo Correia <diogo.correia@fraunhofer.pt>
This introduces PWM driver with supporting PWM output
APIs based on NXP S32 EMIOS peripheral. This supports
three mode: OPWFMB, OPWMCB and OPWMB.
OPWFMB uses internal counter, the new period and duty
cycle takes effect immediately.
OPWMCB and OPWMB use external counter as timebase, changing
PWM period at runtime will impact to all channels share the
same timebase. Also the new period and duty cycle take effect
in next period boundary of the timebase
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This PR adds a misc driver for NXP S32 eMIOS peripheral.
eMIOS provides multiple unified channels (UCs), there are
several channels can be used as reference timebase
(master bus) for other channels. At this time, the
driver does initialize global configuration for eMIOS
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
This commit improves the usage of the bus pipe (connected
to UART) to only open it when the modem is actually
powered and ready, not when leaving the idle state. This
ensures the pipe is flushed before sending the init script,
and re-enables the UART driver if it is disabled due to
errors.
While building a test platform based on the nRF9160 and a
Quectel BG95, it was discovered that the nRF9160 correctly
throws UART errors if the RX is enabled while the UART RX
line is low (which was due to the modem being powered
down).
The improvements should also help help remove the
"<wrn> modem_chat: receive buffer overrun" warning which
would occur during startup as the pipe was opened, but
nothing was receiving the data, causing the buffer to
overflow.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Add support for device power management. When the sensor
is not powered, the fetch function will fail. When the
sensor is not connected to a power domain, it will behave
as usual.
Signed-off-by: Albert Jakieła <aja@semihalf.com>
`CONFIG_BT_L2CAP_TX_MTU` drives the maximum supported MTU on a Bluetooth
connection, but the SPI backend also imposes its own hidden limits.
Display a warning if a value is chosen that can result in failures to
send. This is done here instead of as a range on `BT_L2CAP_TX_MTU` as
ranges on that symbol are already defined in terms of software features,
which would conflict with this check.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The eswifi spi driver sets up spi buffer length as number of frames,
but the length shall be number of bytes. Because eswifi use 16 bit as
frame size, so this turns out reading and writing half of data and
fails to sending any at command request and getting any responds from
eswifi module.
Fix it by setting up length as number of bytes.
Fixes#62056
Signed-off-by: Chien Hung Lin <chienhung.lin.tw@gmail.com>
Fix a shadow variable build error:
dmic_nhlt.c: In function 'dai_dmic_write_coeff':
dmic_nhlt.c:57:78: error: declaration of 'base' shadows a global
declaration [-Werror=shadow]
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Created set of new functions for configure fir coefficients with support
for packed format. This allowed to make the dai_dmic_set_config_nhlt
function simpler.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Added reading of a necessary register values in
dai_nhlt_dmic_dai_params_get function to simplify its parameter list. The
code that calculates dai_params has been moved to it to simplify the
dai_dmic_set_config_nhlt function.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
More verbose variable pdm_idx was used instead of n. The series of
references to the array of pdm base addresses has been replaced with
a pdm_base variable.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
