Move the BT_RX_STACK_SIZE default out of the HCI driver Kconfig
and into the common Espressif defconfig, next to the other
Bluetooth subsystem defaults.
The BT_ESP32 block is now shared by both architectures instead of
being duplicated under RISCV and XTENSA, so the stack default also
applies to the Xtensa targets.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Report errors returned by pinctrl_apply_state() and
i2c_stm32_runtime_configure() in i2c_stm32_recover_bus() that were
not.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Bitbang bus recovery sequence supports only standard and fast speeds,
not higher ones. Force fast speed for the recovery sequence unless
the bus runs at standard speed in which case calling i2c_bitbang_init()
is enough.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Restore the bus current speed when exiting bus recovery, not the
speed initially set from the DT.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Correct the STM32 I2C bus recovery sequence in the non-RTIO driver
where bus semaphore (acting as a mutex) was taken twice before this
change. Fix that by taking the semaphore outside of the
i2c_stm32_runtime_configure() functions.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Header file include/zephyr/sys_clock.h is deprecated since commit
84fbdcb06d ("include: zephyr: Deprecate include/zephyr/sys_clock.h")
and will be removed someday. Update Zephyr file tree to include
include/zephyr/sys/clock.h instead.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Explicitly set the addressing type during target mode registration.
In the DW implementation, the addressing type is configured
independently for controller and target modes, so this change also
removes setting of the target mode address type during controller
mode configuration.
Tested on Realtek rts5915 board with an EEPROM target enabled.
Signed-off-by: Keith Short <keithshort@google.com>
Add missing dependencies on the HAL module for sensors that use the HAL
headers. This fixes compile time errors for `build_all` tests downstream
that don't have the HAL checked out.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add missing dependencies on the HAL module for sensors that use the HAL
headers. This fixes compile time errors for `build_all` tests downstream
that don't have the HAL checked out.
Signed-off-by: Jordan Yates <jordan@embeint.com>
If an i2c transaction got past setting the need_setup but didn't
complete for some reason the i2c driver would send the next transaction
to that address regardless of what was passed into the driver. Update the
i2c_dw_transfer error handler to reset need_setup to true since the failed
transaction is no longer active.
Also adds a check in setup to verify that the target address is the address
that is setup, if not require setup.
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Add a stub configure callback to the native PTY UART driver when
CONFIG_UART_USE_RUNTIME_CONFIGURE is enabled.
The stub accepts valid configuration requests without applying any UART
settings and returns -EINVAL when the configuration pointer is NULL.
This enables applications that require the runtime UART configuration API,
such as Modbus RTU, to use the native PTY UART driver.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Override FM_MutexTake and FM_MutexRelease function definitions to comply
with the changes introduced in STM32CubeWBA v1.10.0.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Add IMX_CCM_ENC1/2/3/4_CLK macros to imx_ccm_rev2.h and handle them
in the CCM rev2 driver's clock-enable and rate-query callbacks. The
ENC clock gate maps to kCLOCK_Enc1+instance (LPCG 118-121); the rate
root is kCLOCK_Root_Bus_Wakeup per RM Table 136.
Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
Register addresses are forced to bus-byte-order for I2C transfers, and
product IDs are converted from the little-endian representation read
from the device. This keeps the values correct on both little-endian and
big-endian systems.
Signed-off-by: Mingzong Zhao <mingzong.zhao@outlook.com>
xpt2046_isr_handler() unconditionally removes the GPIO callback before
submitting the work item, and the gpio_add_callback() at the end of
xpt2046_work_handler() is the only place it is ever registered again. The
averaging loop returns early when a SPI transfer fails, jumping over that
call.
gpio_manage_callback() really unlinks the node, so the pin interrupt stays
armed but is dispatched to an empty callback list, and nothing else - no
retry, timer or PM hook - ever registers it again. A single transient
-EIO or -EBUSY from a shared SPI bus while the user is touching the panel
therefore leaves the touchscreen permanently silent until the next reboot.
If a touch was in progress, the 100 ms delayed work emits one last
BTN_TOUCH 0 and nothing after that.
Branch to the re-registration instead of returning, so the callback is
restored on every exit path.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
gt911_process() tracked the previous scan in function-scope statics:
static uint8_t prev_points;
static struct gt911_point_reg prev_point_reg[...];
GT911_INIT is expanded by DT_INST_FOREACH_STATUS_OKAY, so every panel
shares one snapshot even though gt911_process() is passed the device it
is working on.
With two goodix,gt911 nodes the release loop compares one device's
current point ids against the other's cached points, and the memcpy
overwrites the snapshot with whichever ran last. A release on the first
panel then carries the second panel's coordinates, and the second panel's
still-active touch is erased from the cache, so its real lift finds
prev_points == 0 and emits no release at all, latching BTN_TOUCH=1. This
is aliasing rather than a data race, so workqueue serialization does not
help.
Move both into struct gt911_data. struct gt911_point_reg has to be
defined before struct gt911_data to be usable as a member.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:fable-5
Add a shell command that allows enabling or disabling SMBus Packet
Error Checking (PEC) at runtime for a given SMBus device. This is
useful for testing and debugging PEC-related transactions without
having to modify and rebuild application code.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
PEC can be enabled through smbus_config and is supported by all SMBus
protocols except Quick.
In addition, hardware PEC is not supported for Process Call and Block Read
transactions in FIFO mode. Software PEC is calculated instead.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use the vcpu argument when issuing XEN_DOMCTL_getvcpucontext and
XEN_DOMCTL_setvcpucontext. The wrappers already accept a target vCPU,
but always forwarded vCPU0 to Xen.
This lets Dom0 callers get or set the context of secondary vCPUs in SMP
domains.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5 cpp-code-map
Adjust base_timestamp_ns backward from the trigger timestamp by
(N-1)*period so it reflects the time of the first FIFO sample,
matching the lsm6dsv16x reference implementation.
Fixes: #98720
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
(cherry picked from commit 2e9f16f337e5ae2748257871328d2bc29f442bd5)
MISRA C:2012 Rule 8.2 requires every parameter in a function type to be
named, including the parameters of function pointer parameters.
The XMC4xxx GPIO interrupt helper and the XMC7200 system interrupt
helper declared their callback parameters with bare types.
Name them after the arguments the documentation or the
definitions already use. No functional change.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add support for tracking heavy sleep duration on the RTS5912/RTS5915
using the low-frequency RTMR (RTOS Timer) 32KHz clock domain.
- Expose rts5912_clock_capture_low_freq_timer(),
rts5912_clock_compensate_system_timer(), and
rts5912_clock_get_sleep_ticks() in soc_clock.h.
- Capture timer reading prior to WFI in rts5912_heavy_sleep() and
accumulate elapsed sleep cycles upon wake-up after clock restoration.
Signed-off-by: Keith Short <keithshort@google.com>
Assisted-by: Antigravity:gemini-1.5-pro
When the RTOS timer (RTMR) expires and reaches 0, the hardware sets the
interrupt status bit (RTOSTMR_INTSTS_STS_Msk). If rtmr_get_counter() is
called while interrupts are locked (or before rtmr_isr() clears INTSTS),
counter == 0 is sampled.
Previously, rtmr_get_counter() unconditionally replaced counter == 0
with previous_cnt (assuming 0 meant an unlatched restart). This caused
sys_clock_cycle_get_32() to compute previous_cnt - cur_cnt = 0 elapsed
cycles, leading to a backward jump in the cycle count.
Fix this by checking !(RTMR_REG->INTSTS & RTOSTMR_INTSTS_STS_Msk) so
that a genuine 0 count from an expired timer is preserved until the ISR
runs.
Without this fix, the new test_timer_monotonic_irq_locked fails. With
this fix, test_timer_monotonic_irq_locked passes.
Also verified no regressions on the rts5912_evb board:
* kernel.tickless.concept
* kernel.poll.minimallibc
* kernel.poll
* kernel.timer.monotonic
* kernel.timer.timepoints
Signed-off-by: Keith Short <keithshort@google.com>
Assisted-by: Antigravity:gemini-1.5-pro
The ti_dmtimer driver used to use the first enabled compatible timer
instead of honoring the chosen zephyr,system-timer property. This has been
fixed.
Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Enable FIFO_TMST_FSYNC_EN in FIFO_CONFIG4 so the sensor inserts a
16-bit hardware timestamp into every 20-byte FIFO packet. Set
TMST_RESOL=1 (16us/tick) to support batch spans up to ~524ms.
In the decoder, anchor the batch to the host IRQ time via the last
packet's hardware timestamp, then compute base_timestamp_ns and
per-sample timestamp_delta using the signed 16-bit delta between
packet timestamps. This handles wraparound naturally and gives exact
inter-sample timing without assuming a uniform ODR.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
In i3c_sec_get_basic_info() and i3c_sec_i2c_attach(), a descriptor is
allocated from the mem-slab pool when a DEFTGTS-reported device is not
already in the device list. If the subsequent attach (or temporary detach)
fails, free that pool descriptor instead of leaking the slot. Descriptors
found in the static device list are left untouched via the in_pool check.
Also zero-initialise the temporary descriptor in i3c_sec_get_basic_info()
so its unused fields are not garbage stack values when passed to attach.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
i3c_sec_get_basic_info() allocates a descriptor from the pool when a
target reported via DEFTGTS is not already in the device list. Set the
bus reference and static address on that allocated descriptor. Previously
the bus was left unset and the static address was written to the
temporary descriptor that is immediately detached and discarded.
Also drop the redundant pointer cast when setting the bus reference in
i3c_sec_i2c_attach(); the bus member is a pointer-to-const and assignable
directly.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When a controller's do_daa() assigns a dynamic address it now attaches
the descriptor via i3c_attach_i3c_device() for both DTS and mem-slab
(dynamically discovered) targets, so hot-joined devices appear on the
runtime device list (e.g. in `i3c info`).
i3c_dev_list_daa_addr_helper() now takes the controller device and derives
the address slots and device list from it. For descriptors newly allocated
from the mem-slab pool it sets the bus reference and PID so the device is
tracked and identifiable on the bus.
Drivers updated: i3c_mcux, i3c_stm32, i3c_npcx, i3c_max32, i3c_renesas_ra,
i3cm_it51xxx.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Extract the known-target handling from cdns_i3c_do_daa() into
cdns_i3c_daa_attach_known_target() to reduce nesting depth and
fix DEEP_INDENTATION compliance warnings.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
After i3c_bus_rstdaa_all() detaches all I3C devices from the slist,
a subsequent ENTDAA finds known devices by PID but their descriptors
are no longer on the slist. Without re-attaching, the descriptors
become ghosts -- they have a DA but aren't tracked by the bus.
Add i3c_attach_i3c_device() and check if -EALREADY to the
known-target path of do_daa in all I3C controller drivers:
- i3c_stm32
- i3c_mcux
- i3c_npcx
- i3c_max32
- i3c_renesas_ra
- i3cm_it51xxx
- i3c_cdns
The dw driver already handle this.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When i3c_bus_setdasa() attaches a device before sending the SETDASA
CCC and the CCC fails, the device is left attached without a valid
DA on the wire. Move the detach-on-failure into i3c_bus_setdasa()
itself so cleanup is handled at the source, and remove the now
redundant detach logic from prepare_setdasa.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
i3c_bus_setdasa() already checks whether the requested address is
free and returns an error if not. The pre-check in prepare_setdasa
duplicated this and added a detach-on-conflict path, but the error
handler after the setdasa call already detaches on any failure.
Remove the redundant check to simplify the flow: setdasa is called
directly, and its error path handles address conflicts along with
any other failure.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
i3c_addr_slots_init() attached all I3C devices at boot, but
i3c_bus_init() immediately calls i3c_bus_rstdaa_all() which detaches
them all. The devices are then re-attached during the address
assignment phase (setdasa, setaasa, or entdaa), where address
conflicts are detected by i3c_attach_i3c_device().
Remove the redundant attach loop to avoid the wasted attach/detach
cycle. I2C device attachment is kept since those are not affected
by rstdaa.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The Cadence I3C IP does not allow the controller to assign a specific
dynamic address during ENTDAA — it picks the next address from the
pre-programmed RR slots. When a device descriptor has init_dynamic_addr
set (from DT) and ENTDAA assigns a different address, issue SETNEWDA
to move the target to the preferred address.
If SETNEWDA fails (e.g. the preferred address is already in use), log
a warning and keep the ENTDAA-assigned address — the device is still
functional.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When a descriptor carries a dynamic address that no longer matches
any active RR slot (e.g. after detach without RSTDAA, or before DAA
has run on this address), the lookup fails with -EINVAL and the
subsequent attach fails.
Add a fallback: if no active RR matches the requested DA, allocate
a fresh free slot. The caller (attach, SETDASA, SETNEWDA) will
reprogram the RR with the correct DA before issuing any transfer.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
i3c_bus_setaasa() iterated the attached-devices slist to set DA = SA.
After i3c_bus_rstdaa_all() detaches all devices, the slist is empty
and setaasa silently did nothing.
Fix by walking the static dev_list from driver config instead, and
attaching each device that got a DA assigned. This ensures the
rstdaa -> setaasa flow works correctly.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
i3c_bus_setdasa:
- Attach the device to the controller's RR table before sending the
CCC so the controller can address it. Previously the attach/reattach
happened after the CCC, which fails on controllers (e.g. Cadence)
that need the device in the RR to issue a direct CCC.
- After a successful CCC, reattach if the assigned DA differs from SA.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The previous implementation only cleared dynamic_addr and freed the
address slot, but left the descriptor on the attached-devices slist
and the controller-side RR slot allocated. This caused two problems:
1. Address slot leak: i3c_detach_i3c_device() uses dynamic_addr to
know which slot to mark free. Clearing dynamic_addr before detach
meant detach freed slot 0 (or static_addr) instead of the real DA.
Each rstdaa+daa cycle leaked one address, eventually exhausting
the pool.
2. Use-after-free: pool-allocated descriptors (from i3c_device_desc_alloc)
are freed inside i3c_detach_i3c_device(). Writing to desc->dynamic_addr
after detach would access freed memory. Check i3c_device_desc_in_pool()
before the post-detach write; pool-allocated descs don't need the
clear since the entire struct is freed.
Fix by calling i3c_detach_i3c_device() first (which properly releases
the address slot using the current DA and frees the RR), then clearing
dynamic_addr only for static (non-pooled) descriptors.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Make the detach helpers report -EALREADY (instead of the generic
-EINVAL) when the target is not in the attached device list. This
mirrors the attach helpers and gives callers a single, specific
"already in the requested state" code to tolerate, rather than a
generic -EINVAL that could collide with a real failure returned by a
driver's detach callback.
While here, drop the redundant sys_slist_is_empty() guard:
sys_slist_find_and_remove() already returns false for an empty list,
so the explicit emptiness check adds nothing.
Also correct the attach/detach @retval documentation to match the
codes actually returned (-EADDRNOTAVAIL and -EALREADY instead of
-EINVAL).
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
The Provisioned ID (PID) is a 48-bit field per the MIPI I3C
specification. Some devicetree entries may carry extra bits in
the upper 16 bits of the 64-bit pid field (e.g. a PID_TYPE hack
bit for 0x0000 vendor). Mask both sides of the comparison to 48 bits
so i3c_dev_list_find() matches correctly regardless of upper-bit
contents.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Whether a secondary-controller register physically exists is fixed at
RTL synthesis by HW_CAPABILITY[DEVICE_ROLE_CONFIG] (IC_DEVICE_ROLE),
not by the boot mode reported in DEVICE_CTRL_EXTENDED[DEV_OPERATION_MODE]
(the source of is_secondary). Gating the writes on is_secondary skipped
the registers on a dual-role (SEC_MASTER) part that boots as controller,
even though the registers exist, and read DEVICE_CTRL_EXTENDED (0xb0) on
a target-only part where it is not implemented.
Read DEVICE_ROLE_CONFIG once at init, ASSERT it against the
CONFIG_I3C_CONTROLLER / CONFIG_I3C_TARGET selection, derive is_secondary
from the role (only reading DEV_OPERATION_MODE for the dual-role case),
and select each register by role:
- IBI_SIR_REQ_REJECT (0x30) / IBI_MR_REQ_REJECT (0x2c): written only
for a Secondary Controller (role == SEC_MASTER). Per databook
Table 2-1, a Controller-Only part rejects SIR/MR via the DAT entry,
so it must not touch these registers
- BUS_AVAILABLE_TIME (0xd4[31:16]) and
BUS_IDLE_TIMING (0xd8) : 1 < role < 5
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Assisted-by: Claude:claude-opus-4-8
Driver never configured IBI_DATA_THLD, leaving it at the
IP-configuratble reset value, which is 0 on some integrations
and silently breaks IBI reception, since the spec requires a
minimum value of 1 (1 dword). Explicitly program it to 0x01.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The SSP_DMA_TRANSMISSION_START/STOP case fell through into
SSP_DMA_ALWAYS_RUNNING_MODE, overwriting the expected size with
sizeof(struct ssp_intel_run_ctl) (4 bytes) instead of
sizeof(struct ssp_intel_tr_ctl) (24 bytes). A well-formed transmission
control TLV then failed the size != aux_tlv->size check and aborted the
whole config parse. Add the missing break.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
(cherry picked from commit 5072a10a03b10ee5cf7495b2d7c346d96a337675)
Extend the TI BQ24295 battery charger driver to support additional
BQ2429x family devices.
Introduce variant-specific configuration to handle differences in
register fields and parameter ranges while maintaining a common driver
implementation across the supported devices.
Signed-off-by: Priyadharsan Saravanan <priyadharsan@sacrasys.com>
Create a driver implementation for the battery charge controller
TI BQ24295.
The driver supports enabling and disabling charging, configuring charge
current and charge voltage limits at initialization and runtime, and
setting input current regulation.
It also provides charger status and fault reporting through the Zephyr
charger API.
Signed-off-by: Priyadharsan Saravanan <priyadharsan@sacrasys.com>
