Commit graph

24538 commits

Author SHA1 Message Date
Sun Amar
252f1b8e0d gecko pwm: add pwm driver for the gecko.
pwm driver + Kconfig and Cmake files for the
efr32 soc family.

Signed-off-by: Sun Amar <sun681@gmail.com>
2021-04-02 18:45:33 -04:00
Pieter De Gendt
7f46a59a42 drivers: memc: Introduce i.MX RT FlexSPI HyperRAM driver
Add the FlexSPI HyperBUS driver to support HyperRAM external
devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-02 10:36:22 -05:00
Pieter De Gendt
acca3c126c mcux flexspi: move bus driver to drivers/memc
Initially the flexspi device only supported a flash driver for
external NOR flash. As the controller supports HyperBus devices,
which can be either volatile or non-volatile, the driver iss moved
to drivers/memc.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-02 10:36:22 -05:00
Corey Wharton
e3c94d381a driver: sensor: Add support for BMP388 pressure sensor
Adds support for Bosch's BMP388 pressure sensors connected either
by a I2C or SPI bus.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2021-04-02 08:06:46 -05:00
Kumar Gala
8cae466100 drivers: pinmux: remove drivers/pinmux/pinmux.h
The file is only really used on STM32 SoCs so we can move the contents
that are relevant into pinmux_stm32.h and remove the file.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-02 07:42:18 -04:00
Ryan Erickson
78200f1812 drivers: modem: hl7800: use new work queue API
Implement new work queue API changes.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-04-02 07:24:46 -04:00
Armando Visconti
8b7a1a78c0 drivers/sensor: iis2iclx: Fix sensorhub building
The iis2iclx driver was not building correctly when
CONFIG_IIS2ICLX_SENSORHUB was enabled.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-04-01 15:34:36 -05:00
Armando Visconti
aae2161542 drivers/sensor: iis2iclx: avoid using both ctx_i2c and ctx_spi
The STMEMSC HAL i/f requires every driver using it to define
for each instance a stmdev_ctx_t structure, which is used to
export the hardware specific APIs to handle i2c and spi busses
operations. Since this structure is bus agnostic, there is no
need to declare it twice for both i2c and spi. Instead, declare
only one structure, which will be populated either with i2c APIs
or with spi APIs according to where that particular instance is
declared inside the DT.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-04-01 15:34:36 -05:00
Armando Visconti
9e50268c96 drivers/sensor: iis2iclx: Make use of stmemsc common routines
Make use of the stmemsc i2c/spi read/write routine that
has been introduced to simplify the ST sensor drivers code.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-04-01 15:34:36 -05:00
Armando Visconti
253cbfd0aa drivers/sensor: stmemsc: Add common i2c/spi read/write routines
Add common i2c/spi read/write routines for the benefit of those
ST sensor drivers who make use of the stmemsc HAL i/f.

Add generic stmemsc_cfg_i2c and stmemsc_cfg_spi structures which
contains all relevant information required by i2c/spi low level
routines, such as:

    - the pointer to the bus device
    - the I2C slave address (if instance is on I2C bus)
    - the spi_config structure (if istance is on SPI bus)

This level of abstraction allows the re-use of the i2c/spi read/write
routines among all stmemsc based sensor driver without the need to
reference the specific sensor data and or config structures.

The STMEMSC HAL source code is located here:
     zephyrproject-rtos/modules/hal/st/sensor/stmemsc/

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-04-01 15:34:36 -05:00
Shlomi Vaknin
e9efa8a77c dma: stm32: enable half transfer interrupt
Enable half transfer interrupt of the dma controller
in case the channel was enabled in circular mode.

Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
2021-04-01 07:32:22 -05:00
Nicolas VINCENT
573eec1014 drivers: serial: stm32 databits depends on parity
On stm32, the M bits defines the length of the frame between the start
bit and the stop bit, eventually including the parity bit when enabled.
Fix configuration of databits to set correct M bits when parity is
enabled.
This commit tries to address issue zephyrproject-rtos/zephyr#33351

Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
2021-04-01 07:30:05 -05:00
Anas Nashif
5fa12073cb drivers: remove what appears to be code from comments
Some tools consider this as commented code because of the ifdef, so
remove that and fix a coding guideline violation.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-01 05:34:17 -04:00
Anas Nashif
0630452890 x86: make tests of a value against zero should be made explicit
Tests of a value against zero should be made explicit, unless the
operand is effectively Boolean. This is based on MISRA rule 14.4.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-01 05:34:17 -04:00
Jani Hirsimäki
5d76e8aca8 net: ppp: dialup enablers
Introducing PPP dialup features to enable e.g. usage of nrf9160
based board as a dialup modem for transferring ip data over PPP
 (e.g. windows dial up), i.e. usage of Zephyr PPP as a server for
 providing MTU/MRU, IP address and DNS addresses for a PC:
- PPP LCP MRU option (configurable)
- PPP server: IPCP ip and dns address peer options to enable
providing IP and DNS addresses for PPP peer.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2021-04-01 09:43:56 +03:00
Christian Taedcke
ebcc316e1c drivers: watchdog: mcux_wwdt: fix validating window min vs max
The comparison was inverted before so configuring a valid window
providing min and max was not possible.

Now the comparison is corrected and only done if the watchdog is used in
windowed mode.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2021-03-31 14:15:27 -05:00
Henrik Brix Andersen
a865b1bb49 soc: arm: nxp: ke1xf: use clock nodes for NXP Kinetis SCG clocks
Use a combination of fixed-clock and fixed-factor-clock devicetree
nodes for describing the clock dividers/multipliers of the NXP Kinetis
System Clock Generator (SCG) present in the KE1xF SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-03-31 11:56:13 -05:00
Masoud Shiroei
ef2a590281 drivers: sensor: lis2mdl: Add single mode operation
Support single mode operation by enabling it and
making the driver to use the interrupt to findout
when the data is ready for fetch. The sample fetch
will be blocked for a specified maximum time untill
the interrupt happens.

* Make operation mode configurable in DTS file
* Make offset cancellation configurable in DTS file
* Use single common .yaml file for both i2c and spi
* Store above configurations in dev->config_info

Signed-off-by: Masoud Shiroei <masoud.shiroei@assaabloy.com>
2021-03-31 08:08:35 -04:00
Masoud Shiroei
02238adf2a drivers: sensor: lis2mdl: Fix all log messages
Remove unnecessary "\n" at the end of logs.

Change LOG_DBG to LOG_ERR wherever is appropriate

Signed-off-by: Masoud Shiroei <masoud.shiroei@assaabloy.com>
2021-03-31 08:08:35 -04:00
Zisis Adamos
7235b09bb2 drivers: uart: stm32: Fixes timing of TX_DONE generation.
Corrects TX_DONE generation occuring to early
on async api.
Fixes #33866
Signed-off-by: Zisis Adamos <zisarono@gmail.com>
2021-03-31 08:06:12 -04:00
JuHyun Kim
b486c35bc9 driver: sensor: icm42605: Fixed Dereference afterr null check issue
Fixed Coverity CID: 219524 : Dereference after null check
For fix this issue added null check before call function pointer

Fixes #32913

Signed-off-by: JuHyun Kim <jkim@invensense.com>
2021-03-30 08:17:47 -04:00
Vinayak Kariappa Chettimada
cd798202cb Bluetooth: controller: Fix flash driver sync regression
Fix flash driver sync regression introduced due to changed
default ULL_HIGH in the commit 30634334a8 ("Bluetooth:
controller: Fix ULL_HIGH priority to be lower than LLL").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-03-30 10:55:36 +02:00
Andrzej Puzdrowski
6acc4a2521 drivers/flash/flash_stm32g4x: fixed build issue
This driver file couldn't be compiled due the syntax error.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
bd48673fb5 drivers/eeprom/eeprom_emulator: remove flash_write_protection_set() usage
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
e55532c639 drivers/flash/flash_shell: remove flash_write_protection_set() usage
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
1960a5d234 disk/disk_acces_flash: remove flash_write_protection_set() usage
This patch removes scenario which was testing deprecated
API behaviors. Needed as As flash_write_protection_set() was
deprecated and became no-operation.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
7d53e0118b drivers/flash: removed write protection API implementations
flash_write_protection_set() API was deprecated so driver
implementation interface is left behind as well.

This patch removes all implementation pointed by the interface
'struct flash_driver_api.write_protection'.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
7c01b18de7 drivers/flash/flash_simulator: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

As CONFIG_FLASH_SIMULATOR_ERASE_PROTECT become a dead option.
this commit removes it as well.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
7f01abadde drivers/flash/soc_flash_nios2_qspi: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
0172cc159d drivers/flash/flash_stm32_qspi: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
14e7c5a5aa drivers/flash/flash_stm32h7x: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
6e4cdb0c99 drivers/flash/flash_stm32: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
fb6e824456 drivers/flash/flash_gecko: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
bcfd9e8daf drivers/flash/soc_flash_sam0: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
95d75bbbab drivers/flash/soc_flash_sam: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

Write procedure was fixed so it doesn't lock the driver after
failure anymore.

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
72394f783a drivers/flash/soc_flash_rv32m1: integrate WP service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
8e3eb3c740 drivers/flash/soc_flash_lpc: integrate protection service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
5d5018e4e5 drivers/flash/soc_flash_mcux: integrate protection service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
48c7e0dd94 drivers/flash/spi_nor: integrate protection service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Andrzej Puzdrowski
e034d7fd07 drivers/flash/nrf_qspi_nor: integrate protection service into write/erase
Flash write protection services were integrated into erase and write
procedures. This is step required for fixing following issue:
Multi-threading flash access is not supported by
flash_write_protection_set().

flash_write_protection_set() will be deprecated.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-03-29 13:43:55 -04:00
Jeremy Wood
5164d65269 drivers: usb: device: Add support for USB FS on STM32H7.
* Assumes that the USB2_OTG peripheral is being used in FS mode, as on
  the NUCLEO-H743/753.
* Disable ULPI on USB2_OTFG, enable FS clk.
* Enable USB voltage detect and disable USB reg, per STM app notes.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2021-03-29 13:42:46 -04:00
Petri Oksanen
4c88abcf7f drivers: nrf: uarte: rx flush amount calculation
The NRF UARTE has an undocumented feature that when you flush the RX
FIFO, the RXAMOUNT register is not cleared to zero if the FIFO is in
fact empty. This fix is correcting something that was most likely a
typo.

Signed-off-by: Petri Oksanen <petri@iote.ai>
2021-03-29 14:16:50 +02:00
Francois Ramu
9d2aead97b drivers: timer: st_stm32: add lptimer management to stm32l5 series
This patch introduces the support of the LowPower Timer
for the STM32L5xx from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:01 -04:00
Gustavo Romero
5f40b5d4f9 drivers: uart: uart_cmsdk_apb: Fix uart_irq_is_pending
Currently CMSDK uart_irq_is_pending does not use RX and TX interrupt
bits found in INTSTATUS register to check for pending interrutps but
rather it checks for pending interrupts indirectly by checking if RX and
TX buffers are, respectively, full and empty, i.e. it checks bits 0 and
1 in STATE register instead of bits meant for interrupt status found in
INTSTATUS register.

That is particularly problematic because although a RX interrupt implies
a RX buffer full and a TX interrupt implies a TX buffer empty, the
converse is not true. For instance, a TX buffer might be empty for all
data was processed (sent to serial line) already and no further data was
pushed into TX buffer so it remained empty, without generating any
additional TX interrupt. In that case the current uart_irq_is_pending
implementation reports that there are pending interrupts because of the
following logic:

/* Return true if rx buffer full or tx buffer empty */
return (UART_STRUCT(dev)->state & (UART_RX_BF | UART_TX_BF))
                                != UART_TX_BF;

which will return 1 (true) if STATE[0] = 0 (TX buffer is empty), since
UART_TX_BF = 1, so STATE[0] != UART_TX_BF, which is true (assuming here
for the sake of simplicity that UART_RX_BF = 0, i.e. RX buffer is empty
too).

One of the common uses of uart_irq_is_pending is in ISR in contructs
like the following:

while (uart_irq_update(dev) && uart_irq_is_pending(dev)) {
  if (uart_irq_rx_ready(dev) == 0) { // RX buffer is empty
    continue;
  }
  // RX buffer is full, process RX data
}

So the ISR can be called due to a RX interrupt. Upon finishing
processing the RX data uart_irq_is_pending is called to check for any
pending IRQs and if it happens that TX buffer is empty (like in the case
that TX interrupt is totally disabled) execution gets stuck in the while
loop because TX buffer will never transition to full again, i.e. it will
never have a chance to have STATE[0] = 1, so STATE[0] != UART_TX_BF is
always true.

This commit fixes that undesirable and problematic behavior by making
uart_irq_is_pending use the proper bits in the interrupt status register
(INTSTATUS) to determine if there is indeed any pending interrupts.

That, on the other hand, requires that the pending interrupt flags are
not clearly automatically when calling the ISR, otherwise
uart_irq_is_pending() will return immediatly false on the first call
without any data being really processed inside the ISR. Thus, because
both RX and TX buffer (FIFO) are only 1 byte long, that commit clears
the proper interrupts flags precisely when data is processed (fifo_read
and fifo_fill) or when the interrupts are disabled (irq_rx_disable and
irq_tx_disable).

Finally, that commits also takes the chance to update some comments,
specially regarding the need to "prime" when enabling the TX interrupts
(in uart_cmsdk_apb_irq_tx_enable()). The need to "prime" can be verified
in the CMSDK UART reference implementation in Verilog mentioned in the
"Arm Cortex-M System Design Kit" [0], on p. 4-8, section 4.3,
in cmsdk_apb_uart.v. In that implementation it's also possible to verify
that the FIFO is only 1 byte long, justifying the semantics that if
buffers are not full (STATE[0] or STATE[1] = 0) they are _completly_
empty, holding no data at all.

[0] https://documentation-service.arm.com/static/5e8f1c777100066a414f770b

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
2021-03-26 08:39:33 -04:00
Rich Barlow
9f2a65e74e disk: sdhc: Switch to clock frequency from DTS
The "spi-max-frequency" property already exists, but was unused. This
now sets the SPI clock frequency to this value (limited to 24MHz) once
initialisation is complete.

Due to the nature of the SPI API, it is necessary to have two separate
configuration structures to switch clock speed as some SPI drivers only
compare pointers to detect changes.

Fixes: #32996

Signed-off-by: Rich Barlow <rich@bennellick.com>
2021-03-26 08:34:43 -04:00
Flavio Ceolin
169144afa1 drivers: flash: Fix variable type
erase_page returns a negative value in case of error. We should
not use an unsigned type.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-26 07:13:13 -04:00
Flavio Ceolin
799147f43a drivers: ethernet: Fix variable type
net_recv_data returns an int, so we should not use an unsigned type.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-26 07:13:13 -04:00
Flavio Ceolin
6771f7bb90 drivers: hwinfo: Remove invalid comparison
size_t is never lesser than zero. Just remove it.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-26 07:13:13 -04:00
Flavio Ceolin
6f629b1727 drivers: flash: Fix variable type
erase_sector returns a signed type and we should not use
an unsgined type.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-26 07:13:13 -04:00
Mulin Chao
291c61fd47 driver: timer: npcx: fix dead code flow for K_TICKS_FOREVER.
Fix dead code flow if ticks is K_TICKS_FOREVER.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-26 07:03:09 -04:00