Commit graph

24538 commits

Author SHA1 Message Date
Thomas Stranger
d9f5581499 drivers: gpio: add definition for stm32g0 porte
Advanced stm32g0 socs additionally have gpio port e.
This commit adds the missing definition for the port.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Kumar Gala
48d01cfcb3 drivers: pcie: endpoint: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-17 11:28:31 +01:00
Marcin Niestroj
9fd26627bb drivers: gpio_nrfx: support edge interrupts using GPIO SENSE
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.

Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.

Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-03-16 10:02:42 +01:00
Pieter De Gendt
bbdeee65a3 i2c-mcux-lpi2c: take semaphore during transfer
Ported commit 49a3ce5881

Transfer locking is required if multiple devices use the same i2c bus.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-03-15 10:24:03 +01:00
Tomasz Bursztyka
915f4ac3c7 drivers/interrupt_controller: Get the IOAPIC RTEs dynamically
The fixed number of 24 RTEs is a legacy thing, and long gone by now.
IOAPICs expose the maximum number of RTEs they have via the version
register, so let's use it.

This avoids to manually tweak a Kconfig option (which is now removed)
and fixes the RTE number for all x86 targets relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-03-12 09:23:08 -05:00
Benjamin Lindqvist
4626a577c4 drivers: modem: gsm_ppp: Kconfig for autostarting ppp
Autostarting PPP is far from controversial. There are many, many reasons
someone could have for wanting to control exactly when PPP starts. Power
management, NET_EVENT race condition avoidance and any application not
requiring constant and instant use of networking just to name a few.

This commit introduces a Kconfig setting, GSM_PPP_AUTOSTART, which
controls whether gsm_ppp should connect and initialize PPP at boot. It
is set to "y" as default to minimize surprises for legacy code.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2021-03-12 13:27:22 +02:00
Guðni Már Gilbert
6145ab537f drivers: modem: fix coverity issue
Added (void) cast to supress coverity report. The usage of K_FOREVER
tells me we're not interested in the returned value.

Coverity-CID: 219653
Fixes #33034

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-11 10:08:19 -05:00
Wojciech Tatarski
35dd66b6c4 drivers: gpio: add EOS S3 GPIO driver
Add GPIO driver for QuickLogic EOS S3 SoC.

Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2021-03-11 08:58:20 -05:00
Guðni Már Gilbert
bf93d4f1a0 drivers: ethernet: gmac: fix coverity issue
If return value is negative (failed) then log the error with a
message.

Coverity-CID: 219519
Fixes #32927

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-11 08:49:10 -05:00
Armando Visconti
de707b6870 drivers/sensor: iis2iclx: fix multi-instance using new helpers
This commit simplifies the Device Tree configuration by using
the new helpers introduced in #30536.

In particular:
    - get bus devices with DEVICE_DT_GET
    - get SPI information with SPI_CONFIG_DT_INST

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-03-10 06:11:45 -05:00
Jose Alberto Meza
0bcb0081cc drivers: gpio: mchp: Add support for GPIO disconnected flag
Currently, if GPIO_DISCONNECTED flag is used pin remains as input,
this causes some additional power to be drain which is
undesired.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-03-10 06:10:39 -05:00
Mulin Chao
2134f9b72d driver: clock: npcx: remove useless operands.
Remove useless operands since 'bit' field of npcx_clk_cfg structure is
only 3-bit depth and always under 8.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:33:16 -05:00
Mulin Chao
0012ba5a38 driver: espi: npcx: prevent changing data content in host write func.
This CL prevents changing data content in the write function of host
interface by declaring it as constant pointer.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:31:05 -05:00
Mulin Chao
b6ad85cdd9 driver: host_sub: npcx: remove self-assignment for clearing status.
This CL removes self-assignment of SMC_STS register for clearing its
status.

Fixes #33089.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:06:26 -05:00
Erwan Gouriou
7dc6b03df3 drivers/watchdog: wwdg_stm32: Check return value of clock_control_on
In function wwdg_stm32_init, return value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219600).
Fix this.

Fixes #33067

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-09 09:08:40 -05:00
Erwan Gouriou
ddeff276a4 drivers/gpio: stm32: Check return value of clock_control_on api call
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.

Fixes #33035

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-09 09:08:40 -05:00
Satoshi Ikawa
f47f23f1a0 drivers: i2c_dw: Convert to use register for RX/TX buffer depth
RX/TX buffer depth are configurable parameters of DW_apb_i2c.

Change code from using fixed value I2C_DW_FIFO_DEPTH to using
register ic_comp_param_1 for RX/TX buffer depth.

Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
2021-03-09 14:16:35 +01:00
Guðni Már Gilbert
15d1ea544b drivers: sensor: bmi160: Fix bug where undersampling is not set
Fix #32774

Bit position BIT(7) is 1000 0000 in binary which is actually the
bit positon 128. BIT(7) can be used as a mask, but we need to define
the position specifically as the integer 7.

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-09 14:16:24 +01:00
Kumar Gala
b9ed2d33fd drivers: spi: Remove unused Kconfig symbols
Remove SPI_[0-8] and SPI_[0-8]_OP_MODES Kconfig symbols as no driver
uses them anymore.  We also cleanup board and sample code to remove
use of these symbols.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-09 04:53:46 -05:00
Mulin Chao
97db5d74c7 driver: espi: npcx: fix out-of-bounds read in espi_vw_generic_isr.
Fix out-of-bounds read in espi_vw_generic_isr func.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 04:51:50 -05:00
Kumar Gala
0f0308c197 drivers: spi: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Kumar Gala
c2f7382007 drivers: uart: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Kumar Gala
d7da73f432 drivers: i2c: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Mikkel Jakobsen
93dc7e9b44 drivers: clock_control: mcux_mcg: add MCGOUTCLK define
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
2021-03-08 12:18:33 -06:00
Andy Ross
eb1ef50b6b arch/xtensa: General cleanup, remove dead code
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions.  It's time to do
a cleanup pass.  This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.

Among the more notable changes:

+ xtensa_context.h offered an elaborate API to deal with a stack frame
  and context layout that we no longer use.

+ xtensa_rtos.h was entirely dead code

+ xtensa_timer.h was a parallel abstraction layer implementing in the
  architecture layer what we're already doing in our timer driver.

+ The architecture thread structs (_callee_saved and _thread_arch)
  aren't used by current code, and had dead fields that were removed.
  Unfortunately for standards compliance and C++ compatibility it's
  not possible to leave an empty struct here, so they have a single
  byte field.

+ xtensa_api.h was really just some interrupt management inlines used
  by irq.h, so fold that code into the outer header.

+ Remove the stale assembly offsets.  This architecture doesn't use
  that facility.

All told, more than a thousand lines have been removed.  Not bad.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-03-08 11:14:27 -05:00
Erwan Gouriou
d2a2b7cb56 drivers/gpio: stm32: Set SWJ higher prio vs device pin configuration
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.

To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-08 08:37:01 -06:00
Krzysztof Chruscinski
f075fee107 drivers: serial: nrfx_uarte: Add low power mode
Lowest power consumption can be achieved when uarte peripheral
is disabled when not used. In low power mode, need for both
directions is tracked and if both are no in use peripheral is
disabled. TX disabling is instant but RX requires flushing RX
fifo because data in hardware fifo is lost when peripheral is
re-enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Krzysztof Chruscinski
fb28f911da drivers: serial: nrfx_uarte: Refactor driver
Refactored driver to prepare for low power extension. Functional
change is limited to handling of RX_DISABLED event which is now
generated from RXTO interrupt context after RX is stopped. Previously,
RX was not stopped after the transfer.

Rx flushing function contains hardware limitation workaround.
Workaround is applied only if flushed data is not discarded.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Krzysztof Chruscinski
f93c700d5d drivers: uart: nrfx_uarte: Refactor driver configuration
Merged existing options into single word with flags.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Benjamin Lindqvist
254c126236 drivers: modem: optional factory reset at modem boot
Some modems, under some conditions, have a tendency to get stuck without
a connection due to cached state. We have observed this on some Simcom
LTE modems after large cellular outages. The modems are unable to escape
their cached state for some reason unless they're factory reset (or a
cache clearence is forced in some other way).

This commit allows for the modem to be factory reset at each boot. This
minimizes dependencies on external state by ensuring each power-up is as
similar as possible.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2021-03-06 09:09:35 -06:00
Glauber Maroto Ferreira
d8f6e66588 esp32: drivers: spi_flash: add host flash support
Add support for ESP32 host flash chip

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-03-06 09:34:35 -05:00
Watson Zeng
faba1100ea drivers: i2c: DW i2c: use 32 bit access instead of 16 and 32 bit mix
Current DW I2C driver uses 32 bit access for some registers and
16 bit access for others. So if DW I2C IP is connected via bus
which doesn't support 16 bit access we will get bus error.

Fix that by switching to 32 bit access only instead of 16
and 32 bit mix.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-03-06 09:33:24 -05:00
Erwan Gouriou
0392127997 drivers/clock_control: stm32: Missing include in stm32 header
As this header declares a function that uses a cube defined structure
as argument, it should include the matching header.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-06 09:32:05 -05:00
Peng Fan
db71e4dac7 timer: arm: implement smp_timer_init
Implement smp_timer_init to initialize arch timer of secondary cores.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-06 07:36:37 -05:00
Peng Fan
e6392301f8 timer: arm: implement arch_busy_wait
To take the usage of arm arch counter 64bit capability, implement
custom arch_busy_wait

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-06 07:36:37 -05:00
Peng Fan
5c1c5bbb5e interrupt_controller: intc_giv3: support SMP
Add SMP support.
Note: there is still limitation that we rely on NUM CPUs.
And all cpus must be from 0,1,2 and ....

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-06 07:36:37 -05:00
Tofik Sonono
1337f7fe24 drivers: native_posix: fix for native posix counter
There was an error in the ordering of the parameters in the
DEVICE_DT_DEFINE for the native POSIX counter. This made a project
using a counter built for native posix not being able to compile.
This commit switches places for ctr_init and device_pm_control_nop.

Signed-off-by: Tofik Sonono <tofik@sonono.me>
2021-03-05 18:18:38 +01:00
James Harris
b10428163a kernel: sem: add K_SEM_MAX_LIMIT
Currently there is no way to distinguish between a caller
explicitly asking for a semaphore with a limit that
happens to be `UINT_MAX` and a semaphore that just
has a limit "as large as possible".

Add `K_SEM_MAX_LIMIT`, currently defined to `UINT_MAX`, and akin
to `K_FOREVER` versus just passing some very large wait time.

In addition, the `k_sem_*` APIs were type-confused, where
the internal data structure was `uint32_t`, but the APIs took
and returned `unsigned int`. This changes the underlying data
structure to also use `unsigned int`, as changing the APIs
would be a (potentially) breaking change.

These changes are backwards-compatible, but it is strongly suggested
to take a quick scan for `k_sem_init` and `K_SEM_DEFINE` calls with
`UINT_MAX` (or `UINT32_MAX`) and replace them with `K_SEM_MAX_LIMIT`
where appropriate.

Signed-off-by: James Harris <james.harris@intel.com>
2021-03-05 08:13:53 -06:00
Krzysztof Chruscinski
7074254937 drivers: clock_control: nrf: Change CLOCK_CONTROL_NRF_FORCE_ALT
Added CLOCK_CONTROL_NRF_FORCE_ALT dependency to some options which
are not valid when clock is controlled by out-of-tree driver.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-05 15:28:13 +03:00
Krzysztof Chruscinski
e60d4f58e7 drivers: clock_control: nrf: modify Kconfig accuracy
Modified CLOCK_CONTROL_NRF_ACCURACY to represent integer value of
LF clock accuracy.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-05 15:28:13 +03:00
Krzysztof Chruscinski
a29420a463 drivers: clock_control: nrf: Add assert on unexpected event
Added assert when calibration event triggered but calibration disabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-05 15:28:13 +03:00
Rafał Kuźnia
ff1594cf05 drivers: ieee802154: Fix problem with binding IRQ handlers in shim layer
The shim layer could in some circumstances not be properly
configured which would result in an unbound radio interrupt
handler.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
2021-03-05 12:56:15 +01:00
Ievgenii Meshcheriakov
ec4a6c7ccf drivers/flash/soc_flash_nrf: Include additional headers
Include <soc.h> to make the header file self-sufficent.

Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
2021-03-04 13:55:56 +01:00
Pete Skeggs
ecfda097d1 bluetooth: hci: h4: Add thread name
Add a name to the h4 rx thread.

It's useful to put a name on each thread for debugging, e.g., with the
shell's kernel threads command.

Signed-off-by: Pete Skeggs <peter.skeggs@nordicsemi.no>
2021-03-04 13:17:02 +01:00
Arjun Jyothi
4fe04c84d4 drivers: dma: pl330: Zero initialize the ch_handle
Zero initialize the ch_handle in dma_pl330_configure().
The memset in dma_pl330_config_channel()is incorrect,
as the ch_handle is already populated with valid values and
the dma_pl330_config_channel() is overwriting with zeros.

Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
2021-03-04 12:59:46 +01:00
Raveendra Padasalagi
3c420566bd drivers: dma: pl330: remove callback
Removed dma callback in start() API, since dma
completion happens synchronously.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-04 12:59:46 +01:00
Raveendra Padasalagi
3bb095e710 drivers: dma: pl330: increase timeout
Increase timeout value related to dma completion status.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-04 12:59:46 +01:00
Raveendra Padasalagi
f86889e7ec drivers: dma: pl330: fix warnings
Fix compile warnings in PL330 DMA driver.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-04 12:59:46 +01:00
Carlo Caione
0f9406277d aarch64: pm_cpu_ops: Introduce pm_cpu_ops subsystem
AArch64 has support for PSCI. This is especially useful for SMP because
PSCI is used to power on the secordary cores.

When the PSCI driver was introduced in Zephyr it was designed to rely on
a very PSCI-centric subsystem / interface.

There are two kinds of problems with this choice:

1. PSCI is only defined for the non-secure world and it is designed to
   boot CPU cores into non-secure state (that means that PSCI is only
   supposed to work if Zephyr is running in non-secure state)

2. There can be other ways or standards used to start / stop a core
   different from PSCI

This patch is trying to fix the original wrong assumption by making the
interface / subsystem a generic one, called 'pm_cpu_ops', and using PSCI
only as an actual driver that is a user of this new interface /
subsystem.

For now the new subsystem is only exposing two methods: cpu_on and
cpu_off, others will probably follow according to the needs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-04 06:53:19 -05:00
Carlo Caione
a2226f5200 aarch64: Fix registers naming in cpu.h
The name for registers and bit-field in the cpu.h file is incoherent and
messy. Refactor the whole file using the proper suffixes for bits,
shifts and masks.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-03-04 06:51:48 -05:00