So far the init priories were:
enetc_psi0=60 < enetc_vsin=61 < emdio=70 < ethernet-phy=80
because the Ethernet PSI driver was doing global initialization for the
whole NETC complex, including enabling MDIO function (due to the way
the HAL works).
Change to use the default init priorities:
mdio=60 < phy=70 < eth=enetc_psi0=80 < enetc_vsin=81
by executing at an early stage the NETC global initialization. This also
allows to match the DT hierarchy representation of NETC with the
effective priorities assigned.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The led identifer should refer to devicetree ordering, not to the index
used by the controller. This way, it will be possible to deactivate
some leds or to reorganize the indexing if necessary.
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Some boards may have connected the enable pin of the chipset to a GPIO.
On these boards, it is necessary to configure and set this GPIO before
using the chipset, otherwise the I2C circuitry is disabled.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
The LP50XX family has a specific register to reset the configuration to
default state from any other state. Use this instead of relying on the
manual configuration of registers during startup.
Based on initial work from: Marek Janus <marek.janus@grinn-global.com>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Add support for LP5009, LP5012, LP5018 and LP5024 devices which only
differ by the number of LEDs they can control.
Also, update application sample to run on all these new supported
devices.
Based on initial work from:
- Marek Janus <marek.janus@grinn-global.com>
- Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
registers.
The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Add definitions for CLKEN/CLKSEL registers, which are used to control
peripheral clock on the variant of the PL011 UART present in Ambiq SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
This commit addst pinctrl support for Apollo4 SoCs.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
The spi_nor erase op selection was based on the alignment of the end of
the region to be erased. This prevented larger erase operations being
selected in many cases
Closes#60904
Signed-off-by: Joshua Crawford <joshua.crawford@levno.com>
Adds a new I2C shim driver for Intel SoCs. Builds upon the SEDI bare
metal I2C driver in the hal-intel module.
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Sometimes, channel C may write wrong register to the target device.
This issue occurs when FIFO2 is enabled on channel C. The problem
arises because FIFO2 is shared between channel B and channel C.
FIFO2 will be disabled when data access is completed, at which point
FIFO2 is set to the default configuration for channel B.
The byte counter of FIFO2 may be affected by channel B. There is a
chance that channel C may encounter wrong register being written due
to the FIFO2 byte counter wrong write after channel B's write operation.
The current workaround is that channel C cannot use FIFO mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
On ACE a seperate, soc specific, interrupt mask needs to be enabled
to unmask the interrupt. Do so for GPDMA.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
ESP32 SoC refactoring added new SOC_SERIES definition,
which was missed by #60183. This fixes it.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
SPI driver is current working for common SPI devices.
However, addressable LED like WS2812 requires MOSI line to be
default LOW during initialization. This PR adds such option.
This has no effect on common SPI operation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Modify the NPCX driver erase method to allow 0x1000 byte size erases
along with 0x10000 byte size erases based on input parameters
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Add initial support for NXP S32 GMAC/EMAC:
- it's a copy-implementation with DMA data buffers and buffer
descriptors in non-cached memory (buf len and ring size configurable)
- PHY interface selection only implemented for S32K3 devices as it is
SoC-specific
- no PHY driver integration, it works as a fixed link with speed/duplex
configured through devicetree
- supports multicast hash filtering, promiscuous mode, MAC loopback
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Change the eth-phy definition so that the phy is pointed by a phandle
rather than a child node, make the phy device a child of mdio. This
makes more sense from a devicetree hirearchy where the phandles have to
be initialized before the device itself, allows keeping the priorities
in check with CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Format the file `drivers/sensor/max17262/max17262.c` but exclude the
regsiter lookup table in `max17262_sample_fetch()`
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The init function of the MAX17262 sensor doesn't check the return value
of its I2C read and write functions. In case a read operation fails, the
output variable is not updated but the driver proceeds anyways. This can
cause unintended operation due to the potentially un-initialized memory,
such as getting stuck in the polling loop on line max17262.c:245. Update
the init function to abort and pass along the error code when I2C
transactions fail.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Make ethernet phys childs of the mdio device and move the mdio device up
a level on the tree. That makes the device hierarchy coherent with the
required initialization priority and allows keeping the sequence in
check with CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fixes sensor drivers to consistently return -ENOTSUP when an unsupported
channel argument is passed to the sensor_channel_get function.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Add option to use (by defining the `wake-gpios` devicetree properties)
an additional signal line between SPI master and SPI slave that allows
the latter to stay in low-power state and wake up only when a transfer
is to occur.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactor the function to make the execution flow in transceive()
clearer. In particular, return error codes directly, not through
spi_context_complete() which is unnecessary in this case.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver would return the temperature for all channels requested
except relative humidity. Instead, ENOTSUP should be returned for
unsupported channels.
Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
Introduce support for NXP FS26 SBC watchdog. Both Challenger and
Simple watchdog types are supported. Only watchdog functionalities of
the device are supported and any other monitoring feature is either not
supported or disabled.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Do not select CONFIG_CACHE_MANAGEMENT in the Microchip SAM CAN driver
Kconfig but rather leave it up to the SoC/platform Kconfig to enable it as
needed and enable CACHE_MANAGEMENT by default for the Atmel SAM E70/V71 SoC
series.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.
Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
Currently on zephyr, RAIL is used only for bluetooth. RAIL library is
needed to use efr32 radio regardless of the protocol used. We add
SOC_GECKO_USE_RAIL kconfig option to indicate if we use radio.
FPU is needed when using RAIL, we configure it if SOC_GECKO_USE_RAIL
is set.
Signed-off-by: Antoine Bout <antoine.bout@silabs.com>
Fix an unused variable build warning that was happening in certain
configurations. Move the variables in the only condition where they are
actually used.
west build -p -b nucleo_f429zi \
-T samples/net/cloud/aws_iot_mqtt/sample.net.cloud.aws_iot_mqtt
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Calculate the Bosch M_CAN Message RAM addresses relative to the Message RAM
Base Address (MRBA), not the offset.
Fixes: #59624
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename the phy-dev property with phy-handle to match the Linux
ethernet-controller binding and move it up to ethernet.yaml so that it
can be used by other drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.
Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
This PR introduces a backend API to be implemented by sensor emulators
that creates a standardized mechanism for setting expected sensor
readings in tests. This unlocks the ability to create a generic sensor
test that can automatically set expected values in supported sensor
emulators and verify them through the existing sensor API. An
implementation of this API is provided for the AKM09918C magnetometer.
A generic sensor test is also created to exercise this implementation.
Observe that this test knows nothing about the AKM09918C; info about
supported channels and sample ranges is discovered through the backend
API. The test iterates over all devices attached to the virtual I2C and
SPI buses in the test binary's device tree, which (theoretically) covers
all sensors. Sensors whose emulator does not exist yet or does not
support the backend API are skipped.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The sensor driver uses the value 500 to convert bit counts to microgauss
values, but it should actually be 1500. Edit the driver unit test to use
the macro instead of a magic number.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
DMA only works with non-cached memory regions in H7. Check them
and return an error if they don't match this condition.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Add support ADC SAR for NXP S32. ADC SAR diver
support 3 group channels (precision, standard
and external), run normal trigger in oneshot
conversion mode with 2 callbacks normal end
of conversion and normal end chain callbacks.
An instance only run on 1 group channel and
1 kind of callback at the same time.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Enable SPI SDHC driver to manage card power via pwr-gpios property.
Control for this property was previously partially implemented. When
this property is present, the SPI SDHC driver will use it to control
power to the SD card.
Power is toggled during SD init, so this power control can make SD init
more reliable as the power toggle will insure the SD card state is reset.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The IEEE 802.15.4 API and networking subsystem were using several
inconsistent timestamp resolutions and types. This change defines all
timestamps with nanosecond resolution and reduces the number of
available types to represent timestamps to two:
* `struct net_ptp_time` for PTP timestamps
* `net_time_t` for all other high resolution timestamps
All timestamps (including PTP timestamps) are now referred to a
"virtual" local network subsystem clock source based on the well-defined
types above. It is the responsibility of network subsystem L2/driver
implementations (notably Ethernet and IEEE 802.15.4 L2 stacks) to ensure
consistency of all timestamps and radio timer values exposed by the
driver API to such a network subsystem uptime reference clock
independent of internal implementation details.
The "virtual" network clock source may be implemented based on arbitrary
hardware peripherals (e.g. a coarse low power RTC counter during sleep
time plus a high resolution/high precision radio timer while receiving
or sending). Such implementation details must be hidden from API
clients, as if the driver used a single high resolution clock source
instead.
For IEEE 802.15.4, whenever timestamps refer to packet send or receive
times, they are measured when the end of the IEEE 802.15.4 SFD (message
timestamp point) is present at the local antenna (reference plane).
Due to its limited range of ~290 years, net_time_t timestamps (and
therefore net_pkt timestamps and times) must not be used to represent
absolute points in time referred to an external epoch independent of
system uptime (e.g. UTC, TAI, PTP, NTP, ...).
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
