Commit graph

23353 commits

Author SHA1 Message Date
Raveendra Padasalagi
32d62972ce drivers: dma: paxdma: Use uncached sync bufer
Use uncached memory for sync payload buffer.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
2021-03-19 09:32:08 -04:00
Kumar Gala
607469616d counters: Remove deprecated APIs
Remove support for counter_read and counter_get_max_relative_alarm as
they have been deprecated for at least 2 releases.  As part of the
removal of counter_get_max_relative_alarm remove the code in all
counter drivers that implemented the API.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-18 19:35:14 -04:00
Scott Worley
dde796a1c9 drivers: gpio: mchp: Fix pin configure after disconnect
GPIO driver properly disconnects a pin. On subsequent pin
configure calls the driver does not clear the GPIO pin's
power gate field resulting in the pin remaining disconnected.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-03-18 14:55:44 -04:00
Giancarlo Stasi
39a3b3c71e drivers: entropy: stm32: fix discarding of false negative rng values
Function random_byte_get() returns only the least significant byte of
the 32-bit random datum, as this is the used value, so avoiding that
higher numbers are interpreted as negative error codes and their value
is not discarded.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2021-03-18 08:47:09 -04:00
Shlomi Vaknin
41ca34a752 drivers: stm32: rtc: Add option to keep rtc value
Add option to keep rtc value between resets.

Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
2021-03-18 08:46:30 -04:00
Piotr Mienkowski
f5163e2ce2 drivers: sensor: Add Atmel SAM QDEC (TC) Driver
Tested on Atmel SMART SAM E70 Xplained board

Origin: Original

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-03-18 10:20:17 +01:00
Jun Lin
2638f2ecc4 npcx: move scfg driver from pinctrl to soc/arm/nuvoton_npcx/common
In NPCX chips, System Configuration module can configure not only
pinctrl but also misc. functionality such as glue and flash write
protection. This change moves the scfg driver from the pinctrl folder
to soc/arm/nuvoton_npcx/common and renames it to avoid confusion.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-03-17 18:47:32 -04:00
Wealian Liao
5835928423 drivers: watchdog: npcx: mask the WDRST_STS when accessing T0CSR
Register T0CSR bit 4 is WDRST_STS which is used to check whether the
chip has watchdog reset from the last power-up or vcc1_rst. WDRST_STS
hardware is design to write one clear. For the original
read-modify-write, it will reset the WDRST_STS unexpected. Add a mask
to avoid it.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-03-17 17:49:17 -04:00
Mulin Chao
8c76688b5f soc: power: npcx: solve an interrupt storm caused by host access.
This CL solves an interrupt storm caused by plenty of host access
messages when system is in S0. It only turns on the host access
interrupt before ec enters sleep and turns it off after leaving
sleep.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-17 15:32:14 -04:00
Xavier Chapron
30c9588aaa drivers: modem: ublox-sara-r4: Fix dereference before null check
Fixes #32916

Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
2021-03-17 07:25:59 -05:00
Igor Knippenberg
79a3d1b85a drivers: sensors: fdc2x1x: Add driver for Texas Instruments FDC2X1X
Adds support for the Texas Instruments FDC2X1X Capacitance-to-Digital
Converter for Proximity and Level Sensing Applications.

Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
2021-03-17 11:35:17 +01:00
Jeremy Wood
901cd5745e drivers: clock_control: Add support for STM32H753XX.
Added support for STM32H753XX by adding CONFIG_SOC_STM32H753XX to list
of H7 SoC with maximum 480MHz SYSCLK.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2021-03-17 11:34:20 +01:00
Julien D'Ascenzio
e1d22a0b61 drivers: i2c_ll_stm32_v2: Add timeout on transfer
When, due to EMC, a spike happens on the SCL line the driver stay in
BUSY state. It could be reproduced by forcing the SCL temporarily to
ground. It's probably a behavior relating to the operation of
multi-master.
By adding a timeout to the msg_read and msg_write function we can
detect that something went wrong, and when that happens we force the
end of communication.

Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
2021-03-17 11:34:08 +01:00
Thomas Stranger
8397cae10e drivers: clock_control: stm32: rm Kconfig for APB2 prescaler on g0 serie
stm32g0 series does not have apb2 prescaler, reflect that in kconfig.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Thomas Stranger
dde018ce64 drivers: clock_control: stm32g0: add support for g051, g0b1, g0b0 socs
Sets CLOCK_STM32_PLL_Q_DIVISOR for all g0x1 socs and g0b0.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Thomas Stranger
d9f5581499 drivers: gpio: add definition for stm32g0 porte
Advanced stm32g0 socs additionally have gpio port e.
This commit adds the missing definition for the port.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Kumar Gala
48d01cfcb3 drivers: pcie: endpoint: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-17 11:28:31 +01:00
Marcin Niestroj
9fd26627bb drivers: gpio_nrfx: support edge interrupts using GPIO SENSE
Currently level interrupts are implemented using GPIO SENSE, but edge
interrupts using GPIOTE events. Using GPIOTE events results in increased
power consumption according to product specifications and erratas of
some nRF MCUs. In case of nRF52832 it is <20uA in System ON Idle and
~400-450uA when used in conjunction with SPI or TWI.

Add a user configurable option to select between GPIOTE events and GPIO
SENSE mechanism, for implementing edge interrupts. Selecting GPIO SENSE
option will allow to reduce power consumption in scenarios mentioned by
nRF MCUs erratas.

Additionally GPIO SENSE mechanism (as opposed to GPIOTE event) allows to
detect state changes of pins configured as output.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-03-16 10:02:42 +01:00
Pieter De Gendt
bbdeee65a3 i2c-mcux-lpi2c: take semaphore during transfer
Ported commit 49a3ce5881

Transfer locking is required if multiple devices use the same i2c bus.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-03-15 10:24:03 +01:00
Tomasz Bursztyka
915f4ac3c7 drivers/interrupt_controller: Get the IOAPIC RTEs dynamically
The fixed number of 24 RTEs is a legacy thing, and long gone by now.
IOAPICs expose the maximum number of RTEs they have via the version
register, so let's use it.

This avoids to manually tweak a Kconfig option (which is now removed)
and fixes the RTE number for all x86 targets relevantly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-03-12 09:23:08 -05:00
Benjamin Lindqvist
4626a577c4 drivers: modem: gsm_ppp: Kconfig for autostarting ppp
Autostarting PPP is far from controversial. There are many, many reasons
someone could have for wanting to control exactly when PPP starts. Power
management, NET_EVENT race condition avoidance and any application not
requiring constant and instant use of networking just to name a few.

This commit introduces a Kconfig setting, GSM_PPP_AUTOSTART, which
controls whether gsm_ppp should connect and initialize PPP at boot. It
is set to "y" as default to minimize surprises for legacy code.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2021-03-12 13:27:22 +02:00
Guðni Már Gilbert
6145ab537f drivers: modem: fix coverity issue
Added (void) cast to supress coverity report. The usage of K_FOREVER
tells me we're not interested in the returned value.

Coverity-CID: 219653
Fixes #33034

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-11 10:08:19 -05:00
Wojciech Tatarski
35dd66b6c4 drivers: gpio: add EOS S3 GPIO driver
Add GPIO driver for QuickLogic EOS S3 SoC.

Co-authored-by: Jan Kowalewski <jkowalewski@antmicro.com>

Signed-off-by: Wojciech Tatarski <wtatarski@antmicro.com>
Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
2021-03-11 08:58:20 -05:00
Guðni Már Gilbert
bf93d4f1a0 drivers: ethernet: gmac: fix coverity issue
If return value is negative (failed) then log the error with a
message.

Coverity-CID: 219519
Fixes #32927

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-11 08:49:10 -05:00
Armando Visconti
de707b6870 drivers/sensor: iis2iclx: fix multi-instance using new helpers
This commit simplifies the Device Tree configuration by using
the new helpers introduced in #30536.

In particular:
    - get bus devices with DEVICE_DT_GET
    - get SPI information with SPI_CONFIG_DT_INST

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-03-10 06:11:45 -05:00
Jose Alberto Meza
0bcb0081cc drivers: gpio: mchp: Add support for GPIO disconnected flag
Currently, if GPIO_DISCONNECTED flag is used pin remains as input,
this causes some additional power to be drain which is
undesired.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-03-10 06:10:39 -05:00
Mulin Chao
2134f9b72d driver: clock: npcx: remove useless operands.
Remove useless operands since 'bit' field of npcx_clk_cfg structure is
only 3-bit depth and always under 8.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:33:16 -05:00
Mulin Chao
0012ba5a38 driver: espi: npcx: prevent changing data content in host write func.
This CL prevents changing data content in the write function of host
interface by declaring it as constant pointer.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:31:05 -05:00
Mulin Chao
b6ad85cdd9 driver: host_sub: npcx: remove self-assignment for clearing status.
This CL removes self-assignment of SMC_STS register for clearing its
status.

Fixes #33089.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 10:06:26 -05:00
Erwan Gouriou
7dc6b03df3 drivers/watchdog: wwdg_stm32: Check return value of clock_control_on
In function wwdg_stm32_init, return value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219600).
Fix this.

Fixes #33067

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-09 09:08:40 -05:00
Erwan Gouriou
ddeff276a4 drivers/gpio: stm32: Check return value of clock_control_on api call
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.

Fixes #33035

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-09 09:08:40 -05:00
Satoshi Ikawa
f47f23f1a0 drivers: i2c_dw: Convert to use register for RX/TX buffer depth
RX/TX buffer depth are configurable parameters of DW_apb_i2c.

Change code from using fixed value I2C_DW_FIFO_DEPTH to using
register ic_comp_param_1 for RX/TX buffer depth.

Signed-off-by: Satoshi Ikawa <ikawa.satoshi@socionext.com>
2021-03-09 14:16:35 +01:00
Guðni Már Gilbert
15d1ea544b drivers: sensor: bmi160: Fix bug where undersampling is not set
Fix #32774

Bit position BIT(7) is 1000 0000 in binary which is actually the
bit positon 128. BIT(7) can be used as a mask, but we need to define
the position specifically as the integer 7.

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-09 14:16:24 +01:00
Kumar Gala
b9ed2d33fd drivers: spi: Remove unused Kconfig symbols
Remove SPI_[0-8] and SPI_[0-8]_OP_MODES Kconfig symbols as no driver
uses them anymore.  We also cleanup board and sample code to remove
use of these symbols.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-09 04:53:46 -05:00
Mulin Chao
97db5d74c7 driver: espi: npcx: fix out-of-bounds read in espi_vw_generic_isr.
Fix out-of-bounds read in espi_vw_generic_isr func.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-09 04:51:50 -05:00
Kumar Gala
0f0308c197 drivers: spi: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Kumar Gala
c2f7382007 drivers: uart: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Kumar Gala
d7da73f432 drivers: i2c: sam0: Convert dma to use DEVICE_DT_GET
Replace device_get_binding with DEVICE_DT_GET for getting access
to the dma controller device.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-08 18:22:27 -06:00
Mikkel Jakobsen
93dc7e9b44 drivers: clock_control: mcux_mcg: add MCGOUTCLK define
Add MCGOUTCLK define to kinetis_mcg.h to make it possible to
use \`<&mcg KINETIS_MCG_OUT_CLK>\` in device tree.

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@prevas.dk>
2021-03-08 12:18:33 -06:00
Andy Ross
eb1ef50b6b arch/xtensa: General cleanup, remove dead code
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions.  It's time to do
a cleanup pass.  This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.

Among the more notable changes:

+ xtensa_context.h offered an elaborate API to deal with a stack frame
  and context layout that we no longer use.

+ xtensa_rtos.h was entirely dead code

+ xtensa_timer.h was a parallel abstraction layer implementing in the
  architecture layer what we're already doing in our timer driver.

+ The architecture thread structs (_callee_saved and _thread_arch)
  aren't used by current code, and had dead fields that were removed.
  Unfortunately for standards compliance and C++ compatibility it's
  not possible to leave an empty struct here, so they have a single
  byte field.

+ xtensa_api.h was really just some interrupt management inlines used
  by irq.h, so fold that code into the outer header.

+ Remove the stale assembly offsets.  This architecture doesn't use
  that facility.

All told, more than a thousand lines have been removed.  Not bad.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-03-08 11:14:27 -05:00
Erwan Gouriou
d2a2b7cb56 drivers/gpio: stm32: Set SWJ higher prio vs device pin configuration
Serial Wire JTAG configuration option is made available
under condition that SPI_3 was not enabled on SOC_STM32F103XE.
Besides being obsolete there are various other potential conflicts
with other periphals, and it is not possible to explicit them all.

To make it more coherent remove such condition, assume that user
needs to take care of such pin conflict and express SWJ as having
precedence over peripheral devices pin configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-08 08:37:01 -06:00
Krzysztof Chruscinski
f075fee107 drivers: serial: nrfx_uarte: Add low power mode
Lowest power consumption can be achieved when uarte peripheral
is disabled when not used. In low power mode, need for both
directions is tracked and if both are no in use peripheral is
disabled. TX disabling is instant but RX requires flushing RX
fifo because data in hardware fifo is lost when peripheral is
re-enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Krzysztof Chruscinski
fb28f911da drivers: serial: nrfx_uarte: Refactor driver
Refactored driver to prepare for low power extension. Functional
change is limited to handling of RX_DISABLED event which is now
generated from RXTO interrupt context after RX is stopped. Previously,
RX was not stopped after the transfer.

Rx flushing function contains hardware limitation workaround.
Workaround is applied only if flushed data is not discarded.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Krzysztof Chruscinski
f93c700d5d drivers: uart: nrfx_uarte: Refactor driver configuration
Merged existing options into single word with flags.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-08 12:51:50 +01:00
Benjamin Lindqvist
254c126236 drivers: modem: optional factory reset at modem boot
Some modems, under some conditions, have a tendency to get stuck without
a connection due to cached state. We have observed this on some Simcom
LTE modems after large cellular outages. The modems are unable to escape
their cached state for some reason unless they're factory reset (or a
cache clearence is forced in some other way).

This commit allows for the modem to be factory reset at each boot. This
minimizes dependencies on external state by ensuring each power-up is as
similar as possible.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2021-03-06 09:09:35 -06:00
Glauber Maroto Ferreira
d8f6e66588 esp32: drivers: spi_flash: add host flash support
Add support for ESP32 host flash chip

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-03-06 09:34:35 -05:00
Watson Zeng
faba1100ea drivers: i2c: DW i2c: use 32 bit access instead of 16 and 32 bit mix
Current DW I2C driver uses 32 bit access for some registers and
16 bit access for others. So if DW I2C IP is connected via bus
which doesn't support 16 bit access we will get bus error.

Fix that by switching to 32 bit access only instead of 16
and 32 bit mix.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-03-06 09:33:24 -05:00
Erwan Gouriou
0392127997 drivers/clock_control: stm32: Missing include in stm32 header
As this header declares a function that uses a cube defined structure
as argument, it should include the matching header.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-06 09:32:05 -05:00
Peng Fan
db71e4dac7 timer: arm: implement smp_timer_init
Implement smp_timer_init to initialize arch timer of secondary cores.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-06 07:36:37 -05:00
Peng Fan
e6392301f8 timer: arm: implement arch_busy_wait
To take the usage of arm arch counter 64bit capability, implement
custom arch_busy_wait

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-03-06 07:36:37 -05:00