Simple driver that allows one to choose the clock speed of xtensa cores.
It's basically a shim layer on top of SOC level driver.
Also, a really simple test case was added, mainly to ensure things are
build and are sane.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
On SoCs with two USB controller, Zephyr selects the FS one, and in that
case the ULPI clock needs to be disabled in sleep mode for the
controller to work.
On SoCs with a single USB HS controller, this operation is not needed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock uses slightly different names on STM32H7X as those
SoC can have more than one USB controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
On STM32H7X SoCs, both USB controllers are HS capable, however it is not
possible to connect an ULPI PHY to the USB2 one, which limit it to FS.
Therefore the ULPI clock in sleep mode has to be disabled for USB2 in
all cases. The ULPI clock for USB1 is already disabled when needed in
the usb_dc_stm32_clock_enable() function like for other SoCs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Do not manually enable the USB clock on STM32H7, as it is already done
in usb_dc_stm32_clock_enable() using the values in the device tree.
This partially fixes the build for STM32H7 devices with a single USB
controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock is disabled by default in run mode, there is no need to
disable it again. It is however enabled by default in sleep/low power
mode, so it needs to be disabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mcuboot may use a uart as logger. After application boot from mcuboot,
uart remains in some unknown state. It could leads to some unpredictable
uart behaviour. This commit fixes the issue by resetting of uart state
at the beginning of uart init.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Some services require the ability to query whether a GPIO pin
is configured as an input, output, both, or neither prior to
performing any operations at the service level. This is done
in order to reduce state tracking within the service.
To that end, this change adds
* `gpio_port_get_direction()`
* `gpio_pin_is_input()`, and
* `gpio_pin_is_output()`
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
This commit fixes issue with undefined value during position calculations.
Shift for positions may be >32, so we need to explicitly use unsigned long
casting to prevent unexpected behavior during event handling.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit fixes barrier usage in Xen event channel driver. Previously
compiler_barrier() was used and it did not prevent processor from
re-ordering of the write operations, that is needed for correct event
handling. It is now changed to data memory barrier (dmb()), which will
work as expected in this situation.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This patch modifies the ADXL362 driver to use the new
SENSOR_TRIG_MOTION trigger for activity detection
and SENSOR_TRIG_STATIONARY for inactivity detection.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Logging v1 has been removed and log_strdup wrapper function is no
longer needed. Removing the function and its use in the tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds a table to set the dma channel priority from the DTS
The config bits are converted through the table_priority
to match the DMA_Priority_level of the stm32cube HAL.
Fixes#46725
Signed-off-by: Francois Ramu <francois.ramu@st.com>
MISRA C:2012 Rule 8.2 (Function types shall be in prototype form with
named parameters.)
Added missing parameter names.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
This commit adds new functions, which can be used for Xen event channel
management (allocation, interdomain binding etc.). Such functionality
is needed for Xen PV driver development in Zephyr.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
