Magic constants throughout the code made this difficult to reason about,
especially with two different units of measurement (bytes and words) at
play.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The RX FIFO size is in words, so needs to be subtracted from the total
memory size *after* it's divided by 4.
Fixes#70789.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add driver for ST7796s display. This is a MIPI DBI display controller,
with a frame memory of 320x480x18 pixels. Support for 4 wire SPI mode is
implemented using the MIPI DBI API.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Warn about potential device tree errors for cases when driver's
client tries to configure a pin as GPIO but which is not
in GPIO mode.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
It is impossible to perform flash reads during a flash write. When the
data to write to flash lies in the flash itself, it is buffered in ram
before writing.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
Move providing of the first buffer in uart_rx_enable from that
function to the callback which is called from nrfx_uarte_rx_enable
context. By doing this nrfx_uarte_rx_buffer_set is called when
RX configuration flags are already known to the driver.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Provide support for reading events longer than 127 bytes in
ST SPI protocol v1 by splitting them into several SPI transactions.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Introduce NXP LCDIC driver using MIPI DBI class. This peripheral
supports 8080 and SPI 3/4 wire mode, although only SPI 4 wire support is
currently implemented. The driver supports DMA and interrupt driven
transfers.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The soc_secure_* function are used by the non-secure application
to access hardware resources which are mapped as secure.
Using these functions for hardware resources mapped as non-secure
is missleading.
We have some soc_secure_* functions which read FICR values.
In nRF91 and nRF53 platforms this made sense since FICR
has hardware fixed mapping as secure.
For nRF54 though the FICR has hardware fixed mapping as non-secure.
This change refactors the soc_secure.h to exclude the functions
which read FICR values from being included when FICR is mapped as
non-secure.
Also updates the hwinfo and ieee802154 drivers to adjust to this change.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Adds an option that allows for locking all interrupts when reading
the data from this sensor, this can be used alongside systems like
Bluetooth to vastly increase chances of getting a reading from the
sensor successfully, at the risk of losing Bluetooth packets.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
User is able to enable packet capture for low level HDLC data
frames received from and sent to network. This data can sent to
remote system for analysis. The captured data is encapsulated
into Linux cooked mode SLL packets.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
Improve code consistency and fix CONFIG_POSIX_API=n compatibility with use
of ZSOCK_* and DNS_* macros.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The initial version of an input driver for Cirque Pinnacle ASIC supports:
* Setting sensitivity
* Choosing between relative and absolute modes
* Relative mode
* Primary tap
* Swapping X and Y
* Absolute mode
* Setting number of idle packets
* Clipping coordinates outside of active range
* Scaling coordinates
* Inverting X and Y coordinates
Signed-off-by: Ilia Kharin <akscram@gmail.com>
To prevent postponing data flush until filling fifo. Now the flush will
occur at the scheduled time, regardless of subsequent poll_out reqs.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
A few lines above this change explicitly enable the UART FIFO. Then this
line, goes and disables it. This seems to be from a workaround where the
parity and stop bits are not coming in correctly in the config. Fixing
that will be another patch. But, the FIFO should always be enabled. This
is visible when trying to use bit rates that are reasonably fast. Even in
IRQ mode, with a sufficient bit rate, bytes are readily dropped.
Tested on a Sparkfun Promicro rp2040 board.
Signed-off-by: David Brown <david.brown@linaro.org>
Automatically select CONFIG_GPIO when the GPIO-controlled CAN transceiver
driver is enabled. Update board configurations to benefit from this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Cf Errata sheet, 2.2.4: With HSE active, switching the system clock source
from any other source to HSI, spuriously deactivates HSE.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
In case of chain loaded application with PLL set as the sysclk source,
directly exit the init function.
This also applies to exit from stop mode and was tested successfully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
For now DSI settings are hard-coded for the specific
LCD module used on the STM32H747I Discovery board
Signed-off-by: Erik Andersson <erian747@gmail.com>
To support the NT35510 display, some additional
options needs to be configurable in the STM32
DSI peripheral
Signed-off-by: Erik Andersson <erian747@gmail.com>
The Low Power Flexcomm driver manages the interrupt handling
and provides an API to register interrupt callbacks.
Register the NXP LPI2C interrupt handler.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Update the driver to account for variations in the SDK driver
when it uses the instance number instead of the base address.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
LPFlexcomm is a MFD device hence select this Kconfig whenever
it is enabled.
Remove the selection from the individual driver Kconfig files.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
On some boards, there is not dedicated reset pin for GT911, it might
be the same pin with display IC, or might be tighted to a high level
voltage.
This patch makes the rst_gpio can be empty.
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Add support for performing pinctrl operations. For now,
the only supported operation is applying the pinctrl default
state. Pinctrl is left optional to allow for scenarios in which
this is not required (e.g: AMP system in which another
OS configures the pinctrl).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add a property to select the push-pull GPIO output type to drive the
I2C recovery. The default is open-drain.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This patch add supports for performing clock-related operations
on i.MX8ULP. This consists of:
1) Adding a LUT.
2) Adding an initialization function meant to tell the
HAL which rate the XTALs on the boards (EVK and EVK9)
run at. This is used by the functions that compute the
rate of an IP clock.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In the case of some SOCs simply using the PCC base and clock
offset to build the clock ID passed to the HAL is not sufficient
since the clock ID may also contain some flags (e.g: see the case of
i.MX8ULP). For such SOCs, we change the semantic of the value passed
from the DTS (which is simply called "name", thus allowing us to
interpret it differently from SOC to SOC) to an index in a LUT
used to fetch the clock ID that can be safely passed to the HAL.
For compatibility reasons, we also keep the old way and use it
for SOCs which don't define such a LUT. The driver will decide
which method to use based on the LUT size (i.e: if 0, use the
old way, if != 0 use the new way).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Change, for audio DSP and M7 cores, SOC_<name> to match
the exact soc name.
Update the board files accordingly.
These configs are used in SOF and NXP_HAL, so change
sha for these modules.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
