Since commit 37717b229f ("sys: util: rename Z_MIN Z_MAX Z_CLAMP to min
max and clamp"), <zephyr/sys/util.h> unconditionally defines function-
like macros named `min`, `max`, and `clamp` in the global namespace (in
C mode). util.h gets pulled in transitively by very broad headers,
including the POSIX layer's <pthread.h>, so any third-party C code that
uses these names as ordinary identifiers (e.g. XNNPACK's static `clamp`
helper and its public `clamp` struct field) fails to build as soon as
<pthread.h> is included.
Following the approach used by Linux, move the lowercase `min`, `max`,
`min3`, `max3`, and `clamp` macros (and their helpers) into a new
<zephyr/sys/minmax.h> header that has to be included explicitly by
source files that want them. util.h keeps the uppercase MIN/MAX/CLAMP,
so most code is unaffected; only the (much smaller) set of files that
actually use the lowercase variants needs to pick up the new include.
Fixes#107853.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Mask the per-endpoint done interrupt while a bulk OUT is left NAKed
(NAKed OUT tokens otherwise storm the ISR), bound the exrs/RDY busy-wait
(RM 18.3.4) so a stuck status bit can't hang the ISR, re-arm rather than
truncate a multi-packet OUT on a zero-count done, and skip the thread hop.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Host can cancel current Control transfer for timeout and send new
Setup packet for new one. In this situation, driver can get out
of sync and even fail all the following Control transfers, probably
getting stuck in NAK'ing.
Because the HSUSBD hardware doesn't support disarm for Control Data
already armed for previous Control transfer, this update tries to
fix the issue via monitor of Data IN token. This approach has the
points:
* Wait for Data IN token received to arm Data IN
This lowers the chance of mis-arm at the cost of performance.
It also makes mis-arm error not propagate further in one or two
broken Control transfers.
* Cancel current Control transfer on new Setup packet received
Fixes: #104922
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For HSUSBD, unlike Control Data OUT which is automatically armed,
we can safely flush FIFO on new Setup packet whose direction is IN
because Data IN for the new Control transfer is not yet armed.
It is manually armed after processing the new Setup packet.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
For USBD, move Setup interrupt handling to the back of Data/Status
so that the order Data/Status->Setup can be kept when both flags
are asserted at the same time for delayed message handling. Both
flags asserted for the order Setup->Data/Status is an error
condition because the Data/Status transfer won't be armed until
the Setup packet is processed.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Introduces K_MEM_SLAB_DEFINE_TYPE() and K_MEM_SLAB_DEFINE_STATIC_TYPE()
helpers to allow the user to declare slabs for types without having to
manually ensure the alignment is correct.
Manual slab alignment was very error-prone and this change fixes several
instances of misalignment that would be trapped by the undefined
behavior sanitizer when running on 64-bit targets.
Signed-off-by: Egill Sigurdur <egill@egill.xyz>
Add missing null buffer checks in event callbacks for IN/OUT done handling,
various small fixes for halted state handling, remove some unnecessary
logging for expected failure modes, etc
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Check that the controller and PHY clock devices are ready, then
enable the clocks with clock_control_on() before calling
clock_control_set_rate().
This lets the EHCI driver bring up RT7xx USB clocks from the
devicetree clock description.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add Infineon vendor quirks to the UDC DW2 implementation. This
ties to the infineon,usbhs binding.
Signed-off-by: Zayne Stites <Zayne.Stites@infineon.com>
Fix below warnings on 64bit platforms:
drivers/usb/udc/udc_dwc2.c: In function 'dwc2_tx_fifo_write':
rivers/usb/udc/udc_dwc2.c:454:29: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]
454 | sys_write32((uint32_t)buf->data,
| ^
drivers/usb/udc/udc_dwc2.c: In function 'dwc2_prep_rx':
drivers/usb/udc/udc_dwc2.c:651:29: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]
651 | sys_write32((uint32_t)data,
| ^
drivers/usb/udc/udc_dwc2.c: In function 'dwc2_read_fifo_setup':
drivers/usb/udc/udc_dwc2.c:2324:25: warning: format '%d' expects argument
of type 'int', but argument 2 has type 'size_t' {aka 'long unsigned int'}
2324 | LOG_ERR("%d bytes SETUP", size);
| ^~~~~~~~~~~~~~~~ ~~~~
| |
| size_t {aka long unsigned int}
include/zephyr/logging/log_core.h:336:50: note: in definition of macro
'Z_LOG2'
336 | z_log_printf_arg_checker(__VA_ARGS__);
| ^~~~~~~~~~~
include/zephyr/logging/log.h:62:22: note: in expansion of macro 'Z_LOG'
62 | #define LOG_ERR(...) Z_LOG(LOG_LEVEL_ERR, __VA_ARGS__)
| ^~~~~
drivers/usb/udc/udc_dwc2.c:2324:17: note: in expansion of macro 'LOG_ERR'
2324 | LOG_ERR("%d bytes SETUP", size);
| ^~~~~~~
drivers/usb/udc/udc_dwc2.c:2324:27: note: format string is defined here
2324 | LOG_ERR("%d bytes SETUP", size);
| ~^
| |
| int
| %ld
drivers/usb/udc/udc_dwc2.c: In function 'dwc2_handle_oepint':
drivers/usb/udc/udc_dwc2.c:2615:51: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
2615 | sys_cache_data_invd_range((void *)(addr - 8), 8);
| ^
drivers/usb/udc/udc_dwc2.c:2616:45: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
2616 | memcpy(priv->setup, (void *)(addr - 8), sizeof(priv->setup));
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
The ULPI PHY interface driver (phy_ulpi_itf.c) was only being compiled
for STM32F7X and STM32H7X series, causing build failures on other series
that use external ULPI PHYs, such as STM32F4X boards with ULPI PHYs.
Add missing F2/F4 series to the build condition alongside the existing
F7/H7 series checks. This ensures the ULPI interface driver is compiled
for any F2/F4/F7/H7 board that has a ULPI PHY node in its devicetree.
An alternative approach removing the series checks entirely and just
checking CONFIG_DT_HAS_USB_ULPI_PHY_ENABLED was considered, however
there was a concern that the ULPI interface may have different clock
control bits on other series.
This fixes build failures like "undefined reference to
__device_dts_ord_XXX__stm32_phy" when building for STM32F4 boards with
external ULPI PHYs (e.g., adi_sdp_k1). The build failures were
introduced in commit 8b8321d184.
Assisted-by: Claude:claude-sonnet-4-5
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Use one file per vendor quirk. No modification to any content,
only the same code being moved to separate files.
Signed-off-by: Josuah Demangeon <josuah.demangeon@nordicsemi.no>
In `ep_check_config()`, capabilities of the endpoint provided by the driver
are logged, but not the requested endpoint configuration. As a result, when
the function fails, it is not possible to determine why using only logs.
Add logging of the requested configuration in addition to the driver caps
to allow easily determining the cause of the failure (when logging is on).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
STM32 HAL2 brings many changes regarding structure, macro and function
names, so add a compatibility layer to keep the driver working for both
versions.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The DWC2 USB driver was accessing hardware registers
through a raw dev->config->base pointer, which breaks on
MMU-enabled platforms where physical addresses need to be
mapped to virtual ones before use.
Use Zephyr's standard MMIO abstraction API by introducing
DEVICE_MMIO_NAMED_RAM/ROM(core) in the driver's data and
config structs, mapping the region at initialization time
with DEVICE_MMIO_NAMED_MAP, and routing all register accesses
through a dwc2_get_base() helper that calls DEVICE_MMIO_NAMED_GET.
These changes allows the driver to be useful on MMU-based
platforms like Broadcom BCM2711 SoC.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
This code would fail to compile if compiled with
`-Werror=implicit-fallthrough=`. The fallthrough does not seem to be
intentional as it is handling 2 discrete events.
Signed-off-by: Benjamin Gwin <bgwin@google.com>
Remove the error check because it may misjudge some right cases.
For example, for HSUSBD, in the case Setup-DataIn-StatusOut and
immediately following Setup-DataOut-StatusIn, the DataOut in the
second Control transfer has arrived but user buffer for OUT may
be only ready for StatusOut in the first Control transfer.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
The scheduled transfer message can be just a hint and its attached
transfer buffer can be NULL. Skip this case.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
The crash results from Control transfer STALL interrupt flag
not cleared. To catch all uncleared interrupt flags, all Control
transfer interrupt flags are cleared altogether at one place
instead of separately, with their handling order not changed.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
nRF USBD peripheral allows only one DMA to/from isochronous endpoint in
between two SOF packets. nRF UDC driver enforces this limitation using
m_ep_ready variable that has respective endpoint bit set to 1 inside SOF
handler. While this works most of the time, there is a corner case where
the DMA can start before SOF and finish after SOF.
Prevent issuing two DMA to/from isochronous endpoint within one frame by
not setting m_ep_ready bit if isochronous endpoint DMA was active during
SOF. This avoids failed assertion for iso IN endpoint being armed and
ready at the same time.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Endpoint dequeue is inherently racing against bus transactions. It is
possible that transfer finishes right before dequeue. When this happens
it was possible for the endpoint queue to be empty during xfer finished
handling. Resolve the software thread race by performing dequeue in the
same thread that handles finished transfers.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fixes:
zephyr/drivers/usb/common/nrf_usbd_common/nrf_usbd_common.c:414:23:
warning: unused function 'ep_to_hal' [-Wunused-function]
zephyr/drivers/usb/common/nrf_usbd_common/nrf_usbd_common.c:816:22:
warning: unused function 'usbd_ep_iso_capacity' [-Wunused-function]
When compiling with LLVM:
west build -p -b nrf52840dk/nrf52840 samples/subsys/usb/hid-keyboard --
-DTOOLCHAIN_VARIANT_COMPILER=llvm
Drop ep_to_hal since it's static and unused, usbd_ep_iso_capacity is
used in an assert just flag it as maybe unused.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
When the device is connected to the host, but the application shuts down
and initialize USB device again, there will be no UDC_EVT_VBUS_READ
event generated from USB VBUS regulator on nRF52840 and nRF5340
controller. We can track the state in the driver and resubmit the event
just at the beginning of the initialization. If the device gets
disconnected in between, there will be subsequent UDC_EVT_VBUS_REMOVED
event. Perhaps it could also be solved in more generic way, but other
controllers could behave differently. Also, it could be considered that
the application should track the state of the VBUS.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rename "_msg" variable to "msg" to avoid shadowing the "_msg" variable used
in the LOG_* macros.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Implement proper support for isochronous operation when "st,stm32-usb" IP
is used. Previously, the driver did not take into account specificities of
this IP regarding isochronous endpoints resulting in invalid transfers.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Update the copyright notice to use SPDX-FileCopyrightText. While at it, add
STMicroelectronics to the list of copyright holders as we have made
numerous contributions to this driver recently.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Move options such that all generic options go toghether, followed by
hardware-specific ones and wrap the HW-specific options in dedicated menus.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Remove unused `buf` variable in udc_bflb_v1_ep_dequeue() that causes
a build error with -Werror=unused-variable.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Function udc_buf_get_all() was intended to be a helper to remove all
requests from endpoint FIFO. While for just freeing all queue the
it may be argued that there may be some doubtful simplicity argument,
merging multiple submitted transfers into one is just enforcing
unnecessary complexity on class implementations.
At general level, every submitted (enqueued) request should get
corresponding completion (request callback) call. UDC drivers were
violating this sensible behavior when dequeuing (cancelling) requests by
merging all submitted requests into one.
Remove udc_buf_get_all() and replace all uses with simple loops. For
most classes (that submit just one request for an endpoint at a time)
this has no functional difference. For classes that implement double
buffering this simplifies completion handling.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Update gpio_set_drive_capability() to new gpio_ll_set_drive_capability()
as part of the hal_espressif updates.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a USB 2.0 Full-Speed device controller driver (udc_bflb) for the
Bouffalo Lab BL70x SoC family. The driver supports up to 8 bidirectional
endpoints with interrupt-driven operation.
Signed-off-by: William Markezana <william.markezana@gmail.com>
Allocating buffer in response to control transfer is part of processing
and therefore should not be done in UDC driver but rather in the stack.
Simplify UDC driver design by moving all control transfer buffer
allocations and processing to USB stack.
New control transfer handling flow is as follows:
1. USB stack allocates and queues buffer for Setup stage. This informs
UDC driver that USB stack is ready to process new transfer.
2. UDC driver completes enqueued Setup buffer. SETUP data may have
been received by device before Setup buffer was enqueued.
If multiple SETUP data was received, UDC driver must complete
request using last received SETUP data.
3. USB stack processes request. USB stack is responsible for:
* Stalling control endpoint when request cannot be processed
* Allocating and enqueueing Data stage buffer if necessary
- Depending on enqueued endpoint (IN/OUT), UDC driver is
expected to complete the transfer. If host sends new SETUP
data for any reason (e.g. timeout), then Data stage buffer
must be completed with -ECONNRESET code.
- UDC driver may postpone processing Data IN until USB stack
enqueues new Setup stage buffer.
* Handling status stage if applicable
- If Data IN was enqueued, stack immediately allocates and
enqueues Status OUT stage buffer.
- If Data OUT was enqueued, stack waits for Data OUT buffer
completion before doing any further processing.
- If control transfer handling fails, stack is expected to
STALL control endpoint.
* Allocating and enqueuing Setup buffer.
- This informs UDC driver that stack has finished processing
control transfer. UDC driver may choose to start processing
Data IN and/or Status OUT only after new Setup buffer is
enqueued.
4. UDC driver must fail (complete with -ECONNRESET) any enqueued and
not completed Data and Status buffers if host sends new SETUP data.
UDC driver must be able to buffer last received SETUP data until
USB stack is ready (enqueues Setup buffer).
5. UDC driver must complete all Data and Status buffers before it
completes Setup buffer.
6. UDC driver may keep ownership of Setup, Data and/or Status buffers
across USB bus resets. USB stack does not attempt to dequeue any
control transfer buffer it enqueued.
This approach implicitly synchronizes UDC driver against USB stack,
which ensures that only one set of Setup/Data/Status buffers is
allocated at a time.
Another advantage of the rework is drawing a clear line on buffer
ownership. The buffer responsibilities are as follows:
* USB stack is the only entity that both allocates and frees the
buffers. Only USB stack is allowed to set "setup", "data" and
"status" fields in struct udc_buf_info.
* UDC takes ownership of buffers handed to it in udc_ep_enqueue().
* UDC releases buffer ownership by calling udc_submit_ep_event().
Because there is just a single place where the buffer ownership changes,
and all buffers must go USB stack (alloc) -> UDC (perform requests on
the bus) -> USB stack (free) route it would be possible in the future to
implement a "tap" similar to Linux usbmon that would ease debugging.
This commit significantly changes how USB stack communicates with UDC
drivers. It was decided that supporting both the old and new model
simultaneously would require way too much effort. Therefore all UDC
drivers were reworked. Following people worked on driver rework:
* Tomasz Moń - ambiq, dwc2, kinetis, mcux ip3511, nrf, numaker,
renesas ra, rpi pico, smartbond, virtual
* Mathieu Choplain - stm32
* Mark Wang - mcux ehci
* Johann Fischer - sam0, stm32
* Ren Chen - it82xx2
* Brandon Hurst - max32
* Gerson Fernando Budke - sam udp, sam usbc, sam usbhs
Co-authored-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Co-authored-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Co-authored-by: Mark Wang <yichang.wang@nxp.com>
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
Co-authored-by: Ren Chen <Ren.Chen@ite.com.tw>
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Co-authored-by: Brandon Hurst <brandon.hurst@analog.com>
Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The nocache memory may not be freed when the `transferSofar` is 0, it
is allocated when (transferBuffer != NULL && transferLength != 0), so
release it with same conditions.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
We need to describe the wrapper separately as a parent node because it
is not part of the USB controller but is used to configure, control, and
enable/disable the USB PHY, and to enable/disable USB controller.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
SAM4E doesn't have PLLB, so the USB clock must be derived from PLLA
which is shared with the system clock.
Use PMC_MCKR_CSS_PLLB_CLK to detect PLLB availability at compile time:
- SAM4S (has PLLB): Use dedicated PLLB, 96MHz / 2 = 48MHz
- SAM4E (no PLLB): Use PLLA, ~240MHz / 5 = 48MHz
For SAM4E, PLLA is already configured by the SoC init code for the
system clock, so we just verify it's locked and configure the USB
divider. On shutdown, we don't disable PLLA since it's needed for
the system clock.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add a new USB Device Controller (UDC) driver for Atmel SAM4S, SAM4E,
and SAM3S microcontrollers with the UDP (USB Device Port) peripheral.
This driver replaces the deprecated legacy USB stack before removal.
Hardware Specifications:
- USB 2.0 Full-Speed only (12 Mbps)
- 8 hardware endpoints (EP0-EP7)
- 2668 bytes embedded DPRAM/FIFO
- No DMA - all transfers via PIO
- Integrated transceiver with pull-up on DDP
- Dual-bank (ping-pong) support on EP1,2,4,5,6,7
Endpoint Configuration (per datasheet Table 40-1):
- EP0: Control, no dual-bank, 64 bytes
- EP1,2: Bulk/Iso/Int, dual-bank, 64 bytes each bank
- EP3: Bulk/Int, no dual-bank, 64 bytes
- EP4,5: Bulk/Iso/Int, dual-bank, 512 bytes each bank
- EP6,7: Bulk/Iso/Int, dual-bank, 64 bytes each bank
Key Implementation Details:
1. Dual-Bank Pipelining (IN transfers):
- Track filled banks with tx_banks counter (0-2)
- Set TXPKTRDY after each bank fill per datasheet 40.6.2.2
- Pre-fill second bank while first is transmitting
2. OUT Processing:
- Bulk/Int endpoints processed directly in ISR
- EP0 uses thread-based processing for control transfer flexibility
- Bank alternation tracking for dual-bank endpoints
3. Clock Management:
- PLLB configured for 48MHz USB clock (UDPCK)
- Proper suspend/resume with clock gating
- Transceiver disable during disconnect for power saving
4. CSR Register Handling:
- Special "write 1 to preserve" bits handled correctly
- Polling after set/clear for MCK/UDPCK synchronization
- RX_DATA_BK0, RX_DATA_BK1, RXSETUP, STALLSENT, TXCOMP preserved
5. Endpoint Allocation Strategy:
- Odd endpoints (1,3,5,7) for IN, even (2,4,6) for OUT
- EP0 for control transfers
Performance:
- Achieves ~800-900 KB/s throughput
- Near USB Full-Speed theoretical maximum (~1.2 MB/s)
- All testusb tests (0-29) passing
Tested on sam4s_xplained board with Linux testusb utility.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Adapt all Espressif SoC and driver code to the updated
hal_espressif module synced with IDF master branch.
Main changes:
- clock control: delegate peripheral clock gating to HAL
layer using new clock/reset APIs
- SPI/GDMA: adapt to restructured DMA HAL with new channel
allocation and configuration interfaces
- ethernet: add RMII clock configuration and PHY management
- GPIO: simplify using direct HAL function calls
- flash: adapt to updated SPI flash HAL interfaces
- linker scripts: update IRAM/DRAM mappings for new HAL
object files
- DTS: fix ESP32-S2 PSRAM dcache1 address to match actual
MMU mapping region (0x3f800000 DRAM1 instead of 0x3f500000
DPORT which lacks 8-bit access capability)
- west.yml: update hal_espressif revision
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add missing dummy macro define HSUSBD_BUSINTEN_SOFIEN_Msk for when
CONFIG_UDC_ENABLE_SOF is enabled to pass compile for USBD
Fixes: #102173
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Add Atmel SAM USBHS driver for SAM E70/S70/V70/V71 family. The driver
was tested using CDC-ACM and testusb samples.
Fixes: #74663
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add Atmel SAM USBC driver for SAM4L family. The driver was tested using
CDC-ACM and testusb samples.
Fixes: #74665
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
