When setting endpoint capabilities, the driver uses the MPS stored in each
instance's configuration for OUT endpoints, but used a hardcoded 1023 for
IN endpoints.
Use the instance MPS when preparing IN endpoints' capabilities too.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Instead of snooping SETUP packets for SET_ADDRESS request to call the HAL
SetAddress() function manually, mark device with the addr_before_status
capability such that the UDC stack will call udc_stm32_set_address()
before submitting status by itself.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
It is possible for usbd_disable() to be called when the core is
hibernated. When done so, the USB stack will attempt to deactivate all
the endpoints. Because the core is hibernated, register reads are
really undefined. This can lead to udc_dwc2_ep_deactivate() not calling
udc_dwc2_ep_disable() which will leave struct udc_ep_config busy flag
set.
When endpoint 0x00 busy flag is left to true, the driver won't allocate
buffer to receive SETUP data which is mandatory in Buffer DMA mode. This
leads to essentially dead device after reconnect, because the device
will not respond to any control transfers.
Solve the issue by modifying backup register value instead of real one
when endpoint is deactivated while core is hibernated.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Split variables definition into 2 line as per Zephyr coding style
expectations since they are of different type.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove useless test on buffer length in handle_msg_setup() since the
buffer was allocated few lines above with a known non zero size.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove useless OR operation on return value is udc_stm32_enable()
since the return value is always 0 before it's OR-ed with a new return
value.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Change implementation to ensure all boolean test are done on essentially
boolean values.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Rename endpoint configuration pointer variable in HAL_PCD_ResetCallback(),
udc_stm32_ep_mem_config() and udc_stm32_ep_disable() from ep to ep_cfg
to prevent confusion since ep is usually used as endpoint address.
For consistency, also use ep_cfg elsewhere where an endpoint config
pointer is used, instead of using either cfg, ecfg and ep_cfg.
No functional changes.
Suggested-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Increase default UDC DWS stack size for ESP32-S3 in order
to guarantee quirks are executed without issues.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Ensure the USB clock is enabled before initializing the
controller by invoking the pre_enable hook. This avoids
initialization failures when the HAL has not yet configured
the clock.
Adds shutdown hook to allow interrupt and clock deinit.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add support for USB on STM32WBA6x series, along with a tiny rework of how
the st,stm32u5-otghs-phy is handled to make the code more generic by
actually consuming DT information.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
On most parts of the STM32F4 series, when the OTG_HS controller is used in
FS mode, the ULIP **low-power** clock must also be disabled for proper
operation. This was done properly in an old version of the driver but was
lost as part of refactoring[1].
Re-introduce ULPI low-power clock disable when OTG_HS is used in FS mode.
[1] See commit e31ddec781
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Actually do what the comment says and wait for Vdd33USB to be ready,
instead of waiting for the opposite.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
During a Host-to-Device Control transfer, an arbitrary amount of data is
sent from Host to the Device using OUT Data packets. If the total amount of
data to transfer, communicated via the wLength field of the SETUP packet,
exceeds the EP0 MaxPacketSize, several Data packets until all data has been
transfered.
Combined with HAL behavior, the STM32 driver did not handle this situation
properly and always ended reception after a single Data packet was received
regardless of whether or not all data had actually been received from Host.
Modify driver to handle this situation properly by keeping track of how
much data has been received and restarting transfers until we have received
everything the Host promised it would send.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Drop all existing transfers in control endpoints' queue when a new SETUP
packet is received. Also use the appropriate net_buf API in a nearby place.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Create a new Kconfig option allowing to tweak the RxFIFO size on OTG_FS
and OTG_HS instances, and replace the old hardcoded method with this new
mecanism.
The default value of 600 bytes yields a similar size to the the previous
hardcoded default of 160 words (= 640 bytes) when combined with the fixed
overhead computed by the driver (~56 bytes on OTG_FS with 6 endpoints).
Also fix a tiny error in a logging message (DRAM size in bytes, not bits).
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The maximal packet size (for non-control endpoints) was obtained by the
driver from HAL definitions which appear to not properly reflect hardware
capabilities.
Update driver to allow endpoints with wMaxPacketSize up to the maximal
value allowed by the USB Specification depending on operation mode, since
all STM32 USB controllers always support these values. Also move the EP
max packet size field in the 'struct udc_stm32_config' to avoid implicit
padding and add a documentation comment.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
STM32 OTG USB controllers use word-addressable RAM with a 32-bit word size
so all allocations from the USB SRAM must be 32-bit aligned. The driver did
not accept unaligned values of wMaxPacketSize, and FIFO allocation code was
implicitly expecting FIFO sizes to be aligned as well (since it allocated
"bytes / 4" without rounding up).
Update driver to accept values of wMaxPacketSize that aren't word-aligned
and to allocate properly sized FIFOs sizes when an unaligned size has been
requested.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The ST USB controller (compatible 'st,stm32-usb') is fitted with private
SRAM called the Private Memory Area or PMA. This is primarily used to hold
data transfered over USB, but it also contains the so-called 'buffer table'
(a.k.a. BTABLE) which holds the base address and size of buffers in the PMA
allocated to each endpoint. The BTABLE is placed by the driver at the start
of the PMA and occupies a fixed size ('USB_BTABLE_SIZE'), which was stored
in the driver configuration field 'pma_offset'. This mechanism is unused on
non-ST USB controllers from STM32 microcontrollers, but USB_BTABLE_SIZE is
still defined (to a dummy value) and stored in the 'pma_offset' field which
becomes unused.
Remove the 'USB_BTABLE_SIZE' definition and the 'pma_offset' field from the
driver configuration, and update the ST USB controller-specific verison of
'udc_stm32_mem_init' to derive the BTABLE size from the number of endpoints
that the controller has instead.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The EP0 max packet size was de facto a constant because its value was the
same regardless of which USB IP was in use. However, it was stored as part
of the instance configuration anyways which is wasteful and slower.
Create new "UDC_STM32_EP0_MAX_PACKET_SIZE" driver-level constant with which
all usage of the per-instance configuration field is replaced.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rename these three macros to an unprefixed lower-case variant. This is
normally not done for Zephyr macros (see container_of) but in this case
it seems like a good idea to adopt the lowercase names to:
1. have the same convention as the equivalent Linux macros, helping devs
working cross project recognizing (mis)use patterns.
2. make it somewhat intuitive that the lowercase ones are meant to be
used in functions while the uppercase ones are to be used for static
evaluation.
Add few c++ guards to avoid colliding with std::min and std::max.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix the check in dwc2_unset_dedicated_fifo() that wrongly included the
current endpoint when testing for higher FIFOs. This caused false
warnings and early returns.
Use ~BIT_MASK(ep_idx + 1) to only test FIFOs above the current EP.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Avoid incorrect (clock_control_subsys_t *) incorrect cast and
remove the cast of pclken in calls to the clock_control_
framework.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Do not queue new buffer after bus reset if there is one already queued.
This fixes memory leak on each bus reset if there are no SETUP transfers
received between resets.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
This is a follow up to commit 4fe2c5bd5f.
The UDC_DWC2_USBHS_VBUS_READY_TIMEOUT Kconfig option should be available
also for nRF92 Series SoCs (as it was previously when it depended on
NRFS_HAS_VBUS_DETECTOR_SERVICE), otherwise some builds will fail for
such targets.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Rework how the STM32 UDC driver determines the PHY used by a given instance
and the speed at which the instance is able to and allowed to operate.
The PHY determination now uses the 'phys' property instead of looking at
whether nodes with a specific compatible were enabled. Similarly, the speed
determination takes into account the 'maximum-speed' property, along with
the selected PHY's and the instance's capabilities.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rework how the driver performs PWR configuration and initializes HS PHYs.
Originally, the initialization logic was split in half without any real
logic. There were also attempts to share some logic but this resulted in
code that was difficult to understand.
Initialize PWR and PHY in well separated steps, and use explicit series
and PHY type checks in each part to ensure the logic is easy to understand.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rework the STM32 USB UDC driver to use HAL PCD macros for speed selection,
as should have always been done since that is the library used by the shim
driver. Also dummy definitions to ensure cross-series compatibility
without many #if blocks in the driver.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
The driver supports high-speed capable controllers. Select
the appropriate Kconfig options to ensure that the stack does
not optimize away high-speed support.
Signed-off-by: Martin Gysel <me@bearsh.org>
Do not select CONFIG_SYS_MEM_BLOCKS when enabling the Atmel SAM0 USB device
controller driver as the implementation does not use the system memory
blocks allocator.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Kconfig option UDC_DWC2_USBHS_VBUS_READY_TIMEOUT depends on services
exclusively available for nRF54H20, but the option can also be used for
nRF54LM20A, where there are no service dependencies, and VREG can be
accessed by the driver directly. Let depend the option on the SOC
series, as the controller can be used by the different CPUs on the SOC.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Handle endpoints in halted state properly by marking endpoints as halted
when appropriate, and inhibiting transfers involving halted endpoints.
Co-authored-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Signed-off-by: Mathieu CHOPLAIN <mathieu.choplain-ext@st.com>
Limit RX FIFO size allocation to a percentage of the total
SPRAM available, to cap allocation according to memory size.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Disable D+ pull-up on core disable to make sure that device does not
indicate its presence to host before the stack is ready (software
initializes controller and clears SftDiscon bit).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The UDC stack assumes that 'halt' on control endpoints is automatically
cleared by device drivers and never calls udc_ep_clear_halt() for such
endpoints. In practice, most controllers do perform this automatic clear
in hardware, but this requires special handling in udc_ep_set_halt() for
control endpoints (EP0), as setting the 'halted' bit on such endpoints will
lead to the software getting out-of-sync with the hardware.
Update the UDC skeleton driver to handle this edge case and add a comment
documenting the stack's behavior, along with the hardware behavior expected
by the code added to the skeleton driver for it to be functional.
Co-authored-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Mathieu CHOPLAIN <mathieu.choplain-ext@st.com>
added logic to determine the direction of USB transfers for non-setup
packets using the endpoint direction. This ensures proper handling of
USB_IN and USB_OUT directions.
Signed-off-by: Richard Yim <richardyim@ami.com>
For clear, this splits large isr function into smaller ones which are
dedicated for handling plug/unplug, wakeup, reset/suspend/resume, SOF,
Setup, and endpoint events.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
This refines interrupt handling sequence: clear interrupt flag first,
then process it. This can avoid one race condition when interrupt flag
is cleared but not processed for interrupts of the same type coming
very closely.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
This fixes timing to enable D+ pull-up so that device won't be recognized
by host until user application invokes udc_enable().
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
