Controllers that use buffers directly must always allocate the length of
the control OUT buffer as a multiple of the control endpoint MPS.
Kinetis UDC driver explicitly checks the remaining buffer size and
finishes the transfer earlier.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Fix typo und remove unused variable, add a check for buffer allocation.
Do not disable controller on udc_disable.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Some controllers, such as those used in Kinetis devices, do not provide
a way to reset the buffer descriptor flags for each endpoint. Do not
reset the odd flag on endpoint enable, as this will cause it to become
out of sync with the hardware.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This refines log message in udc_common.c, including:
1. Add address of allocated net_buf info into udc_ep_buf_alloc log so
that net_buf create/destroy can be easily monitored with calls to
udc_ep_buf_alloc and udc_buf_destroy.
2. Add ep info into udc_ep_buf_alloc log on failure.
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
No need to toggle reset line manually, use the standard reset API.
This improves code searchability and aids debugging.
Requires f2f496df84 to make sure reset
deassertion is waited for.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
The OTG_HS PHY from stm32u5a5xx device require the correct reference
clock frequency selction in SYSCFG_OTGHSPHYCR. The current default is
hard coded to 16Mhz (which matches the development board crystal).
However, a custom board my require a different crystal and then the
USB will not work. This add a required field in the
st,stm32u5-otghs-phy binding to force user to select the correct
clock reference. The current nucleo_u5a5zj_q baord was updated to
reflect the mandatory field.
Signed-off-by: BUDKE Gerson Fernando <gerson.budke@leica-geosystems.com>
Clear the suspended status and submit the resume event once the remote
wakeup signaling is finished. Clear the suspended status on bus reset as
well.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The p_context no longer has the const type, so all
Renesas-supported drivers need to be updated accordingly.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Initial implementation of nRF54L quirks necessary for nRF54LM20A.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add Kconfig option to enable Periodic Transfer Interrupt mode for
isochronous endpoints. The tradeoff is reduced CPU usage in exchange for
not timing out isochronous transfers.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Incomplete iso IN/OUT is just informative and its occurrence does not
prevent the endpoint from actually transmitting/receiving data. Such
"late" isochronous transfers, which are perfectly fine according to USB
specification, were observed on Windows host with nRF54H20 running
explicit feedback sample operating at High-Speed.
The incorrect handling manifested itself with "ISO RX buffer too small"
error message. The faulty scenario was:
* incompISOIN handler does not find any matching endpoint
* incompISOOUT handler disables endpoint, discards buffer and sets
rearm flag
* next DWC2 interrupt handler iteration after reading GINTSTS
* XferCompl interrupt on iso IN endpoint
* XferCompl interrupt on iso OUT endpoint
- transfer was actually happening to the buffer discarded in
incompISOOUT handler
- XferCompl handler modified the next buffer
* GOUTNakEff interrupt, iso OUT endpoint EPDIS bit is set
* EPDisbld interrupt, rearm flag set
- the buffer modified by XferCompl is used and fails because it is
not large enough
Modify the sequence so it accounts for host actions and the above faulty
scenario no longer causes any problems.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rearm isochronous endpoints when handling incomplete iso out interrupt
to make it possible to rearm the endpoint in time (before SOF),
especially when operating at High-Speed.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Move control endpoint enable/disable calls to udc_enable()/udc_disable().
It does not change much during USB device support initialization, but
it seems to resolve an issue when starting from RAM, though the real
cause is unknown.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Prevent disabling OTG HS and USBPHY clocks
during sleep on STM32U5 series
Disabling these clocks during sleep mode
was causing USB device initialization issues
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
Prevent disabling OTG HS and USBPHY clocks
during sleep on STM32U5 series
Disabling these clocks during sleep mode
was causing USB device initialization issues
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
It was observed that device ceases to work in Buffer DMA mode after GET
DEVICE QUALIFIER request is STALLed (when USB stack is limited to
Full-Speed only operation). The issue is due to missing dout feed.
Clear pending dout feed flag after bus reset (enumeration done) and
after stalled control read transfer to allow dout to be feed when
necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Turn MCX series into families.
Reasoning:
1. The MCX SOCs are quite different from each other and having them all
under one family in the HWMv2 hierarchy is fruitless because there
are so many differences that it is confusing to try to introduce
family-level code and configs since they would each only apply to a
subset of the series. There is almost nothing that can be shared
between all of them. Which is why there are comments in the MCX
family files saying not to put anything in them. This is a technical
waste.
2. Therefore, turning all of them into families is almost 0 effort and
makes sense. It will allow these different types of MCX to be
further subdivided into series in the future as the MCX portfolio
expands and such division will be necessary as new SOCs within each
letter family are released.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
USB_OTG_HS_EMB_PHY macro is always defined, so
`defined(USB_OTG_HS_EMB_PHY)` always results in true. This means that
driver always selected `USB_OTG_SPEED_HIGH_IN_FULL` and never
`USB_OTG_SPEED_HIGH`.
Fix that by checking value of defined macro.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Adhere to Programming Guide with regards to when the DIEPCTL0.CNAK is
set. This allows the driver to survive abusive control transfers with
extremely short host timeouts.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
When the endpoint is re-enabled, check if the current FIFO settings can
be reused. Further work is needed to improve FIFO memory handling for
more advanced interface configurations.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Utilize a code spell-checking tool to scan for and correct spelling errors
in `Kconfig` files within the `drivers` directory.
Additionally, incorporates a fix recommended by the reviewer.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
The previous setup packet reference will simply be overwritten when the
host omits data (OUT) stage. If a new setup packet arrives before the
previous data stage is complete, free the last setup packet buffer.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not synchronously wait for endpoint interrupt bits when disarming
endpoints. Introduce ep_disabled k_event that makes it possible for
application to wait for the action to take effect which is necessary
when handling SetFeature(ENDPOINT_HALT) or SetInterface() requests.
This change improves incomplete iso IN and OUT handling performance,
especially when there are multiple isochronous endpoints that need
servicing.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
At High-Speed there is at most 25 us handling window for incomplete iso
IN/OUT and therefore determining which endpoints are isochronous is too
wasteful. Add lookup variable holding which isochronous endpoints are
enabled and limit the search to only enabled endpoints. For applications
with just one OUT and one IN isochronous endpoint this is optimal.
The lookup variable is updated only when mutex is held. Interrupt
handler accesses the variable read-only and in general there is no
problem is incomplete iso handling interrupt hits when the lookup
variable is updated, because:
* when endpoint is just activated, it cannot be source of incomplete
iso interrupt because the endpoint is not armed yet
* when endpoint is just deactivated, it was first disabled
If there is more than one isochronous endpoint same direction then just
relying on endpoint enabled is not necessarily optimal. However, in
order to be able to limit the search to only armed endpoints, the lookup
variable would have to be updated on every transfer preparation and
completion which would require more time-expensive synchronization.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Replace irq_lock() with spin lock which is proper synchronization
primitive that should be used. Because non-SMP implementations are
allowed to optimize spin lock to just locking interrupts the resulting
code is the same on all currently supported DWC2 targets.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Constify vendor quirks structure to not keep it in RAM. Use constified
vendor quirks structure directly if there is only one snps,dwc2 instance
to allow compiler inlining quirk implementation.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
implements option to enable double endpoint buffer to improve throughtput
for non-control endpoints.
Signed-off-by: Chew Zeh Yang <zeon.chew@ambiq.com>
Otherwise the next attach could have the ISR invoked
before init has completely initialized all the required
data structures to handle the ISR properly.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Add helper to handle SOF interrupts/events and new Kconfig option to
disable SOF interrupt.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
New control transfer is started prematurely from device perspective when
host timeout occurs. Any data transfer from previous control transfer
have to be cancelled prior to handling SETUP data. Unconditionally
disable control IN endpoint to prevent race for enqueued buffer between
udc_buf_get_all() called in dwc2_handle_evt_setup() and udc_buf_peek()
called in dwc2_handle_in_xfercompl().
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Device can be considered enabled only after the Soft Disconnect bit is
cleared. Move the post enable quirk past the SftDiscon bit clear.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The USB CDC driver is unable to process any bulk IN transfers
after receiving spurious 'Clear Feature - Endpoint Halt' request
from host due to perpetual locked state caused by previously
scheduled transfer, that will never be finished, as the endpoint's state
is set to NAK. Fix by ignoring spurious request.
Signed-off-by: Piotr Ciura <piotr.ciura@hidglobal.com>
Because the same IP supports both device and host, so use
DYNAMIC_INTERRUPTS for KHCI and EHCI if both device and host
are enabled.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
- Reset specific configuration bits in
USB1_HS_PHYC->USBPHYC_CR before setting new values.
- Set the Frequency Selection (FSEL) bits to operate
the USB PHY Control Register at 24 MHz for proper communication.
- Enable the OTGPHY1 peripheral clock using LL_AHB5_GRP1_EnableClock.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
SEGGER Ozone J-Trace Code Profile identified iterations over daint value
as hot path. The iterations show at the very top of code profile because
full iteration happens whenever there is any activity on endpoint.
Optimize daint handling loops so only set bits are iterated over. While
this optimization depends on find_lsb_set() efficiency, it seems to be
worth it solely on the basis that quite often only few bits are set.
After a bit deeper analysis, I was suprised that on ARM Cortex-M33 the
find_lsb_set() approach is faster than naive iteration even if all bits
are set (which is extreme case because USB applications are unlikely to
use all 16 IN and 16 OUT endpoints simultaneously). This is due to fact
that there is only one conditional jump CBNZ and find_lsb_set() - 1
translates to RBIT + CLZ and then clearing the bit uses LSL.W + BIC.W.
Whereas the naive itation uses ADDS + CMP + BNE for the loop handling
and also has LSR.W + LSLS + BPL (+ ADD.W instruction on each iteration
to add 16 for OUT endpoints) for the continue check. Therefore the
optimized code on ARM Cortex-M33 is never worse than naive iteration.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
