drivers: spi: spi_litespi: Update driver registers
Make driver take register info from device tree so it can work with both 8-bit and 32-bit CSRs. Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
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parent
f45acb7d5f
commit
9f6c531da0
3 changed files with 27 additions and 19 deletions
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@ -68,14 +68,14 @@ static int spi_config(const struct spi_config *config, uint16_t *control)
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/* Set Loopback */
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if (config->operation & SPI_MODE_LOOP) {
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litex_write8(SPI_ENABLE, SPI_LOOPBACK_REG);
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litex_write8(SPI_ENABLE, SPI_LOOPBACK_ADDR);
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}
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/* Set word size */
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*control = (uint16_t) (SPI_WORD_SIZE_GET(config->operation)
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<< POSITION_WORD_SIZE);
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/* Write configurations */
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litex_write8(cs, SPI_CS_REG);
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litex_write16(*control, SPI_CONTROL_REG);
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litex_write8(cs, SPI_CS_ADDR);
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litex_write16(*control, SPI_CONTROL_ADDR);
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return 0;
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}
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@ -84,18 +84,18 @@ static void spi_litespi_send(const struct device *dev, uint8_t frame,
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uint16_t control)
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{
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/* Write frame to register */
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litex_write8(frame, SPI_MOSI_DATA_REG);
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litex_write8(frame, SPI_MOSI_DATA_ADDR);
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/* Start the transfer */
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litex_write16(control | SPI_ENABLE, SPI_CONTROL_REG);
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litex_write16(control | SPI_ENABLE, SPI_CONTROL_ADDR);
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/* Wait until the transfer ends */
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while (!(litex_read8(SPI_STATUS_REG)))
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while (!(litex_read8(SPI_STATUS_ADDR)))
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;
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}
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static uint8_t spi_litespi_recv(void)
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{
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/* Return data inside MISO register */
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return litex_read8(SPI_MISO_DATA_REG);
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return litex_read8(SPI_MISO_DATA_ADDR);
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}
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static void spi_litespi_xfer(const struct device *dev,
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@ -158,7 +158,7 @@ static int spi_litespi_transceive_async(const struct device *dev,
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static int spi_litespi_release(const struct device *dev,
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const struct spi_config *config)
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{
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if (!(litex_read8(SPI_STATUS_REG))) {
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if (!(litex_read8(SPI_STATUS_ADDR))) {
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return -EBUSY;
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}
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return 0;
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@ -13,13 +13,13 @@
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#include <zephyr/device.h>
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#include <zephyr/drivers/spi.h>
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#define SPI_BASE_ADDR DT_INST_REG_ADDR(0)
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#define SPI_CONTROL_REG SPI_BASE_ADDR
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#define SPI_STATUS_REG (SPI_BASE_ADDR + 0x08)
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#define SPI_MOSI_DATA_REG (SPI_BASE_ADDR + 0x0c)
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#define SPI_MISO_DATA_REG (SPI_BASE_ADDR + 0x10)
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#define SPI_CS_REG (SPI_BASE_ADDR + 0x14)
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#define SPI_LOOPBACK_REG (SPI_BASE_ADDR + 0x18)
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#define SPI_BASE_ADDR DT_INST_REG_ADDR(0)
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#define SPI_CONTROL_ADDR DT_INST_REG_ADDR_BY_NAME(0, control)
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#define SPI_STATUS_ADDR DT_INST_REG_ADDR_BY_NAME(0, status)
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#define SPI_MOSI_DATA_ADDR DT_INST_REG_ADDR_BY_NAME(0, mosi)
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#define SPI_MISO_DATA_ADDR DT_INST_REG_ADDR_BY_NAME(0, miso)
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#define SPI_CS_ADDR DT_INST_REG_ADDR_BY_NAME(0, cs)
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#define SPI_LOOPBACK_ADDR DT_INST_REG_ADDR_BY_NAME(0, loopback)
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#define POSITION_WORD_SIZE 8
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#define SPI_MAX_CS_SIZE 0x100
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@ -67,10 +67,18 @@
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};
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spi0: spi@e0002000 {
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compatible = "litex,spi";
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interrupt-parent = <&intc0>;
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interrupts = <5 0>;
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reg = <0xe0002000 0x34>;
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reg-names = "control";
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reg = <0xe0002000 0x4
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0xe0002004 0x4
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0xe0002008 0x4
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0xe000200c 0x4
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0xe0002010 0x4
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0xe0002014 0x4>;
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reg-names = "control",
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"status",
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"mosi",
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"miso",
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"cs",
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"loopback";
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label = "spi0";
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status = "disabled";
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#address-cells = <1>;
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