Currently the driver code does not actually request the flow control
state, it only checks if the state exists. To fix this we should
simply call pinctrl_apply_state() and if that fails, meaning no
flow control state exists, fall back to default pin mux settings.
Another case that needed fixing is run time flow control enabling
ie in the case where we have a WIFI/bluetooth module connected
and we initially operate without flow control but later enable
it after firmware download.
This patch addresses this as well by making a generic function
to achieve this.
Signed-off-by: Bas van Loon <bas@arch-embedded.com>
Zephyr moved to microseconds to represent uart async timeout.
This one has some additional logic that was not adjusted in
the transition from milliseconds.
c590b3545a was integrated in
https://github.com/zephyrproject-rtos/zephyr/pull/39041
Signed-off-by: Stefan Giroux <stefan.g@feniex.com>
Intial serial driver support for RX MCU, this driver utilize
the SCI HWIP for uart communication
Current support include polling API and Interrupt driven API,
some of the code is using Renesas RX Driver Package (RDP) as
hal layer
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Sang Tran <sang.tran.jc@renesas.com>
Character glitches are observed when entering suspend and standby low
power modes.
To fix it, we make sure the `poll_out` API waits for the character
transfer to complete. This is aligned with the uart driver API
description.
Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
printf is failing in hello_world sample due to current
uart driver init level. This reverts back to PRE_KERNEL_1.
As uart depends on GDMA, set it also to same level.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add support for transmitting using the asynchronous API. The
asynchronous portion is simulated through a dedicated polling thread.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add support for transmitting using the asynchronous API. The
asynchronous portion is simulated through the system workqueue.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add Bouffalo Lab serial driver. The driver uses pinctrl to configure
pins and have power management capabilities.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The console can't input when waken up from PM3, as get the wrong
usart_intenset when process PM_DEVICE_ACTION_TURN_ON and the
USART interrupt is not enabled. Only saving usart_intenset after
PM action of PM_DEVICE_ACTION_TURN_OFF can fix this issue.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
PM_DEVICE_ISR_SAFE shall not be used when non-asynchronous API is used
because RX is disabled in suspend action and that takes relatively
long time. In case of PM_DEVICE_ISR_SAFE it is done with interrupts
disabled. RX is not used at all if disable-rx property is set and in
that case PM_DEVICE_ISR_SAFE can be used.
Added macro which determines if ISR safe mode can be used.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Zephyr has changed the rules for PINCTRL to use Kconfig select
feature at the driver level instead of setting the Kconfig
item directly in the board or application level. We updated
the MEC5 UART serial driver Kconfig to select PINCTRL.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
If the RX FIFO buffer is full and there's nothing being transmitted
no LPUART interrupt will fire anymore. Thus the application will not
receive any bytes anymore. By enabling kLPUART_RxOverrunInterruptEnable
we will receive interrupts even though RX FIFO is full so we can recover
from this.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
Adds necessary pinctrl support for Arm cmsdk uart driver
Signed-off-by: Samuel Chee <samche01@arm.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
The callback function for the DMA is not used in the case where no DMA
properties are given in the esuart node in the device tree. It causes
a warning in the CI build.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Implement `irq_is_pending` in terms of the `irq_rx_ready` and
`irq_tx_ready` function calls.
Using `intstatus` directly results in an implementation that does not
conform to the interrupt driven UART API. Since `intstatus` bits are
only only set when a buffer transitions from full to empty, any calls to
`irq_is_pending` before any bytes have been sent will return 0. This is
problematic since the documented implementation for the API IRQ handler
is:
```
while (uart_irq_update(dev) && uart_irq_is_pending(dev)) {
if (uart_irq_rx_ready(dev)) {
...
}
if (uart_irq_tx_ready(dev)) {
uart_fifo_fill(dev, ...);
}
}
```
If `uart_irq_is_pending` does not return 1 until the first byte is sent,
we never end up pushing data to be transmitted into the `uart_fifo_full`
function.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Drivers update to use shared interrupt allocator for Xtensa
and RISCV devices.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make use of pm_device_driver_init to perform driver initialization.
Implement PM suspend and resume, which performs the following actions:
* Enables/disables the USART
* Gates the USART clock
* Configures USART pins
Also take PM locks to prevent deep sleep during TX and RX operations.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Replace prefix from "uart_silabs_eusart" to "eusart" in order to
simplify the code, and make it more readable.
Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
Allow STM32 UART driver to operate with DMA support even when
CONFIG_MEM_ATTR is disabled which happen when CONFIG_ARM_MPU is
intentionally disabled despite the CPU supports MPU.
By the way, remove some #ifdef directive on header files inclusion
that add noise in the header file inclusion section without any
benefit.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
When using the asynchronous TX API, skip the `data->pm_policy_state_on`
checks for PM policy updates. This fixes two issues:
* State conflicts with the `poll_out` implementation when both APIs are
used on the same port, resulting in the SoC sleeping while
transmissions are running.
* Scheduling a TX from the `TX_DONE` callback resulting in the PM
policy not being applied, resulting in TX errors.
Every call to `uart_tx` should have a corresponding `TX_DONE` event
generated, which makes the raw (reference counted) calls to
`pm_policy_state_lock_put/get` the correct API to use here.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Fix two instances where switch-case labels were followed immediately by
a declaration, which is generally invalid and can cause compilation
failure.
Signed-off-by: Kesavan Yogeswaran <hikes@google.com>
Block the SoC from re-entering sleep modes while the RX line is active,
if the RX activity previously woke the device from the sleep states.
This stops the device from continuously transitioning between the two
modes and improves responsiveness.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Fix dropped `UART_TX_DONE` events when poll out and async APIs are used
on the same port. Clearing `tx_poll_stream_on` is required to prevent
`uart_stm32_isr` from prematurely clearing the TC status bit.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add support for additional line control signals. Improved configuring
uart_config_flow_control options.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
This commit changes to use ambiq hal power control APIs
to replace the previous register settings to power on
ambiq drivers.
Signed-off-by: Hao Luo <hluo@ambiq.com>
This is the initial commit to support UART driver for Renesas RZ/A3UL.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
This include seems redundant as the driver builds fine without
it being included. When including soc.h it also causes issues
if one utilises the xenvm board when compiling. I suggest this
is removed completely as it seems unnecessary to create this
tight coupling to a specific SoC as the driver implementation
is describing itself perfectly well, and works well without
this soc.h-file.
Signed-off-by: Kent Stark Olsen <kent.stark.olsen@gmail.com>
The Xilinx xuartps driver fails to find the correct pre-scaler
parameters for the BAUDDIV and BAUDGEN registers. This fix
corrects that behaviour. The reason why it fails is due to
the stop condition for the search being ill-conditioned.
The stop condition is based on a baudrate error, and this
was chosen to be 3 percent. This would cause the parameter
search to stop too early returning ill-condotioned pre-scaler
parameters. This has been corrected by setting the stop condition
to be 3 permille instead of 3 percent. This change was tested
with an AMD Zynq Ultrascale+ MPSoC ZU3EG.
Signed-off-by: Kent Stark Olsen <kent.stark.olsen@gmail.com>
Due to historical reasons, there were two implementations of
R7FA4M1AB3CFM. However, the migration has been completed,
so the old one is now being removed.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This driver had some issues with interrupt-driven operation, which
manifested by the console breaking when enabling the Zephyr shell on the
kv260_r5 target for example. Fixed the following:
-Ensure device is fully hardware reset during initialization
-Changed poll_out to be more consistent with other drivers, i.e. only
wait for the UART to accept the character, not for it to be fully
transmitted.
-Added implementation for err_check function, as otherwise there was no
way to detect or clear the error interrupts enabled by irq_err_enable.
-Fixed logic for enabling/disabling interrupts. This should only be done
by explicit enable/disable calls, not as part of fifo_fill etc.
-This hardware does not produce interrupts for TX FIFO empty or RX FIFO
threshold when enabling them if the TX FIFO is already empty or RX FIFO
already contains data. When enabling interrupts in these cases, use a
timer to trigger a user callback to match the normal UART API usage,
similar to the xlnx_uartlite driver.
-Other minor cleanups to interrupt-driven functions.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
