Commit graph

1538 commits

Author SHA1 Message Date
honglin leng c4f102fd8b boards: arm64: add support for Raspberry Pi 4 Model B
This is an AArch64 board. We also add BCM2711 SoC support

Signed-off-by: honglin leng <a909204013@gmail.com>
2023-09-28 13:40:45 +02:00
Aleksander Wasaznik 4d926ac041 drivers: serial_test: Implement interrupt and async APIs
This allows testing code that uses the UART interrupt-driven API and
UART asynchronous API.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2023-09-28 14:07:52 +03:00
Sylvio Alves bdda8ac48e soc: esp32s3: add esp32s3_appcpu for AMP support
Adds esp32s3_appcpu SoC and update default esp32s3 SoC
to support AMP feature.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-09-27 12:07:21 +02:00
Manuel Argüelles ca3310145f drivers: select nocache only when supported
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-26 15:09:51 +02:00
Daniel Leung 3374e81438 uart: ns16550: separate IO/MMIO and PCIe init macros
This separates the DT device init macros into two: one for
UART accessed via IO port or MMIO, the other for PCIe UART.
All the conditions needed to setup the device structs are
getting complicated. Hopefully separating them would make
them easier to decode, and to avoid the conditions having
too many levels.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 9f9b4a8afa uart: ns16550: use io-mapped DT property for IO port access
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 3296956331 uart: ns16550: move setting .reset_spec inside initializer
This moves setting .reset_spec inside struct initializer
instead of using macro trampoline.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 53bc95e218 uart: ns16550: refactor UART_NS16550_IRQ_CONFIG_*
Instead of PCIE0 and PCIE1, use no suffix for IO port/MMIO IRQ
configuration funct, and suffix PCIE for IRQ config on PCIE
bus.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 566d21804c uart: ns16550: simplify DEV_DATA_FLOW_CTRL
Use COND_CODE_1() instead of macro trampoline and move it
into struct initializer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 8b54cb859e uart: ns16550: simplify BOOT_LEVEL
Use CODE_CODE_1() instead of macro trampolines when
CONFIG_UART_NS16550_PARENT_INIT_LEVEL is enabled.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 7d0e223112 uart: ns16550: simplify DEV_CONFIG_PCIE_INIT/DEV_PCIE_DECLARE
Use COND_CODE_1() instead of macro trampolines.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 39f8b7d51d uart: ns16550: simplify UART_NS16550_IRQ_FLAGS
Using COND_CODE_1() is more intuitive when looking at the code,
instead of some macro trampoline magic.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung fe10897f70 uart: ns16550: simplify DLF and PCP related macros
This simplifies DLF and PCP enabling devicetree macros with
DT_ANY_INST_HAS_PROP_STATUS_OKAY() instead of the complicated
ones.

Also, this moves the macro to initialize struct elements into
the struct initializer itself. This makes it clearer on which
element is being initialized directly inside the struct
initializer instead of having to do mental macro trampoline
to find the correct macro.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung 2899df629f uart: ns16550: remove unused forward declaration
Remove the unused forward declaration of the driver API struct.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Eivind Jølsgard 66069b3b39 drivers: serial: uart_nrfx_uarte: coexisting async and interrupt API
This commit fixes an issue with the nrfx uarte driver to allow the
async and interrupt driven UART APIs to coexist on different uart
instances. As both APIs cannot be used simultaneously for a given
instance, there is no need to handle
CONFIG_UART_EXCLUSIVE_API_CALLBACKS in this driver.

Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
2023-09-20 11:31:41 +01:00
Gerard Marull-Paretas 0660719346 drivers: nrf: select PINCTRL
Drivers for nRF SoCs using pinctrl did not select PINCTRL. This means
boards are forced to enable PINCTRL.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-20 08:57:09 +02:00
Dmytro Firsov ac0f731b2e xen: add Kconfig option for Zephyr on Dom0less setups
Dom0less is Xen mode without privileged domain. All guests are created
according to hypervisor device tree configuration on boot. Thus, there
is no Dom0 with console daemon, that usually manages console output
from domains.

Zephyr OS contains 2 serial drivers related to Xen hypervisor: regular
with console shared page and consoleio-based. The first one is for
setups with console daemon and usually was used for Zephyr DomU guests.
The second one previously was used only for Zephyr Dom0 and had
corresponding Kconfig options. But consoleio is also used as interface
for DomU output on Dom0less setups and should be configurable without
XEN_DOM0 option.

Add corresponding XEN_DOM0LESS config to Xen Kconfig files and proper
dependencies in serial drivers.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Co-authored-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
2023-09-18 10:43:45 +01:00
Dmytro Firsov 74b271bc2a xen: change HVM functions signature to run it for other domains
This commit adds possibility to call hypervisor HVM parameter functions
for specified domain (instead of only DOMID_SELF). It is needed for
configuring domains, that were created from Zephyr control domain.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2023-09-15 11:15:00 +01:00
Dmytro Firsov c9d2fb7d40 xen: refactor Xen hypervisor Kconfig options
Xen-related Kconfig options were highly dependand on BOARD/SOC xenvm.
It is not correct because Xen support may be used on any board and SoC.

So, Kconfig structure was refactored, now CONFIG_XEN is located in
arch/ directory (same as in Linux kernel) and can be selected for
any Cortex-A arm64 setup (no other platforms are currently supported).

Also remove confusion in Domain 0 naming: Domain-0, initial domain,
Dom0, privileged domain etc. Now all options related to Xen Domain 0
will be controlled by CONFIG_XEN_DOM0.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2023-09-15 11:15:00 +01:00
Martin Jäger 6d67a56d5b drivers: serial: uart_nrfx_uart: fix NRFX_WAIT_FOR result type
This macro expects a bool variable to store the result.

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-09-14 16:51:32 -05:00
Marko Sagadin 3d5e660903 drivers: serial: native tty: Split in top and bottom
Split the native tty serial driver in a top and bottom to enable using it
with embedded libCs.

Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
2023-09-13 16:36:43 +02:00
Florian Grandel f7e5a103b6 drivers: serial: uart_cc13xx_cc26xx: fix race
Fixing a race in tx/rx_constrained flag access.

Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
2023-09-08 09:26:34 +02:00
Richard Wheatley 13484b5bdc drivers: serial: uart_pl011_ambiq.h: Remove reserved CLK frequency
UART CLK does not support the 48MHz frequency option

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2023-09-02 15:10:19 +02:00
Sreeram Tatapudi 09a07e42c0 drivers: cat1: Updates to support latest version of HAL/PDL
- Refactoring to support latest versions of HAL/PDL

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2023-09-01 09:52:25 +02:00
Kenneth J. Miller 044de03d57 drivers: serial: stm32: Fix flawed runtime config check
Replace incorrect and limited runtime parity/data bits conditional
configuration with build-time logic using BUILD_ASSERT. This allows for
more flexible UART configurations, while preventing invalid DTS
configurations at build-time.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller 5217a17214 drivers: serial: stm32: Consolidate UART config
Move overlapping UART parameter configuration to new
uart_stm32_parameters_set function. This function is called by
uart_stm32_configure upon application/subsystem configuration, and
uart_stm32_registers_configure upon (re-)initialization of driver
instances.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller 31a6e31cee drivers: serial: stm32: Refactor for PM handling
Move clock enable and register configuration to their own functions in
preparation for later uart_stm32_reinit function that will use these in
addition to uart_stm32_init.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller c8ffeb47f7 drivers: serial: stm32: Add persistent uart_config struct
Add static uart_config struct to init macro with corresponding pointer
as uart_stm32_config struct member. This struct will store boot and
runtime UART configuration for reinitialization upon exiting low-power
modes, where register contents might be lost.

Remove hw_flow_control, parity, and baud_rate from uart_stm32_config and
uart_stm32_data structs, respectively, as the need for these is now
obviated by the presence of the uart_config struct, which contains
equivalent members.

Add default baudrate, parity, stop, and data bits constants, used to
initialize the uart_config struct, in case the corresponding UART DT
properties are not set.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller bde1cd8d38 drivers: serial: stm32: Move boot-time config to data
Move reset configuration from uart_stm32_data to
const uart_stm32_config struct, as this is set once at boot and isn't
modified during runtime.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Kenneth J. Miller 2531d70ad2 drivers: serial: stm32: Make header file self-contained
Move select include directives from source to header file, as these pull
data types required by the struct definitions contained within it.

This promotes a more modular file structure.

Signed-off-by: Kenneth J. Miller <ken@miller.ec>
2023-09-01 09:51:55 +02:00
Florian La Roche 9f0f9b8875 drivers/serial/uart_xlnx_ps.c: uart_xlnx_ps_driver_api is defined twice
The var "uart_xlnx_ps_driver_api" is defined twice in the source,
so remove one definition of it.

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2023-08-31 20:18:56 +02:00
Jeroen van Dooren 6ab706913a drivers: serial: stm32: add wide data support
Add wide data support to STM32.
Validated interrupt driven code on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren 435d5d1a94 drivers: serial: stm32: rework code for max re-use in wide data support
Restructuring code for poll_in/poll_out/fifo_fill/fifo_read because for
wide data support, all code is identical except the calls to
LL_USART_{ReceiveData8/TransmitData8}.
This allows both implementations, 8 and 9 bit data-width to call a
visitor function, passing the either the 8 bit or 9 bit data-width
function pointer.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Jeroen van Dooren 250e1f93ca drivers: serial: stm32: prevent stop/data-bits HW support code duplication
Preventing code duplication of macros checking for HW support on
stop bits and data-bits during runtime configuration.
Validated runtime configuration on an STM32H743.

Signed-off-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
2023-08-30 10:17:17 +02:00
Martin Jäger 0fbbe02f07 drivers: serial: esp32_usb: don't use k_usleep in poll_out function
The previous implementation called k_usleep to wait if the fifo was not
empty. This leads to an exception if called from an ISR (e.g. for
for logging).

In addition to that, the k_usleep leads to noticeable interruptions
when printing strings longer than the 64 bytes of the fifo.

With this commit, the function will busy-wait until all characters are
sent or if the timeout is reached. The timeout will only be reached if
no USB host is connected to the port. After the timeout is reached
once, the function will return immediately for subsequent calls
(dropping the characters to be sent) until the USB host is connected
again.

Fixes #60825

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-08-28 16:00:20 +02:00
Fabio Baltieri ec71be5d9d drivers,subsys: fix few missing k_work_delayable_from_work
Fix few instances of delayable work handlers using the k_work pointer
directly in a CONTAINER_OF pointing to a k_work_delayable.

This is harmless since the k_work is the first element in
k_work_delayable, but using k_work_delayable_from_work is the right way
of handling it.

Change a couple of explicit CONTAINER_OF doing the same work as the
macro in the process.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-08-28 10:12:21 +02:00
Gerard Marull-Paretas 9c961571a2 modules: cmsis: move glue code to modules/cmsis
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).

To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.

All files including CMSIS have been updated.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-08-24 13:20:21 +02:00
Diego Elio Pettenò 9a882f8b09 uart_sam0: fix shadowed variable.
This code was added to CI after the `-Wshadow` stack was prepared, so it
was not fixed together with the rest.

Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
2023-08-22 14:26:59 +02:00
Diego Elio Pettenò 4cada3ecaf uart_sam0: don't consume CONFIG_UART_ASYNC_API directly.
There are situations in which the async API for uart can be provided
by another driver (case in point, uart_rtt), and thus there is no valid
DMA controller for the uart_sam0 driver to talk with.

By separating the configuration, there's no need to exclude samd20-based
boards (that have no DMA peripheral) from the uart_async_api tests.

Signed-off-by: Diego Elio Pettenò <flameeyes@meta.com>
Co-authored-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-08-21 17:15:29 +02:00
Daniel Leung 7c208be144 uart: renames shadow variables
Renames	shadow variables found by -Wshadow.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Manuel Arguelles 3112b6de1a serial: nxp_s32: use CONFIG_SERIAL_INIT_PRIORITY
Use CONFIG_SERIAL_INIT_PRIORITY instead of the generic device driver
init priority.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-08-09 08:28:52 +00:00
Ryan McClelland 652cabeb85 drivers: serial: fix zephyr.h warning
When compiling the cadence uart, a warning is generated for the
zephyr/zephyr.h include. Fix it to be zephyr/kernel.h.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-08-07 18:51:28 +00:00
Jason Mitchell 74d08d69b2 drivers: serial: cmsdk_apb: fix irq_rx_ready deviation
The docstring for uart_cmsdk_apb_irq_rx_ready says "@return 1 if an
interrupt is ready, 0 otherwise" but the function actually returns 2 on
success. This commit fixes this to conform with serial driver API.

Signed-off-by: Jason Mitchell <jmitchell@radicalsemiconductor.com>
2023-08-07 12:01:25 -04:00
Maciej Sobkowski 59b66b8b6a drivers: serial: pl011: Select PINCTRL for Apollo4 SoC family
PINCTRL needs to be enabled for the driver to work on the Apollo4 family
SoCs.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski 60591598e5 drivers: serial: pl011: Add support for Ambiq UART
UART controller present in Ambiq SoCs is mostly compatible with PL011, but
requires some quirks that are implemented in this commit:
- the peripheral needs to be powered on first, via the PWRCTRL core,
- peripheral clock needs to be enabled and configured via the CLKEN/CLKSEL.
  registers.

The quirks mechanism was inspired by support for STM32F4 SoC in the
usb_dc_dw driver (fce0b85eca).

Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski a86ee2f2af drivers: serial: pl011: add definitions for CLKEN/CLKSEL registers
Add definitions for CLKEN/CLKSEL registers, which are used to control
peripheral clock on the variant of the PL011 UART present in Ambiq SoCs.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Maciej Sobkowski 1c92b91fb4 drivers: serial: pl011: move register definitions into a header
The registers definitions will be needed when adding vendor-specific quirks
to this driver, so this commits moves them to a dedicated header file.

Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
2023-08-04 10:48:58 +02:00
Dong D Wang 6fd3cf6a5b drivers: serial: sedi: cleanup init code
remove semaphores unused currently
remove two init helper maro

Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
2023-07-31 13:13:47 -04:00
Dong D Wang c896e1ed15 drivers: serial: sedi: add new dts attri peripheral-id
It's used to pass right device index to hal_intel module.
DT_INST_FOREACH_STATUS_OKAY() does not guarantee the node ordering.

Signed-off-by: Dong D Wang <dong.d.wang@intel.com>
2023-07-31 13:13:47 -04:00
Nachiketa Kumar 9f6d6a0fa7 drivers: serial: Add Intel SEDI driver
Adds a new serial shim driver for Intel SoCs. Builds upon the SEDI bare
metal UART driver in the hal-intel module.

Signed-off-by: Nachiketa Kumar <nachiketa.kumar@intel.com>
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
2023-07-28 17:49:09 +02:00
Wojciech Sipak bff69f5384 drivers: pinctrl: add driver for EOS S3
This adds a new pinctrl driver for Quicklogic EOS S3 SoC

Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:59:59 +02:00
Wojciech Sipak 40fa96506b drivers: pinctrl: Add pinctrl driver for Gecko Series 1
This adds a new pinctrl driver for EFM32.

Co-authored-by: Todd Dust <Todd.Dust@silabs.com>
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
2023-07-26 14:33:03 +02:00
Girisha Dengi f0ac2347da drivers: serial: Add optional reset line for uart_ns16550
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Marek Matej 6b57b3b786 soc: xtensa,riscv: esp32xx: refactor folder structure
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:

- changing the CONFIG_SOC_ESP32* to refer to
  the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
  the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
  provide a SOC model config
- introducing the 'common' folder to hide all
  commonly used configs and files.
- updating west.yml to reflect previous changes in hal

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-07-25 18:12:33 +02:00
Andrzej Głąbek aa7d675935 drivers: serial: nrfx: Clean up driver instantiation
- use CONFIG_HAS_HW_NRF_* symbols consistently in nRF multi-instance
  drivers when creating particular driver instances
- remove unnecessary hidden Kconfig options that indicated the type of
  peripheral to be used by a given instance (e.g. SPI, SPIM, or SPIS)
  and enabled proper nrfx driver instance; instead, use one option per
  peripheral type and include the corresponding shim driver flavor into
  compilation basing on that option (not the one that enables the nrfx
  driver as it was incorrectly done so far in some cases)

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-07-25 13:41:51 +02:00
Fabio Baltieri ab9028518e drivers: uart_nrfx_uart{,e}: on clear async pointers when enabled
Fix a build error introduced in 9f02eeadf8, the async pointers are only
available when UARTE_ANY_ASYNC is set.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-07-24 17:31:08 +00:00
Daniel Leung 20021abf0a serial: ns16550: check return of clock_control_get_rate()
This adds a check of the return of clock_control_get_rate(),
and returns error in uart_configure() if unsuccessful in
getting clock rate.

Fixes #60478

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-24 09:07:11 +00:00
Daniel Leung 343772213a serial: CONFIG_UART_USE_RUNTIME_CONFIGURE on API for cfg funcs
This adds the CONFIG_UART_USE_RUNTIME_CONFIGURE guard to
disable the API function pointers if the kconfig is not enabled.
Both .configure and .config_get should only be usable if runtime
(re-)configuration of UART is needed.

Ifdef guards are added to drivers previously lacking this guard.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-21 17:46:12 -04:00
Sean Nyekjaer d0651a8d96 drivers: serial: stm32: void return value from reset_line_toggle_dt
Suggested-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2023-07-20 10:57:12 +00:00
Daniel Leung 9f02eeadf8 serial: allow callback setting to be exclusive
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.

Fixes #48606

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-18 11:13:02 +00:00
L Lakshmanan 24759511f4 drivers: uart: Add support for UART_NS16550 TI K3 variant
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-14 09:37:44 +02:00
Tim-Marek Thomas 5d75940ae3 boards: riscv: neorv32: Updates compatibility to neoverse v1.8.6
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).

Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
2023-07-11 18:19:55 +00:00
Mykola Kvach cb9d1607b3 drivers: uart_rcar: do MMIO mapping inside driver
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).

There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.

Note: it is common approach according to Zephyr documentation.

Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
2023-07-11 11:17:41 +02:00
Alberto Escolar Piedras 1842c602ec drivers serial native ptty: Split in top and bottom
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-10 09:53:22 +02:00
Najumon B.A b4ed6c4300 drivers: serial: driver init level based on parent node
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-07-08 09:00:03 +03:00
Armin Brauns b95cdb2a33 drivers: serial: stm32: add support for RS485 configuration
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.

This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.

This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:

$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
    grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
    cut -d/ -f6 |\
    sort -u

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-07-07 13:16:27 +02:00
Alp Sayin 3a4419eff0 drivers: uart_mcux_flexcomm: Merge conditions for enabling ISR
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
2023-07-06 11:48:49 +02:00
Alp Sayin 657cbe3a8f drivers: uart_mcux_flexcomm: fix mcux_flexcomm_isr unused for polled uart
When UART_INTERRUPT_DRIVEN=n, mcux_flexcomm_isr and the data structure
inside is left unused. This patch turns off the build of the entire ISR.

Signed-off-by: Alp Sayin <alpsayin@gmail.com>
2023-07-06 11:48:49 +02:00
Jan Peters ecc665247b drivers: uart_mcux_lpuart: move critical function call out of assert()
without the call of LPUART_ClearStatusFlags(), the interrupt can
immediately trigger again, blocking the application.
CONFIG_ASSERTS=n removes the assert() including the call of
LPUART_ClearStatusFlags().
Also removed LPUART_ClearStatusFlags call for unclearable
kLPUART_TransmissionCompleteFlag.

Signed-off-by: Jan Peters <peters@kt-elektronik.de>
2023-07-06 11:48:22 +02:00
Lucas Tamborrino ae6b398f51 dts: xtensa: espressif: esp32s3: add USB CDC support
Enable USB CDC with self stack support for esp32s3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-07-06 09:46:37 +00:00
Alberto Escolar Piedras abf6da6318 drivers for POSIX arch: Add external libc dependencies
Quite a few of the drivers meant for the POSIX arch
interacted with the host directly, and will not
work when we use an embedded libC.

Until we fix them, let's add the appropriate
kconfig dependencies to avoid users trying to build them.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-07-05 07:01:19 -04:00
Ibe Van de Veire 007dc6d98f drivers: uart: atmel_sam: Added reset after error check
Following the sam4s datasheet, the OVRE, PARE and FRAME flags should be
cleared after a uart error occured. This is done writing a 1 to the
RSTSTA bit in the UART_CR.

Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
2023-06-29 21:07:32 +02:00
Manojkumar Subramaniam d78c0e538c drivers: serial: add uart_efinix_sapphire initial version
Add UART driver for Efinix Sapphire SoCs

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-06-27 12:09:57 +00:00
sukrit buddeewong c5bb959b25 driver: uart: Fix Modbus data currupted by DE-RE signal
Add UART_UARTFR_BUSY_BITS To fix modbus data was currupted

Signed-off-by: sukrit buddeewong <sukrit.omu@gmail.com>
2023-06-21 09:34:08 +00:00
cyliang tw 6176687c88 drivers: serial: support for Nuvoton numaker series UART
Add Nuvoton numaker series UART support, including interrupt-driven,
also apply pinctrl and clock-control.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2023-06-21 09:26:00 +00:00
Marko Sagadin 54cbf45c74 drivers: uart: add support for serial ports on native posix
Add support for communication with serial ports on native POSIX platform
via UART driver API. Serial port driver supports polling API,
configuration of the serial ports used via devicetree and command line
options, and runtime configuration with `uart_configure`.
Multiple instances of the driver are supported.
Example use and configuration is also demonstrated in the
`samples/drivers/uart/native_tty` sample.

Closes: #56586

Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
2023-06-21 09:27:22 +02:00
Lucas Tamborrino 97be30cccb drivers: uart: esp32s3: add async support
Add uart async api support for esp32s3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-06-17 08:00:31 -04:00
Daniel Leung 26ecaba4af drivers: syscalls: use zephyr_syscall_header
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-17 07:57:45 -04:00
Gerard Marull-Paretas ecc241e0ce drivers: serial: cc32xx: add support for pinctrl
Driver will configure pins using the pinctrl API now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-06-17 07:55:43 -04:00
Peter McGaughey 3104ad0e39 drivers: serial: uart_sam0: fix uart_sam0_irq_update TXC reset
drivers: serial: uart_sam0: fix uart_sam0_irq_update TXC reset bug

uart_sam0_irq_update function resets flags that will cause int. re-entry
existing implementation also clears the TXC flag if it is set
this breaks transmit complete detection

Per the SAMD5x/E5x Datasheet Sect. 34.8.6, writing '1' to the TXC will
clear the flag and disable TX complete interrupts, this should be
preserved through the irq_update for use in the tx_complete check function

The proper fix will cache the TXC value before conditionally clearing the
flag based on that cached value. If you do not condition this on the
cached value a race condition will periodically occur where
the TXC is cleared but never cached.

Fixes zephyrproject-rtos#55386

Signed-off-by: Peter McGaughey <peter.mcgaughey@daikincomfort.com>
2023-06-13 15:09:28 -04:00
Daniel Leung d88840a8aa Revert "drivers: serial: ns16550: Add support for Async APIs"
This reverts commit 2d03aaf99f.

The async API for NS16550 is incomplete. We are near the next
release so it is better to revert it for now, and a proper
correct implementation can be done before next-next release.

Relates to #57103

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-13 06:59:33 -04:00
Declan Snyder bdaa870e59 drivers: uart_mcux_flexcomm: Unlock IRQ if error
Currently the flexcomm uart driver will not unlock IRQ
if there is an error, which might cause some problems, fix this.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-06-12 14:03:43 -04:00
Andrzej Głąbek 5a57fa2c79 drivers: uart_nrfx_uart: Request next buffer only when needed
Recent refactoring of the uart_async_api test (see commit
eb44414af9) revealed an issue
in the uart_nrfx_uart driver that it requested the next RX
buffer even if one was already set up (such request was just
ignored in the previous form of the test, so the problem did
not come out so far).
This patch prevents such incorrect requests from appearing.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-06-06 09:34:29 +02:00
Alberto Escolar Piedras 294ccc1cb8 drivers: uart_native_posix: Check return values of system calls
Let's check the return values of all system calls
to ensure they do not error, or handle it gracefully
if they do.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-06-01 18:04:25 -04:00
Francois Ramu d69f7636e3 drivers: serial: stm32 uart driver asserts when baudRate >=16
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-05-30 13:16:05 -04:00
Xudong Zheng 147d4067e6 drivers: serial: rpi_pico: add support for hardware flow control
Flow control will be enabled for UART if hw-flow-control is set.

Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
2023-05-30 09:00:09 -04:00
Abram Early a59c948256 drivers: serial: stm32 uart implements driver enable
Enables the use of the hardware DE pin provided by an stm32 UART using
device tree flags.

Signed-off-by: Abram Early <abram.early@gmail.com>
2023-05-26 14:55:30 -04:00
Declan Snyder cf34d2cbdc drivers: uart_mcux_flexcomm: Add ASYNC API
Support ASYNC API on Flexcomm UART

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-05-26 13:15:24 -05:00
Declan Snyder e9a8389639 drivers: uart_mcux_flexcomm: Clean up
Clean up slashes in init macro to be less messy

Update copyright to reflect recent code changes by NXP

Update outdated driver description comment

Change irq driven api variables naming to be more specific

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-05-26 13:15:24 -05:00
Declan Snyder 4f290e6173 drivers: uart_mcux_flexcomm: Simplify init macros
The flexcomm uart mcux driver init macros have a lot
of unnecessary and confusing redundancy, so let's
simplify them.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-05-26 13:15:24 -05:00
Fabio Baltieri 2ebad47eaa drivers: serial: ite_it8xxx2: add a dedicated priority symbol
The uart_ite_it8xxx2 is relying on a node that depends on a matching
ns16550 symbol, such as:

ite_uart1_wrapper: uartwrapper@f02720 {
        compatible = "ite,it8xxx2-uart";
	...
        uart-dev = <&uart1>;
};

But the two are currently setup to initialize at the same level and
priority. Add a dedicated priority symbol so that the wrapper device is
always initialized after the main one, regardless of the linker order.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-05-26 13:51:08 -04:00
Alberto Escolar Piedras 0ae060d174 drivers: Console: Move all posix arch boards to same driver
All posix arch boards are required to provide the same
tracing/print API.
So, instead of having a different driver for native_posix and the
bsim boards, let's have a common one which uses this API.
This in turn results in the printk strings being printed in
the same underlaying backend as before with individual drivers.

A part from this, the native_posix console driver was a full
backend for the now long gone Zephyr console shell
(named legacy_shell from 527256501f
until it was retired in fd0b7f7767).
The whole input handling in this driver was dead code
(since 140a8d0c8a)

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-05-26 12:57:41 +02:00
Carlo Caione 6f3a13d974 barriers: Move __ISB() to the new API
Remove the arch-specific ARM-centric __ISB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Carlo Caione 2fa807bcd1 barriers: Move __DMB() to the new API
Remove the arch-specific ARM-centric __DMB() macro and use the new
barrier API instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-05-24 13:13:57 -04:00
Huifeng Zhang 26d8714eed driver: uart: pl011: fix interrupt driven API
API function:
    - `pl011_irq_tx_enable` is expected to enable and trigger TX interrupt.
    Due to HW limiation, PL011 won't trigger TX interrupt if some data
    wasn't filled to TX FIFO at the beginning. So that `isr_cb` must be
    called at first time to enable TX irq.

    - `pl011_irq_tx_ready` will return true when FIFO can accept more
    data. Here we don't need wait TX FIFO to be empty.

    - `pl011_irq_tx_complete` will return true when all data have been
    sent from the shift register.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-05-17 09:49:03 +02:00
Huifeng Zhang 0da7e06992 driver: uart: pl011_sbsa: refine creating device instance
Create pl011_sbsa device instance via the DT_INST_FOREACH_STATUS_OKAY
macro.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2023-05-17 09:49:03 +02:00
Mulin Chao 9da9c90639 intc: miwu: npcx: improve interrupt latency of miwu input events
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-05-17 09:48:54 +02:00
Mahesh Mahadevan f2fd5c3779 drivers: uart_mcux: Do not enable and disable the transmitter
Do not enable and disable the UART transmitter

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2023-05-16 12:08:32 +02:00
Sylvio Alves 01da4df197 drivers: uart: esp32: fix baudrate return value
Baudrate value was not updated properly when requested.

Fixes #57746

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-05-12 09:59:25 +02:00
Mateusz Holenko 534952adff drivers: serial: uart_miv: Disable SERIAL_SUPPORT_INTERRUPT
In the real MiV platform, UART does not have any interrupts routed to
the interrupt controller.

Up to this stage, the driver implemented a separate thread to simulate
interrupt operation to enable shell samples. This is not required anymore,
as Zephyr can run shell on interrupt-less UARTs.

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2023-05-08 16:59:21 -04:00
Cyril Fougeray 1be72d9888 dma: callback with 2 status codes for successful transfers
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-05-08 09:57:32 +02:00
Adam Wojasinski efa3ddd516 drivers: serial: uart_nrfx_uarte: Align use of TIMER macro in ASYNC API
nrfx 3.0 introduces parameter `_frequency` in
`NRFX_TIMER_DEFAULT_CONFIG()` macro. This patch aligns use of it.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Filip Kokosinski a30862455e treewide: rename Microsemi to Microchip
Do a treewide Microsemi to Microchip rename and update obsolete links in
the board docs.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-05-04 10:47:07 +02:00
Declan Snyder 7ef5445e18 drivers: uart_mcux: Do not select async support
Commit f1b0b458b0 mistakenly selected the
SERIAL_SUPPORT_ASYNC kconfig for the kinetis uart
driver when enabling the lpuart driver. Revert this,
because the kinetis uart driver does not support async api.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-05-02 21:02:43 +02:00
Yonatan Schachter b5a7949e8a drivers: serial: Added rpi_pico driver over PIO
Implements a UART driver using PIO. Both PIOs are supported.
Only polling API is supported. Only 8N1 mode is supported.

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2023-04-25 13:12:02 +02:00
Gerard Marull-Paretas c66f594c41 drivers: all: rv32m1: remove conditional support for pinctrl
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Gerard Marull-Paretas 989d103d53 drivers: all: mcux: remove conditional support for pinctrl
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-24 13:34:22 +02:00
Francois Ramu 1b2942ffee drivers: serial: stm32U5 uart driver do not toggle the DMA Tx request
Errata sheet of the stm32U5 (ES0499) recommends to avoid clearing
the DMAT bit with LL_USART_DisableDMAReq_TX to re-start
a DMA transfer on the UART Tx block. The function becomes empty.
This is also seen for stm32H5.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-20 10:44:07 +02:00
Gerard Marull-Paretas 1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Anisetti Avinash Krishna 79f2b5471c drivers: serial: ns16550: Fixed a bug related to shell failure
Updated boot priority to PRE_KERNEL_1 for all instances
and removed dependency on PCIe. As shell is not working
in a situation where console is using a UART instance
under PCIe and boot priority set to POST_KERNEL.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-04-13 20:50:41 -04:00
Alberto Escolar Piedras 659e2292a5 soc_inf: Refactor native tasks into own header
The native_tasks definition was directly in the soc_inf soc.h
header. But soc.h pulls a lot of other headers.
Some of those could cause conflicts, say with application
headers, for users who only wanted the be able to register
native tasks in a module.

Let's refactor the native tasks definitions into their own header
and include that header from soc_inf's soc.h.
In this way users who need only need to register a native tasks
can just include posix_native_tasks.h, and all previous users
see no change.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-04-13 13:35:20 +02:00
Gerard Marull-Paretas a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Andriy Gelman e537410a74 drivers: serial: uart_xmc4xxx: Minor cleanups
Forward return of dma_start() instead of assigning to ret.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-04-12 08:59:20 +02:00
Andriy Gelman 321254f433 drivers: serial: uart_xmc4xxx: Fix race condition
Fixes a race condition between uart_xmc4xxx_dma_rx_cb() and rx timeout.
Although uart_xmc4xxx_dma_rx_cb() called k_work_cancel_delayable()
to cancel the timeout callback, it would not actually be cancelled if
the callback was already in a running state.

Fix the race condition by checking if dma transaction is already
completed in the timeout callback.

This also fixes unit test tests/drivers/uart/uart_async_api on
xmc45_relax_kit which started to fail after commit
f3afd5a4c9.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-04-12 08:59:20 +02:00
Anisetti Avinash Krishna 2d03aaf99f drivers: serial: ns16550: Add support for Async APIs
Added support for async APIs for ns16550. This will be
enabled by kconfig CONFIG_UART_ASYNC_API.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-04-06 07:50:42 +00:00
Pieter De Gendt 6b532ff43e treewide: Update clock control API usage
Replace all (clock_control_subsys_t *) casts with (clock_control_subsys_t)

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-04-05 10:55:46 +02:00
Sylvio Alves 4c86a44bcd driver: usb_serial: esp32c3: fix USB port behavior
- Fixes missing poll out events when UART interrupt is enabled
- Fixes blocking USB interface during board start up.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-04-04 14:30:15 +02:00
Andrzej Głąbek 7058f3722e drivers: uart_nrfx_uarte: Revert workaround for bytes dropping
This effectively reverts the following three commits:
- 0f9f18843f
- 6812441099
- 326f7bd450
and also the changes that got copied to the nrf5340_audio_dk_nrf5340
board.

The workaround brings more harm than good. It already required many
tweaks in various tests to make them pass (because it introduced
a significant overhead in processing of the console UART interrupt)
and now it makes the I2S driver tests to fail. It's not reasonable
to add more tweaks in Zephyr tests just to keep this workaround in
the tree. Instead the root cause should be fixed (if the original
problem still occurs).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-04-04 13:45:17 +02:00
Pawel Czarnecki 9f10881f1d drivers: uart: gecko: add support for efr32xg24
Add missing case when there is only one USART

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2023-04-04 13:34:45 +02:00
Anisetti Avinash Krishna 26133e995d drivers: serial: ns16550: Enable simultaneous support of IO, MMIO and PCIe
Enabled simultaneous support by adding a DTS variable named “io-mapped”.
There are 3 possibilities through instance in dtsi file.
Under PCIe, PCIe ns16550.
Under soc and has a variable io-mapped, legacy(IO mapped).
Under soc and don’t have a variable io-mapped, MMIO mapped.
Simultaneous access can be enabled by a Kconfig.
For PCIe instances UART initialization should be done post-kernel as it
depends on PCIe initialization.

Co-authored-by: Najumon BA <najumon.ba@intel.com>
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-30 09:43:29 -04:00
Jordan Yates f423ec255f serial: rtt: select SERIAL_SUPPORT_ASYNC
The RTT serial drivers support the async API, so select the approriate
symbol.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-03-30 09:51:18 +02:00
Henrik Brix Andersen c41dd36de2 drivers: kconfig: unify menuconfig title strings
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".

Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-03-28 15:06:06 +02:00
Romain Mahoux b096e092fa drivers/apbuart: correct the baud formula
The formula of set_baud first function was not consistent with the get_baud
one.

Signed-off-by: Romain Mahoux <romain@mahoux.fr>
2023-03-27 22:15:33 +00:00
Fabian Blatz 6180f96799 serial: Add driver for emulated UART
The emulated UART controller will aid in automated
integration testing.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-03-27 09:50:44 +02:00
Dean Sellers 8eddd48615 drivers: uart: esp32: Add RS485 half duplex hardware mode
Support for the hardware mode where pin configured as DTR
is asserterted when UART transmits.

Signed-off-by: Dean Sellers <dsellers@evos.com.au>
2023-03-22 13:52:25 +01:00
Gerson Fernando Budke f21c936d49 drivers: serial: sam: Update to use clock control
This update Atmel SAM uart and usart  drivers to use clock control
drivers.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Anisetti Avinash Krishna 00991e4720 drivers: serial: ns16550: Moved PCIe probe to init function
Moved PCIe probe from configure function to init function
because whenever uart_configure api is called MMIO address
is getting updated.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-21 18:10:12 +00:00
Anisetti Avinash Krishna 712dab4f04 drivers: serial: ns16550: Fixed set_baud_rate usage in line ctrl set
Added pclk parameter to set_baud_rate function in line_ctrl_set api
which was missed during update of set_baud_rate function definition
update.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-21 18:10:12 +00:00
Robert Hancock 86e1740cfc serial: xilinx: uartlite: Fix infinite spin in xlnx_uartlite_fifo_read
The xlnx_uartlite_fifo_read function would spin indefinitely if there
was less data available in the RX FIFO than the size of the passed-in
buffer. This call is supposed to be non-blocking.

Fixed to break out of the loop if there are no more bytes left in the RX
FIFO.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2023-03-20 10:21:37 +01:00
Evgeniy Paltsev 56572687c7 drivers: serial: add virtual uart over ARC hostlink channel
Add support for virtual UART device that uses ARC Hostlink channels
for data transfers. Due to the Hostlink principle, this driver
supports only polling API.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2023-03-17 11:49:02 +01:00
Artur Rojek 14912d241c nxp: imx: Implement iuart clock gating
Add clock control support for UART controllers found in i.MX SoC family.
This change moves clock gating out of respective `soc.c` files and into
clock controller's `clock_control_on`/`_off` methods, allowing for
dynamic clock state control, and setup via Device Tree bindings.

This is especially important on SoCs, where Zephyr is sharing the bus
with cores running other OSes, such as might be the case for i.MX 8MM.

Unfortunately, Zephyr doesn't possess an ability to represent clock
hierarchy (e.g. via DT's `assigned-clocks` property), so clock source
and frequency still need to be hardcoded in aforementioned `soc.c`
files.

Signed-off-by: Artur Rojek <artur@conclusive.pl>
2023-03-15 09:13:10 +01:00
Jeppe Odgaard c3b6ad07c1 drivers: uart: mcux_lpuart: add parity support
Read and use device tree parity value.
If the property is not set parity none is used.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2023-03-09 09:20:44 +01:00
Grant Ramsay 9df37fff79 drivers: serial: Add pinctrl support to the NS16550 driver
This enables configuring pins for the UART

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-03-02 13:50:06 +01:00
Nazar Palamar f956e81bb6 drivers: serial: Add Infineon CAT1 UART driver
Added initial version of Infineon CAT1 UART driver.
Added initial version of binding file for Infineon CAT1 UART driver.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-03-01 11:44:57 +01:00
Gerard Marull-Paretas 27b73a116f soc: arm: nordic_nrf: replace NRF_DT_CHECK_PIN_ASSIGNMENTS
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Gerard Marull-Paretas aa9df1abc0 drivers: serial: nrfx_uart/e: drop -pin support
UART/E driver will only support using pinctrl now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-02-28 08:42:05 -08:00
Sylvio Alves f1cc21a146 driver: uart: esp32s3: enable ESP32S3 uart interface
Includes additional SoC specific headers.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-02-27 19:41:33 +01:00
Jordan Yates b83cf1f1ee drivers: serial: uart_rtt: fix multi-channel
Populate the `channel` index when constructing configuration structs for
secondary RTT channels. Originally missed in #27704.

Fixes #54955.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-02-25 06:55:58 -05:00
Grant Ramsay f92dd6d357 drivers: serial: Name the NS16550 variant Kconfig choice
Naming this choice allows setting a default value in defconfig.

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-02-24 18:11:56 +01:00
Goh Shun Jing 9ecfa4decc drivers: serial: uart_altera: add driver
Add driver for altera avalon uart core.

Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-02-23 09:26:33 +01:00
Mulin Chao 809e63a91a driver: uart: npcx: add missing tx/rx interrupt enabled checks
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-02-22 16:30:08 +01:00
Mulin Chao dbc614ee10 driver: uart: npcx: avoid concurrency writing UFTCTL register
In order to avoid concurrency situation during writing UFTCTL register,
this CL adds critical sections to prevent the unexpected result if the
driver wants to set/clear bits of this register.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2023-02-22 16:30:08 +01:00
Andriy Gelman 4e13e6ada7 drivers: serial: xmc4xxx: Fix Kconfig help entry
The configurations are no longer hard coded for UART_0.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Andriy Gelman 30b11260be drivers: uart_xmc4xxx: Add async support
Adds async uart for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Andriy Gelman cfeaada65e drivers: uart_xmc4xxx: Change order of functions
This patch is in preparation of uart async support. There are no
functional changes. The patch changes the ordering of functions to
organize shared functions between async/interrupt driven in the same order.
Also move uart_xmc4xxx_init() so that a forward declaration can be
removed.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Andriy Gelman 3dac715569 drivers: uart_xmc4xxx: Split up tx/rx into separate service requests
In preparation for async support. In async uart, service requests are
forwarded to separate dma lines. This patch splits up tx/rx into
separate service requests to enable this.

Also put service request enable code into a separate function. Before,
the same code was generated for different uart devices.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-02-21 21:15:53 +01:00
Muhammed Ahmed 3f0fc7fe6b drivers: serial: Add PM support for UART MCUX
Adding PM support to uart_mcux by gating clock and disabling transmitter

Signed-off-by: Muhammed Ahmed <muhammed.ahmed@intel.com>
2023-02-19 20:56:16 -05:00
Ramon Aerne a5e04ccd4a drivers: serial: rp2040: fix rpi pico address mapping
Address map used for config item `uart_dev` and `uart_regs` is
currently derived using the rpi hal macros `uart0` and `uart1`
which map to the same register address as given in the `reg` property
of the devicetree.

However, the sdk macro is generated using `uart##idx` which zephyr does
not necessarily map to uart0 or uart1.
This is, for example, the case when disabling uart0 with the devicetree
status "disabled"
and enabling uart1 for which then the idx==0 and not 1 which therefore
maps to the wrong controller address space.

This can simply be fixed by deriving the base address from
`DT_INST_REG_ADDR(idx)` instead

Signed-off-by: Ramon Aerne <ramon.aerne@axelera.ai>
2023-02-09 23:40:38 +01:00
Francois Ramu 7dff172519 drivers: serial: stm32 uart driver avoid LOG_WRN when going to sleep
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-02-09 13:14:46 +01:00
Fabio Baltieri 20644536b9 uart: microchip: fix build error with PM_DEVICE=n
Fix a build error when the driver is built with:

CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y

due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.

Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-30 18:54:59 +00:00
Jay Vasanth 343d1919f1 uart: microchip: add low power & wake support
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-01-27 14:25:58 -05:00
Goh Shun Jing 5858cca8b8 drivers: serial: uart_altera_jtag: enhancement
implement uart poll in and interrupt driven api.

Signed-off-by: Goh Shun Jing <shun.jing.goh@intel.com>
2023-01-27 14:24:43 -05:00
Shawn Nematbakhsh 1d3fb5490f drivers: serial: Add support for OpenTitan serial UART
UART output confirmed to work in simulation.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2023-01-27 19:25:26 +09:00
Cyril Fougeray 51fa86bb98 drivers: exti: stm32: expose STM32_EXTI_LINE_NONE
Common STM32_EXTI_LINE_NONE for declaration and setting
of wakeup EXTI line when configured.

Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
2023-01-27 01:02:08 +09:00
Mulin Chao 5973a944af Revert "driver: uart: npcx: add missing tx/rx interrupt enabled checks"
This reverts commit 271b306.

In rare conditions, this commit causes the uart shell mechanism to
corrupt on Cros ec system. Revert this commit on upstream repo first to
avoid blocking the development. Will dig out why this symptom occurs
later.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2023-01-18 16:08:49 +01:00
Lucas Tamborrino 41b431a01a drivers: uart: esp32c3: Add async support
Add UART async support for ESP32C3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-01-12 19:09:01 +01:00
Manuel Arguelles 415131c2e4 drivers: serial: rename S32 to NXP S32
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2023-01-04 16:51:38 +01:00
Dawid Niedzwiecki 4a2a512c11 drivers: serial: fix STM32 async uart driver
Fix a bug that causes not handling an IDLE line detection interrupt for
some STM chips, e.g. STM32F412. It impacts the async UART
communication - an information that data have been recieved is lost.

The issue occurs when the IDLE flag is set during handling another UART
interrupt, e.g Transmission complete. The ISR calls uart_stm32_err_check
function, which clears the noise error flag with LL_USART_ClearFlag_NE
without any additional checks. Unfortunately, clearing the noise flag
also clears the IDLE flag for some chips(an read to the USART_SR
register followed by a read to the USART_DR register for STM32F412
clears PE, FE, NF, ORE and IDLE flags), hence the ISR is not called
again for the IDLE event. The IDLE flag is no longer set.

Add checking the noise flag before clearing it.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2023-01-04 10:33:49 +01:00
Marcin Szymczyk 6e5f432eee drivers: serial: nrfx: ifdef optional baudrates
Some baudrates are not supported in certain SoCs.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-12-28 10:38:09 +01:00
Declan Snyder f2e0ac5c58 drivers: uart_mcux_flexcomm: Add runtime configure
Add uart_configure and uart_config_get functionality to
MCUX flexcomm driver to be able to dynamically configure
flexcomm uart at runtime.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-12-21 09:38:33 -06:00
Mulin Chao 271b306b2d driver: uart: npcx: add missing tx/rx interrupt enabled checks
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-12-21 12:19:13 +01:00
Andrzej Głąbek c984a343af drivers: uart_nrfx_uarte: Prevent re-enabling RX until UART_RX_DISABLED
Fix the driver so that after a call to uart_rx_disable() it does not
allow re-enabling RX until the UART_RX_DISABLED is generated (what
means that the disabling procedure is complete). Otherwise, it is
possible that the RXTO event from the previous RX is handled right
after a new RX is started, and the RX buffer pointer gets corrupted
in the `rx_flush()` function.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-12-21 11:47:34 +01:00
Erwan Gouriou 66d4c64966 all: Fix "#if IS_ENABLED(CONFIG_FOO)" occurrences
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-12-21 10:09:23 +01:00
Pawel Czarnecki 0095eed3a1 dts: uart: silabs: make peripheral-id optional
peripheral-id property should be eventually removed.
For now set it as optional and allow skipping the usage
in UART driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-12-20 22:50:19 +01:00
Filip Kokosinski 9756766892 drivers: serial: uart_gecko: Make driver dependent on pinctrl
This commit adds a series of driver-related changes to
Gecko pinctrl.

Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-12-20 22:50:19 +01:00
Pawel Czarnecki e8d3673c13 soc: arm: silabs: remove soc_gpio_configure wrapper
It would be better to use GPIO_PinModeSet() functions directly
in the drivers.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-12-20 22:50:19 +01:00
Jiafei Pan 9d6bda0ec1 drivers: mcux_lpuart: fix compile warning
Fixed the following compile warnings:
../include/zephyr/sys/util.h:108: warning: "ARRAY_SIZE" redefined
hal/nxp/mcux/mcux-sdk/drivers/common/fsl_common.h:236: note:
this is the location of the previous definition

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-12-20 09:22:40 +01:00
Jiafei Pan e8d3e7d544 drivers: mcux_lpuart: remove unsed soc.h
soc.h will not used anymore, remove it.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-12-20 09:22:40 +01:00
Ravik Hasija 22e2b004df drivers: serial: Add Driver for CDNS UART IP6528
Adding New Serial/UART driver for Cadence UART IP6528.

Signed-off-by: Ravik Hasija <ravikh@fb.com>
2022-12-12 12:19:35 -05:00
Duong Vu Nam b24f4625f0 arch: support nocache for Cortex-R52
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.

Enable nocache in each driver use it.

Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
2022-12-12 10:39:31 +01:00
Patryk Duda 1aebcec02f drivers: serial: Reset UART using RCC before initialization
In multi-image environment, after jump to the image we can have UART in
unexpected state. Reset UART to default state to make sure that UART is
initialized properly and won't cause system to crash or hang.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-09 09:43:36 -08:00
Filip Brozovic c60e100ab3 drivers: serial: numicro: fix poll_in function
The poll_in function of the NuMicro UART driver was using the UART_Read
function from the Nuvoton HAL, which is blocking. Replace it with a
non-blocking implementation.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2022-12-08 18:46:33 +01:00
Filip Brozovic 617aa8cc65 drivers: serial: numicro: use pinctrl instead of hard-coded values
This commit enables the numicro serial driver to configure the UART
pins using the pinctrl API.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2022-12-08 18:46:33 +01:00
Grixa Yrev 4fe862e396 drivers: lpuart: enable rs485 mode
NXP LPUART IP supports rs485 mode when transceiver driver enable
using RTS. Allow setting rs485 mode up via the "nxp,rs485-mode"
dts property. "nxp,rs485-de-active-low" dts property can be used
for set RTS polarity.

Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
2022-12-07 10:12:14 +00:00
Andriy Gelman 9b43e3ac0f drivers: serial: uart_xmc4xxx: Fix write to fifo with more than one byte
Currently only the first byte was written when pushing more than
one byte into the fifo.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-12-05 11:03:22 +01:00
Francois Ramu e00f91da41 drivers: serial: uart driver for stm32U5 suspends dma channel
When DMA transfer is enabled on the stm32U5,
the UART Tx channel must be suspended before stopping.
This will let the on-going transfer ends properly

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Francois Ramu 0300b34cf0 drivers: serial: stm32 UART driver do not start Rx timer if null
This commit is optimizing the uart isr execution to avoid starting
the Rx timeout if it is null. In anycase the async_timer_start
function is checking the tiemout value. This will just save some
execution lines.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Francois Ramu 939b274507 drivers: serial: stm32 uart async is valid for stm32U5 serie
The UART_ASYNC is supported on the stm32U5 serie through the
GPDMA driver.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-23 11:32:27 +01:00
Andrzej Głąbek 595fbf9b97 drivers: uart_nrfx_uarte: Remove redundant HW_RX_COUNTING_ENABLED calls
Merge three adjacent `if (HW_RX_COUNTING_ENABLED(data))` blocks into
a common one.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-22 12:46:38 +09:00
Andrzej Głąbek 9628ecdc39 drivers: uart_nrfx_uarte: Fix call to HW_RX_COUNTING_ENABLED()
Since the macro references `data->async->hw_rx_counting`, it cannot
be called when `data->async` is NULL, and this could happen when the
PM_DEVICE_ACTION_RESUME action was requested for an instance that uses
the interrupt-driven API while for another instance that uses the
asynchronous API the hardware counting of bytes was configured.
Prevent this by calling the macro from a proper `if` block.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-22 12:46:38 +09:00
Jan Hilsdorf a429528e3d drivers: serial: convert Zephyr constants to rpi-hal constants
rpi-hal function "uart_set_format" expects data width in the range
of 5..8. So I created a new function “uart_rpi_set_format” which
contains common parts of “uart_rpi_configure”.

Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
2022-11-19 14:18:00 +09:00
Johan Hedberg fcfff0633e drivers: uart_ns16550: Convert to use runtime PCIe BDF lookup
Convert the ns16550 driver to use the new centralized runtime BDF lookup
of PCIe devices.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-16 11:18:43 +01:00
Akos Melczer d7d6a84b36 drivers: serial: rpi_pico: added functions for runtime uart configuration
Added functions for runtime uart configuartion for raspberry pico

Signed-off-by: Akos Melczer <webmastertd000@gmail.com>
2022-11-15 12:12:47 +00:00
Daniel Leung bbb2f8277a uart: ns16550: move command macro to public header
This moves the CMD_SET_DLF command macro to public header
so application can use it without weird include path to
include the "private" header file under drivers/serial.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-11-10 22:40:21 -05:00
Henrik Brix Andersen 3c99a1e015 drivers: pcie: reintroduce support for I/O BARs
Reintroduce support for accessing I/O BARs which was removed in
43d84147d9.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-11-01 15:22:31 -04:00
Gerard Marull-Paretas b1a0d0ae86 include: add missing zephyr/kernel.h
Some files were using the Kernel APIs/types without including
zephyr/kernel.h.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-20 22:52:09 +09:00
Jun Lin 42bb67ca85 driver: UART: npcx: remove unnecessary guard CONFIG_UART_INTERRUPT_DRIVEN
Currently, uart_npcx_pm_policy_state_lock* functions are guarded by
CONFIG_UART_INTERRUPT_DRIVEN && CONFIG_PM. However, it is unnecessary to
guard them with CONFIG_UART_INTERRUPT_DRIVEN as the polling mode UART
driver also uses these functions.
This commit removes it and leaves those functions guarded by CONFIG_PM
only.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-20 15:42:17 +02:00
Michal Sieron 88e8b69daf drivers: serial: Add QuickLogic USBserialport_S3B support
USB interface that may be used to send messages from a USB host to
the M4 processor in the S3B, and vice-versa.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2022-10-20 15:41:09 +02:00
Wouter Cappelle 984b612c48 drivers: uart: stm32 async uart driver should free next buffer
When disabling async rx, the next buffer is not free-ed by
the stm32 uart driver.

Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
2022-10-19 16:05:25 +02:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Lukas Gehreke 6fa4d722a6 drivers: serial: uart_pl011: implemented pinctrl
Added pinctrl to pl011 uart driver. This makes it usable
with the rp2040.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2022-10-17 10:13:46 +02:00
Andriy Gelman 7f00371948 drivers: uart_xmc4xxx: Add fifo support
Adds fifo support for tx/rx.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-14 15:06:19 +02:00
Andriy Gelman 5313598f6a drivers: uart_xmc4xxx: Add interrupt driven support
Add interrupt driven support.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-14 15:06:19 +02:00
Andriy Gelman 9b7e5b3696 drivers: uart_xmc4xxx: Use consistent struct name
Use consistent struct names for data and config.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-14 15:06:19 +02:00
Dat Nguyen Duy 3e8f854506 drivers: serial: support NXP S32 LINFlexD UART
This patch introduces support for NXP S32 LINFlexD peripheral operating
in UART mode. Polling and interrupt-based serial API's are supported.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Marek Pieta ea38e742b8 drivers: uart_native_posix: Fix reading file input
If the read function returns value of zero, there is no more data
in the file and the function should return value of -1.

Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
2022-10-13 16:21:08 -04:00
Christopher Friedt 582f77ea38 drivers: serial: gecko: fix impmlicit declaration of IRQ_CONNECT
Previously, the build was failing due to implicit declaration
of `IRQ_CONNECT`. Simply include `<zephyr/irq.h>` to fix.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2022-10-11 21:25:59 -04:00
Gerard Marull-Paretas 357b362824 include: add missing sys/time_units.h include
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas 6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Gerard Marull-Paretas acc8cb4bc8 include: add missing irq.h include
Some modules use the IRQ API without including the necessary headers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00