The static 'dlf' property is valid only for a specific PCLK/baud rate
combination. The current calculation accounts for this fixed value when
selecting the integer divisor, but cannot adapt to runtime baud rate
changes.
A low fixed PCLK may require a fractional divisor to reduce baud rate
error for the requested baudrate.
Add an opt-in 'dlf-auto' property to calculate the integer divisor and
DLF value together whenever the baud rate changes, using 1/64-resolution
fixed-point arithmetic. When enabled, 'dlf-auto' overrides 'dlf'.
Also enable DLF support when an instance uses either 'dlf' or
'dlf-auto'. Existing 'dlf' users are unaffected.
Signed-off-by: Bo Sun <bo.sun@kernel.li>
Add reset driver for the reset part of the ch32 rcc.
Use this new reset driven in `wch,usart` to reset the usart peripheral
before use.
Signed-off-by: Fiona Behrens <me@kloenk.dev>
This fixes a potential build warning introduced in 7b2a3c0cca, where
the static functions would get declard but not used if the board has:
- CONFIG_PM=y
- CONFIG_UART_ASYNC_API=y
- CONFIG_DMA=y
- the dma node enabled in devicetree
Reproduced with:
west build -p -b stm32f4_disco samples/hello_world -DCONFIG_PM=y
-DCONFIG_UART_ASYNC_API=y -DCONFIG_DMA=y
zephyrproject/zephyr/drivers/serial/uart_stm32.c:218:13: warning:
'uart_stm32_rx_wakeup_lock_get' defined but not used
Found this downstream, finding the specific combination of option and
dt override to reproduce this was a big mess, there's no benefit chasing
down the specific combination of ifdeffery here so let's just mark them
as maybe unused and if that combo hits the compiler can just drop them.
Between ifdefs form Kconfig and the HAL this driver is already VERY hard
to follow.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
MISRA C:2012 Rule 8.2 requires every parameter in a function type to be
named, including the parameters of function pointer parameters.
The cache, clock control, comparator, entropy, Ethernet, I2S and serial
drivers left callback parameters unnamed, or carried forward
declarations that dropped the names the definitions already use. The two
virtio callbacks get ARG_UNUSED() for the arguments they deliberately
ignore.
Name them after the arguments the documentation or the
definitions already use. No functional change.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
A UART that woke the SoC keeps PM_STATE_SUSPEND_TO_IDLE locked forever
once the hardware receiver timeout is in use.
The WKUP interrupt takes the lock and sets rx_woken. The IDLE arm of
uart_stm32_isr() would release it, but set_timeout_itr() disables the
IDLE interrupt when it programs RTOR, so the RTO arm reports the end of
reception instead and only clears the flag and flushes. The lock is never
released, so the system never enters a Stop state again.
Move acquire and release into helpers and call them from both paths, so
the behaviour at the end of reception is consistent.
Also move enable_wakeup_line out of the block with the PM policy helpers.
Tested on a nucleo_l476rg, cyclic asynchronous reception with PM enabled.
Fixes: #116273
Signed-off-by: Eden Frosst <eden.frosst@rbr-global.com>
The baudrate divisor calculation should take the fractional parameter
into account when a DLF-capable UART is used. Otherwise non-optimal
integer divisors can be derived, especially for low pclk or high
baud_rate values.
Signed-off-by: Andreas Weissel <andreas.weissel@synaptics.com>
If GPPI is using IPC communication then delay the initialization of an
UARTE instance which is using GPPI connection after GPPI is initialized
which happens after IPC service is setup.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
uart_gecko_irq_tx_enable() enables both the TXBL and TXC interrupts,
but nothing in the standard interrupt-driven flow clears the TXC
flag: it is write-1-to-clear and only uart_gecko_irq_tx_complete()
clears it, which typical interrupt handlers (servicing
uart_irq_tx_ready() and uart_irq_rx_ready()) never call. Once a
transmission completes, TXC stays pending and the UART interrupt
re-enters continuously whenever TX is enabled, spinning at hardware
interrupt priority between TXBL servicing opportunities.
This is the same defect as in the silabs usart driver fixed by the
previous commit, where it was measured on hardware (82017 ISR entries
for 1811 TX-ready services on xg24_rb4186c). The gecko driver shares
the exact structure: TXC enabled as an interrupt source, no stale
flag clearing in irq_tx_enable() or irq_tx_disable(), and
irq_is_pending() not reporting TXC. This change is build-tested for
slwrb4104a but not validated on Series 0/1 hardware.
Only enable TXBL, which is sufficient to pace FIFO refills, and clear
the stale TXC flag when TX is disabled so uart_irq_tx_complete()
cannot report a completion from a previous transmission.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
uart_silabs_irq_tx_enable() enables both the TXBL and TXC interrupts,
but nothing in the standard interrupt-driven flow clears the TXC flag:
it is write-1-to-clear and only uart_silabs_irq_tx_complete() clears
it, which typical interrupt handlers (servicing uart_irq_tx_ready()
and uart_irq_rx_ready(), as the console, shell and Bluetooth monitor
do) never call. Once the first frame completes, TXC stays pending and
the UART interrupt re-enters continuously for the whole duration of a
transmission, spinning at hardware interrupt priority between TXBL
servicing opportunities (one byte time apart at the configured baud
rate). The driver's own irq_is_pending() does not include TXC either,
so the documented "while (uart_irq_is_pending())" handler idiom cannot
observe the interrupt cause it is being invoked for.
This is distinct from and not addressed by commit 3a6406439c
("drivers: serial: silabs: Only clear processed flags"), which fixed
flag clearing inside irq_tx_complete() itself but did not change TXC
being enabled as an interrupt source that no standard handler
acknowledges.
Measured on xg24_rb4186c with an interrupt-driven TX user that
services only uart_irq_tx_ready(): 82017 ISR entries for 1811 TX-ready
services. The storm throttles every thread on the CPU to the UART
byte rate, and starves the radio hard enough to break Bluetooth link
supervision under load. With this fix the same workload shows 805139
TX-ready services in 806757 ISR entries.
Only enable TXBL, which is sufficient to pace FIFO refills, and clear
the stale TXC flag when TX is disabled so uart_irq_tx_complete()
cannot report a completion from a previous transmission. TXC remains
readable through uart_irq_tx_complete(), which uses the raw interrupt
flag rather than the enabled mask.
The eusart driver also enables TXC from irq_tx_enable(), but clears
stale TXC flags in both irq_tx_enable() and irq_tx_disable(), which
prevents the storm; this was verified on the same hardware (497
interrupts for 497 TX-ready services when transmitting 512 bytes).
The legacy gecko driver shares the vulnerable structure and is fixed
in the following commit.
Assisted-by: Claude:claude-fable-5
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
Add a stub configure callback to the native PTY UART driver when
CONFIG_UART_USE_RUNTIME_CONFIGURE is enabled.
The stub accepts valid configuration requests without applying any UART
settings and returns -EINVAL when the configuration pointer is NULL.
This enables applications that require the runtime UART configuration API,
such as Modbus RTU, to use the native PTY UART driver.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Do not defer STOPRX when CBWT is active because CBWT does not process
ENDRX interrupts. Trigger STOPRX immediately to complete RX teardown
and prevent subsequent uart_rx_enable() calls from returning -EBUSY.
Fixes#115897 and #115899
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
By default, the UART RX FIFO is configured to trigger an interrupt
when it is half full. This end up breaking implementations that
assumed a per-byte interrupt delivery. These changes make these
properties adjustable in the DTS for RX and TX FIFOs.
Signed-off-by: Steven Macías <esmu@bang-olufsen.dk>
In interrupt handlers, only clear interrupt flags that have been
processed. This fixes a race condition where an interrupt that was
raised after flags were read for processing was prematurely
cleared without the corresponding action being taken.
When this condition was met, irq_tx_complete() never reported that
transmission was complete, while err_check() failed to report errors.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
bounce_buf_swap_len variable is used when mode that uses TIMER to
count RX bytes was used. Macro for calculating that variable was
invoked with incorrect argument as UARTE_US_TO_BYTES was applied
to baudrate argument. Because of that
CONFIG_UART_NRFX_UARTE_BOUNCE_BUF_SWAP_LATENCY was in fact not
applied.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Restore the previous interrupt state when DMM RX buffer preparation
fails. Returning with the IRQ lock held could leave interrupts disabled
after uart_rx_buf_rsp() reports the error.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Model DMAEND and FRAMETIMEOUT_DMAEND support as a devicetree
capability. Use DMAEND for finite asynchronous RX frame timeouts on
capable UARTE instances and retain STOPRX on unsupported hardware.
Disable TIMER-based byte counting when DMAEND is available. Preserve
buffer accounting when uart_rx_disable() races with an ENDRX rollover,
reject buffer responses during teardown, and restore the interrupt
state after DMM preparation failures.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
uart_stm32_async_rx_disable() forced RXNE on and left the ERROR
interrupt enabled, causing per-byte/per-overrun ISR load on continuous
RX streams.
Keep async and interrupt-driven RX ownership separate: async disables
RXNE on enable and, on disable, only tears down async state and
disables ERROR. RXNE remains off; callers that switch back to
interrupt-driven RX must re-enable it via uart_irq_rx_enable().
This avoids ISR flooding for async users and matches API ownership.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add UART asynchronous driver support for Realtek Bee series SoCs,
including RTL87x2G and RTL8752H.
This driver supports:
- Asynchronous TX/RX transfers
Signed-off-by: Yuzhuo Liu <yuzhuo_liu@realsil.com.cn>
GPIO isolation during sleep leaves all pins floating, for power saving.
In some configurations the UART peripheral will remain ON during sleep
and can be affected by signal shifts in the pins. Use the pad hold
function to leave signals recessive and avoid spurious UART events
which can dirty the FIFO and leave pending interrupts which can
stall the system.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Use xen_sched_yield() in the Xen HVC UART driver instead of calling the
low-level scheduler hypercall entry point directly.
This keeps the driver on the public Xen scheduler helper API while
preserving the existing behavior. The driver still yields the current
VCPU when the TX ring is full so the console backend can consume data.
Signed-off-by: Vladyslav Goncharuk <vladyslav_goncharuk@epam.com>
Assisted-by: Codex:gpt-5 cpp-code-map
Remove the dedicated BCM2711 auxiliary UART driver and its associated
Kconfig entry now that support has been integrated into the generic
NS16550 driver.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add support for the Broadcom BCM283x auxiliary UART variant to the
NS16550 driver by introducing a dedicated Kconfig option and variant-
specific register definitions required for the extended register set.
This enables the generic NS16550 driver to support the auxiliary UART
found on Broadcom BCM283x SoCs.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
The bridge already forwards the port configuration (baudrate,
parity, etc...) to the peer, but not the modem control lines.
Forward DTR RTS state to the peer port as well, so a bridged
serial port carries the control lines through like a USB-serial
adapter does.
Note the forwarding is compiled in only if CONFIG_UART_LINE_CTRL
is enabled.
Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
Each detected error was assigned with '=', so simultaneous conditions
reported only the last one checked. OR the flags together.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add UART driver support for the CH5xx.
This enables the hello_world and the drivers/uart/echo_bot samples.
Signed-off-by: Elie Carrot <elie.carrot@smile.fr>
Align the public UART async API with its microsecond-based implementation.
Update the wide-data (u16 variant) TX and RX API documentation to
specify microseconds and SYS_FOREVER_US.
Replace millisecond-named forever sentinels in the serial test driver and
asynchronous UART callers, while retaining existing microsecond timeout
values in drivers, tests, and samples.
Assisted-by: Copilot:GPT-5.6 Terra
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
This driver needs the nsi_errno conversion component.
Let's make sure we build it by selecting it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Header file include/zephyr/sys_clock.h is deprecated and will be removed
someday. Update the whole file tree to include zephyr/sys/clock.h
straight instead of zephyr/sys_clock.h.
This change was made running the sed shell command below:
$ sed -i 's/zephyr\/sys_clock\.h/zephyr\/sys\/clock\.h/' \
`grep -rsl "zephyr/sys_clock\.h" drivers/`
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Add initial UART driver support for the ELAN EM32 SoC family. The driver
implements basic polling TX/RX via the Zephyr serial API and instantiates
devices from devicetree when an EM32 UART node is present and okay.
Devicetree:
- Compatible: "elan,em32-uart" (binding included)
Notes:
- The driver is initialized at PRE_KERNEL_1
with CONFIG_SERIAL_INIT_PRIORITY
so the device is ready before the console backend binds.
Signed-off-by: Johnny Chuang <johnny.chuang@emc.com.tw>
This PR migrates the MIT-licensed Xen public headers into the
`include/zephyr/xen/public` directory to the zephyr-xenlib module.
Since the xen public headers require GCC extensions,
enable GNU_C_EXTENSIONS along with enabling CONFIG_XEN.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Remove the dedicated xlnx_xuartps driver and consolidate support
into the Cadence UART driver (uart_cdns), as both drivers target
the same underlying Cadence UART IP used by Xilinx platforms.
Update device tree bindings and DTS files to use the Cadence
compatible string on supported platforms, remove obsolete driver
sources, and adjust build system configuration accordingly.
Also update test overlays to reflect the driver consolidation.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Minor improvements in the driver found when running UART stress test
(uart_async_dual). Mainly, preventing running RX timeout handler when
RX is already being disabled and missing barrier when reading CC TIMER
register.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The init macro read the property with DT_INST_PROP_OR(index, ...)
instead of the _num macro parameter, so devicetree flow control was
always ignored.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
api_rx_enable() configured the RX channel as MEMORY_TO_PERIPHERAL,
copied from the TX path. Use PERIPHERAL_TO_MEMORY.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
uart_silabs_async_rx_buf_rsp() returned -EBUSY/-EACCES without
releasing the irq_lock taken at entry, leaving interrupts disabled.
Unlock before the early returns.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
eusart_async_rx_buf_rsp() returned -EBUSY/-EACCES without releasing
the irq_lock taken at entry, leaving interrupts disabled. Unlock
before the early returns.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
The enum index guard used '>' against ARRAY_SIZE, allowing a read one
element past the end of baud_settings[]. Use '>='.
Assisted-by: Claude:fable-5
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Return -ENOTSUP when async TX uses a buffer GDMA cannot read.
Allow flash/DROM TX only on SoCs with SOC_DMA_CAN_ACCESS_FLASH.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Pair RX_INT on async RX disable/error paths. irq_rx_enable takes the
lock during async RX, but async_rx_disable does not call
irq_rx_disable, so the lock was left held after transfers.
Also restore UHCI on PM resume when peripherals are powered down in
light sleep. UHCI has no sleep-retention link (unlike UART/GDMA) and
comes back reset with its UART port detached.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Do not release the TX_INT_STREAM policy lock on TXFIFO_EMPTY; that
interrupt only means the TX FIFO has space. Keep the lock until
irq_tx_disable. Also take an RX_INT lock across irq_rx_enable/disable
so light sleep cannot run while IRQ-driven RX is armed.
Rename tx_ongoing to pm_lock_bits now that the mask covers RX as well.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
ifx_cat1_uart_irq_is_pending() read the latched interrupt-cause
register, but the ISR clears RX_NOT_EMPTY and TX_EMPTY before
invoking the callback. The cause register could then read
not-pending while bytes remained in the RX FIFO. Callers gating on
uart_irq_is_pending() then stopped servicing the FIFO and dropped
received data.
Report the pending state by reusing irq_rx_ready() and
irq_tx_ready(), gated by the interrupt enable mask.
Assisted-by: Copilot:claude-opus-4.8
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
The syscall handler functions forward parameters with identical casts
that are redundant since the variables already have those types. Drop
the casts to let the compiler type-check the arguments unobstructed.
Signed-off-by: Flavio Ceolin <flavio@hubble.com>