Commit graph zephyr/drivers/serial
Author SHA1 Message Date
Marcin Niestroj
e7a6bc04ef drivers: serial: reclaim empty completed async RX buffers
The async RX helper returns immediately when no bytes are pending. This
leaves completed buffers with no received data outside the free pool. The
consumer cannot reclaim them by polling for data. If every buffer reaches
that state, the UART cannot obtain a buffer to restart reception.

Run the existing ordered reclaim loop before checking pending_bytes. This
keeps read-cursor updates in the consumer context. It adds no
interrupt-masked sections to producer callbacks. Preserve zero-length
claims as side-effect free.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2026-09-26 08:39:45 +02:00
Lucien Zhao
c0cf760527 drivers: serial: mcux_lpuart: configure an owned clock root
Let an LPUART instance describe its own clock source. When the node names
a "source" clocks entry, apply it with clock_control_configure() before
the peripheral clock is ungated, so the root's mux and dividers come from
devicetree rather than from a board C file. The cells are opaque here and
are interpreted by the clock controller.

Fetch that entry by name rather than by index. The families sharing this
driver spell their other clocks entries differently, and most of their
nodes carry no clock-names at all, so a node that already names its
entries can append "source" without disturbing them while the gate entry
stays at index 0 for every node that names nothing.

An instance that names no "source" entry behaves as before.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2026-09-26 00:51:55 +02:00
Aary Patil
a1e1918c45 drivers: serial: mediatek: add MT8188 UART driver
Add the UART driver for MediaTek MT8188, giving the Genio boards a
console.  Register access is split into a shared core and a small
per-SoC instantiation layer, so other MediaTek SoCs can reuse the core.

The driver is instantiated for every enabled node rather than a fixed
instance, and takes its gate clock from the infra-ao controller.

Co-authored-by: Felix Freimann <felix.freimann@mediatek.com>
Signed-off-by: Aary Patil <aary.patil@mediatek.com>
2026-09-26 00:51:04 +02:00
Richard Mc Sweeney
d9a6241ce3 drivers: serial: Infineon UART TX done interrupt
Added a TX done interrupt check so that device SUSPEND has the
opportunity to run again once the UART has completed its
transmission. Otherwise the scheduler does not run pm_state_set
again, and the app would stay in runtime-idle mode.

Assisted-by: Claude:claude-opus-4.8
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-09-26 00:45:32 +02:00
Richard Mc Sweeney
69229e1a26 drivers: serial: add Infineon UART pm_action
Added pm_action suspend/resume/turn_on routine for UART

Assisted-by: Claude:claude-opus-4.8
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-09-26 00:45:32 +02:00
Richard Mc Sweeney
13c06b315f drivers: serial: end Infineon DMA consistently
dma_tx.buf_len doubles as the transfer-in-progress flag that uart_tx()
tests to reject an overlapping transfer, but it was only cleared on the
successful DMA completion. An abort, a TX timeout or a DMA error left it
set, so every later uart_tx() returned -EBUSY for good. Clear it on each
path that ends a transfer.

dma_rx.buf_len has the same role and the same gap: rx_enable() left it
set when the DMA configuration failed, and the mid-stream rearm in the
RX callback discarded its return value, leaving RX dead with the runtime
PM reference still held and no event delivered to the application.
Release both buffers and end the session on those paths as well.

Assisted-by: Claude:claude-opus-4.8
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-09-26 00:45:32 +02:00
Richard Mc Sweeney
9fdf332c02 drivers: serial: reject overlapping Infineon UART async TX
ifx_cat1_uart_async_tx() overwrote the transfer descriptor and
reconfigured the DMA channel even when a previous transfer was still
in flight, corrupting the running transfer. Return -EBUSY while
buf_len is non-zero so a second uart_tx() is rejected while a transfer
is ongoing, as the UART async API requires.

Assisted-by: Claude:claude-opus-4.8
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-09-26 00:45:32 +02:00
Richard Mc Sweeney
992af4d355 drivers: serial: reprogram Infineon UART divider on baud change
ifx_cat1_uart_set_baud() reprogrammed the peripheral clock divider
while it was still enabled, so a new baud rate could be applied to a
running divider. Disable the divider, set the new value, then
re-enable it; a failed set leaves the register unchanged, so the
re-enable restores the previous rate.

Assisted-by: Claude:claude-opus-4.8
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
2026-09-26 00:45:32 +02:00
Arkadiusz Grzelka
c494c14601 drivers: serial: microchip: sercom g1: Reset a UART left enabled
uart_mchp_init() assumes the SERCOM it is handed has never been used.
It issues no software reset and makes no check, and then writes the
character size, parity, stop bits, clock source and baud rate straight
into registers the SERCOM write-protects while CTRLA.ENABLE is set.

From a cold reset that assumption holds. Under a bootloader it does not:
MCUboot drives its own console out of this same SERCOM and hands it over
still enabled, so none of the configuration above takes effect and the
application's console never comes up. On a PIC32CM5112GC00100 the image
chainloaded by MCUboot faults during this device's init, which is
visible over SWD as the console device being the one entry in
device_states that never reaches initialized.

The fix is the sequence the datasheet prescribes: when the peripheral is
found enabled, clear ENABLE, wait for synchronization, assert
CTRLA.SWRST and wait again. On a cold boot the branch is not taken, so
nothing changes for the case that already worked.

This is the same defect as the DPLL patch beside it, in another driver -
init code that reads its own state rather than the hardware's and so
only works on the first boot after reset.

Signed-off-by: Arkadiusz Grzelka <devitwise@gmail.com>
2026-09-25 10:02:36 +02:00
Raffael Rostagno
42ffa3aecf drivers: serial: esp32: Drop PM lock for IRQ RX
irq_rx_enable() took the lock for as long as the receiver was armed.
A shell enables RX once and never disables it, so light sleep never
runs.

Take the lock only for an async RX transfer. Bytes that arrive while
the SoC sleeps are dropped; the UART is not a wake source.

Assisted-by: Grok:4.6
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2026-09-24 03:53:28 +02:00
Raffael Rostagno
d340972a3f drivers: serial: esp32: Fix TX drain
uart_irq_tx_disable() dropped the lock as soon as the driver stopped
asking for more data. Bytes can still be in the FIFO at that point,
so the SoC could enter light sleep mid-frame.

Wait for TX_DONE instead, which poll_out() already does. Rename
TX_POLL to TX_DRAIN and share it, as both paths wait for the same
event: the transmitter going empty. If TX is already idle, mask
TX_DONE and drop the lock now: the interrupt will not fire, and
leaving it enabled would keep a stale mask across the next transfer.

Assisted-by: Grok:4.6
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2026-09-24 03:53:28 +02:00
Kamil Krzyżanowski
b593ed2abf drivers: serial: stm32: simplify rx dma flushing, fix double emit on wrap
Commit ed7dd4f011 ("drivers: serial: stm32: split cyclic RX wrap into two
contiguous events") fixed some issues with cyclic wraparound,
but left a race condition where if the timeout arrives before COMPLETE,
data is emitted twice.

Simplify handling by ignoring the status and always using
`dma_get_status` to determine how much data to emit.

Return an error when trying to enable cyclic DMA with a 1-byte buffer.

Assisted-by: Claude:claude-opus-5
Signed-off-by: Kamil Krzyżanowski <kamnxt@kamnxt.com>
2026-09-23 19:26:56 +02:00
Guillaume Gautier
be2ca806d9 include: drivers: dma: stm32: remove slot argument from dma macro
The slot argument from macros STM32_DT_INST_DMA_SLOT* was useless.
With it the macro was basically a redefinition a the Zephyr macro.
It is now removed to be similar to other STM32 DMA macros that call
DT_INST_DMAS_CELL_BY_NAME.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-09-22 17:56:13 +02:00
Guillaume Gautier
89a0b76898 include: drivers: dma: stm32: rename macros with DT_INST for consistency
Typically Zephyr device tree macros that take a inst as argument
start with DT_INST_.
For the STM32 DMA driver we currently have several macros taking an inst as
argument but missing this prefix.
For consistency, it is added to these macros. The goal is to also define
DT_ variants of these macros that take a node_id as argument.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2026-09-22 17:56:13 +02:00
Daniel Schultz
976bd443d1 drivers: serial: uart_aesc: Get rate from clock controller
Read the input clock rate from the clock controller. Allow to
also define the clock rate via the device-tree.

Signed-off-by: Daniel Schultz <dnltz@aesc-silicon.de>
2026-09-22 08:57:27 +03:00
Jamie McCrae
1909f76910 kconfig: Correctly have EXPERIMENTAL prompt
Fixes various issues with Kconfigs, including:
  - Using the wrong indentation
  - Not having [EXPERIMENTAL] in the prompt, or not having it at
    the end
  - Wrongly stating the CONFIG_EXPERIMENTAL is needed to enable
    an experimental Kconfig

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-09-21 16:27:52 -04:00
Jamie McCrae
64d8dbe48b kconfig: Fix formatting, correctly select DEPRECATED and have prompt
Fixes various issues with Kconfigs, including:
  - Redundent `default n` on bools
  - Not select deprecated on supposed deprecated symbols
  - Using the wrong indentation
  - Not having [DEPRECATED] in the prompt, or not having it at the
    end

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-09-21 16:27:52 -04:00
Jay Roy
fcafe696c1 drivers: serial: stm32: lock IRQs when setting interrupt callback
Protect the assignment of user_cb and user_data in
uart_stm32_irq_callback_set() using irq_lock() and irq_unlock() to
prevent a race condition where an incoming UART interrupt executes the
new callback with stale user_data.

Fixes #118457

Signed-off-by: Jay Roy <jayroy0304@gmail.com>
2026-09-21 11:21:53 +01:00
John Goble
a13ff48eb4 drivers: serial: uart_rpi_pico_pio: use 64-bit pin masks
BIT() overflows for pins >= 32, so pio_sm_set_pins_with_mask() and
pio_sm_set_pindirs_with_mask() cannot express them. Use the 64-bit
variants, which are equivalent below GP32.

Assisted-by: Claude:claude-opus-5
Signed-off-by: John Goble <john.goble@nimbusdigital.com>
2026-09-19 10:32:28 +02:00
Anuj Deshpande
56162c669a drivers: serial: ns16550: add a 16450 variant option
Add UART_NS16550_VARIANT_NS16450 to run the controller with FIFOs
disabled. This is for hardware whose FIFO-mode receive interrupts do
not work: on the C-DAC THEJAS32, neither the receive trigger level nor
the character timeout ever raises an interrupt, so received data sits
in the FIFO unnoticed. In 16450 mode the received data available
interrupt is raised for every character.

The FIFO detection already present in the driver handles the rest: with
FIFOs disabled the IIR FIFO-enabled bits read back zero and the FIFO
size is treated as one byte.

Signed-off-by: Anuj Deshpande <anuj@makerville.io>
2026-09-18 13:51:15 +01:00
Michal Frankiewicz
1dba55166f drivers: Replace SOC dependent clock kconfig with feature oriented one
Replaced SOC dependent kconfigs CONFIG_SOC_SERIES_NRF54H,
CONFIG_SOC_SERIES_NRF92 with feature oriented
CONFIG_HAS_MULTI_OPTION_CLOCKS, in clock related drivers.

Signed-off-by: Michal Frankiewicz <michal.frankiewicz@nordicsemi.no>
2026-09-18 11:16:19 +01:00
Zhaoxiang Jin
e26865e3d7 drivers: serial: uart_mcux_lpuart: handle PM_DEVICE_ACTION_TURN_OFF
The driver rejects PM_DEVICE_ACTION_TURN_OFF with -ENOTSUP, so a power
domain cannot tell it that the supply is about to go away. Accept the
action instead. There is nothing to save: TURN_ON already rebuilds the
whole register bank from data->uart_config, and SUSPEND has stashed the
interrupt mask in data->pm_saved_int, so re-reading the mask here would
only record the zero SUSPEND left behind.

This matters on SoCs where a low-power state collapses the LPUART power
domain. Baud rate, format and enables are all lost, and without a TURN_OFF
the domain never gets to re-run TURN_ON: the first write after the window
stalls on a transmitter that is no longer clocked, or bus-faults on the
block.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-09-18 11:14:01 +01:00
Christoph Seitz
5e3c1a7b3c drivers: serial: add Infineon AURIX ASCLIN UART driver
Add UART driver for the ASCLIN module found on TC3x and TC4x.
Supports polling mode with configurable baudrate via the ASCLIN
fractional divider. Uses a private register header to handle
TXDATA/RXDATA layout differences between TC3x and TC4x.

Signed-off-by: Christoph Seitz <christoph.seitz@infineon.com>
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2026-09-18 11:13:16 +01:00
Conor Paxton
c605a9da50 drivers: serial: ns16550: handle no priority cell, interrupt specifier
The ns16550 driver unconditionally references DT_INST_IRQ(n, priority)
when registering the interrupt handler. This fails to compile when the
DT Nodes interrupt controller uses a single-cell specifier with no
priority cell (e.g., riscv,cpu-intc with #interrupt-cells = <1>).

Add a UART_NS16550_IRQ_PRIORITY helper macro that checks for the
priority cell existence using DT_INST_IRQ_HAS_CELL and falls back to 0
when it is absent, matching the existing pattern used by
UART_NS16550_IRQ_FLAGS for the optional flags cell.

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
2026-09-17 16:46:06 -07:00
Kamil Krzyżanowski
961591d3c0 drivers: serial: stm32: don't release the PM lock twice on TC
Commit a93e31f280 ("drivers: uart: stm32: don't read TC interrupt flag
multiple times") introduced a regression.

When building with both `PM` and `UART_ASYNC_API` enabled, using
`poll_out` on a UART causes the PM lock to be released twice after being
acquired a single time.

Assisted-by: Claude:claude-opus-5
Signed-off-by: Kamil Krzyżanowski <kamnxt@kamnxt.com>
2026-09-17 13:06:54 -07:00
Khai Cao
70c1d79077 drivers: serial: add DMAC support for SCI-B UART async transfers
Add DMA Controller (DMAC) support for asynchronous UART TX/RX on
Renesas RA SCI-B.

Key changes:
- Add UART_RA8_SCI_B_UART_DMAC and UART_RA8_SCI_B_UART_DTC Kconfig
option to gate DTC/DMA support

- Add tx-dtc and rx-dtc DT binding properties for DTC transfer

- Support both DTC/DMAC transfer with shared transfer infrastructure

- Add DMAC transfer configuration, interrupt and callback declarations

Signed-off-by: Khai Cao <khai.cao.xk@renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-09-16 09:22:24 +02:00
Alberto Escolar Piedras
1c26ae0055 drivers serial uart_nrfx_uarte: Set frametimeout config when needed
Even if the driver does not support the frame timeout configuration,
if the HW peripheral does, we need to set it to disabled.
Otherwise the value is just random garbage which corrupts the
whole uart configuration as it will be OR'ed with the rest.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-09-16 07:39:12 +02:00
Benjamin Cabé
bc2e7d0353 drivers: serial: numicro: fix irq_update() signature
The uart_driver_api irq_update member is void (*)(const struct device *),
but numicro_uart_irq_update() still returns int, so building the driver
fails with an incompatible pointer type error. Make it return void,
which changes no behavior: the body is a no-op and uart_irq_update()
discards the value.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-5
2026-09-16 07:33:47 +02:00
Måns Ansgariusson
0bde5ccbeb lib: ring_buffer: drop select/depends on RING_BUFFER
The slim ring buffer API is now header-only and always available and the
tree has already migrated from the _claim/_finish API, so the RING_BUFFER
symbol no longer gates any code.
Remove the now-redundant "select RING_BUFFER" and CONFIG_RING_BUFFER=y
entries across drivers, subsystems, samples and tests.

Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
2026-09-16 07:29:22 +02:00
Måns Ansgariusson
f1b5428545 drivers: serial: serial_test: drop CONFIG_RING_BUFFER guards
The ring buffer API is now unconditionally available, so the mock serial
driver no longer needs to compile its written/read_queue buffers and the
poll/queue/peek helpers conditionally.
Remove the #ifdef CONFIG_RING_BUFFER blocks and the -ENOTSUP fallback in
serial_vnd_poll_in().

Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
2026-09-16 07:29:22 +02:00
Anas Nashif
8321f2d743 drivers: serial: renesas_ra: use portable IRQ pending API
Replace direct NVIC pending-state calls with k_irq_set_pending()/
k_irq_is_pending()/k_irq_clear_pending(), dropping the dependency on
cmsis_core.h where nothing else needed it.

The NVIC_EnableIRQ()/NVIC_DisableIRQ() pair on the error interrupt
becomes irq_enable()/irq_disable().

Assisted-by: Claude:claude-opus-5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-09-15 14:34:03 +02:00
Anas Nashif
30fc476b6b drivers: serial: infineon_pdl: use portable IRQ pending API
Replace direct NVIC pending-state calls with k_irq_set_pending()/
k_irq_is_pending()/k_irq_clear_pending(), dropping the dependency on
cmsis_core.h where nothing else needed it.

Assisted-by: Claude:claude-opus-5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-09-12 20:52:06 +02:00
Richard Mc Sweeney
0191cdf9a4 drivers: serial: infineon: psc3m6 scb name compatibility
Handle PSC3M6 SCB naming differences in the PDL. Select the
multi-processor-mode field for the UART under SOC_DIE_PSC3M6.

Assisted-by: Claude:claude-opus-4.6
Signed-off-by: Richard Mc Sweeney <Richard.McSweeney@infineon.com>
Signed-off-by: Niranjan M <niranjan@aerlync.com>
2026-09-12 07:53:00 -04:00
Alexpandi Muniyandi
7d13ace190 drivers: serial: Adapt UART PDL driver for CYT4DN
Update the existing UART PDL driver to work with the CYT4DN SoC in
the TRAVEO family. This adds CYT4DN-specific clock, interrupt, and
DMA handling using the INFINEON_TRAVEO_FAMILY Kconfig option.

Signed-off-by: Alexpandi Muniyandi <alexpandi@linumiz.com>
2026-09-11 17:19:46 +02:00
Benjamin Cabé
3c13bfd3d3 drivers: serial: check the u16 driver ops in syscall verifiers
The verifiers for uart_poll_out_u16(), uart_tx_u16() and
uart_rx_enable_u16() checked for the 8-bit driver op rather than the
16-bit one the implementation calls, so the check passed for drivers
that provide only the 8-bit op.

Check the matching _u16 op instead. Those ops only exist under
CONFIG_UART_WIDE_DATA, so uart_poll_out_u16() falls back to a plain
object check when it is disabled. uart_poll_in_u16() uses the object
check unconditionally because its implementation already tests the op
for NULL.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-5
2026-09-11 05:24:19 -04:00
Linus Ruettimann
2782312dfa drivers: serial: esp32: source ESP32-C6 UART clock from XTAL
On the C6, UART_SCLK_DEFAULT is PLL_F80M, and programming the UART
clock mux/divider while the PLL is still settling after a cold boot
intermittently latches a wrong effective clock: the port then corrupts
essentially every frame (CRC failures at the frame rate, occasional
merged frames when a delimiter byte is hit) for the entire session.
Warm resets never reproduce it - the PLL is already settled - and
re-running uart_configure() with identical values once the clock tree
is stable heals the port instantly, which pins the fault to the latch,
not the programmed values. Observed on ~50% of cold boots on affected
hardware; bench-validated 2026-08-26.

Source the UART from the always-stable XTAL instead, following the
same reasoning as the existing P4 handling (keep a settle-independent
source) and IDF practice under DFS. The fractional divider keeps
standard rates within ~0.02% from the 40 MHz XTAL.

Signed-off-by: Linus Ruettimann <linus@noxblanc.com>
2026-09-11 05:23:57 -04:00
Mattia Pennasilico
acfc8ca181 drivers: serial: uart_renesas_ra_sci: always clear ERI error + IRQ
The ERI ISR only cleared the SCI error flags and the pending IELSR.IR
inside the user_cb!=NULL branch. When an RX error (overrun/framing/
parity) occurs while no interrupt callback is registered yet - e.g. the
window during uart_configure()/R_SCI_UART_Open() before the Zephyr
callback is set - nothing is acknowledged, so the error stays pending
and the ISR re-triggers forever, starving the CPU (uart_configure hangs,
USB never enumerates). Always run err_check() and clear IELSR.IR.

Signed-off-by: Mattia Pennasilico <m.pennasilico@arduino.cc>
Assisted-by: Claude:claude-opus-4.8
2026-09-08 19:17:26 -04:00
Jamie McCrae
1b3a1dd4da drivers: serial: kconfig: Add missing deprecation text
Adds a missing [DEPRECATED] tag to the Kconfig prompt

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-09-08 16:04:16 +02:00
João Felipe
c5469546d6 drivers: serial: mcux_lpuart: bound the TC wait in configure
mcux_lpuart_configure() begins by spinning unbounded on the
Transmission Complete flag before reconfiguring the peripheral. TC
only sets when the transmitter is enabled and idle, so a
uart_configure() call issued while traffic is flowing parks the
calling thread for the full duration of that traffic. Observed on an
MCXA153 driving a USB CDC-ACM to UART bridge: the host's line-coding
change (9600 -> 115200 at port open) triggered uart_configure()
against a live transfer and the configuring thread spun for 15.36 s,
the time the entire transfer took to drain at the old baud rate
(BAUD register sampled over SWD while stalled). When the loop finally
exited, the driver disabled TE/RE and reinitialized mid-frame,
deterministically corrupting the byte being received.

Bound the wait with WAIT_FOR (300 ms total, 100 us poll). On timeout,
return -EBUSY and leave the peripheral untouched so the caller can
quiesce its traffic and retry; proceeding to tear down the
transmitter and receiver at that point can only destroy in-flight
data. 300 ms covers this driver's worst-case 12-bit frame (start +
8 data + parity + 2 stop, 240 ms) at 50 baud, the slowest standard
rate, so a transmitter finishing its last frame completes within the
window; for the arbitrarily slower rates the hardware can still be
configured to, the bound is an intentional policy limit and the
resulting -EBUSY is side-effect-free and retryable.

Callers that configure an idle UART see no change: TC is already set
and WAIT_FOR returns on its first evaluation.

Signed-off-by: João Felipe <joao@binho.io>
Signed-off-by: Leonardo José Consoni <leonardo@binho.io>
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
2026-09-08 13:36:09 +02:00
Priyanshu Singh
bba6b59860 drivers: serial: stm32: add GPIO-driven RTS flow control
Add support for software-managed RTS flow control to work around
    hardware RTS silicon limitations on affected STM32 SoC revisions:

    - Add st,sw-rts-gpios property to st,stm32-uart-base binding.
    - Add UART_STM32_ABNORMAL_RTS_ERRATUM_WORKAROUND Kconfig option with
      automatic GPIO selection.
    - Configure USART hardware for CTS-only flow control.
    - Assert RTS (active low) on rx_enable and deassert on rx_disable
      or buffer exhaustion.

    Fixes #36849

Signed-off-by: Priyanshu Singh <singhpriyanshu9838@gmail.com>
2026-09-07 21:07:31 -04:00
Fabio Baltieri
e17d4c6c86 device: Add DEVICE_DT_INST_GET_COMMA macro
Add DEVICE_DT_INST_GET_COMMA helper macro to include/zephyr/device.h to
easily get a device pointer followed by a comma when expanding
devicetree foreach iterators like DT_INST_FOREACH_STATUS_OKAY.

Update drivers, soc, subsys, and tests to use the common definition.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Assisted-by: Antigravity:gemini-1.5-pro
2026-09-07 17:07:48 +01:00
Krzysztof Chruściński
e2a959373f drivers: serial: nrfx_uarte: Use pm_device_runtime_put if possible
All UART devices supports ISR_SAFE PM device when asynchronous
API is used so pm_device_runtime_put can be used from an interrupt
context. It allows to disable CONFIG_PM_DEVICE_RUNTIME_ASYNC if
needed to safe space.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2026-09-07 18:06:32 +02:00
Johan Hedberg
4f85f461e5 drivers: serial: ns16550: prevent DW8250 TX FIFO overflow in fifo_fill
With CONFIG_UART_NS16550_DW8250_DW_APB, uart_ns16550_irq_tx_ready()
reports the transmitter ready whenever USR.TFNF is set, i.e. as soon as
the TX FIFO has room, while uart_ns16550_fifo_fill() writes up to
fifo_size bytes without checking how much room there actually is. When
the ISR runs with data left in the FIFO, the excess bytes are written to
a full FIFO and lost.

On the Silicon Labs SiWx917 (ulpuart, ns16550 with the DW8250 option)
this happens right after boot and about once per thousand fills under
load: the UART ISR is entered with no interrupt pending (IIR reads 0xC1)
while the FIFO still holds 15 of the 16 bytes of the previous fill, so
the fill loses up to 15 bytes. With the Bluetooth monitor in
interrupt-driven mode on that UART the stream had a truncated New Index
frame after every boot and lost 15-byte chunks every 1-2 seconds, while
the polled mode was unaffected.

Stop the DW8250 fill loop as soon as USR.TFNF clears, so that the driver
never writes more than the FIFO can take and returns the number of bytes
it actually accepted.

Fixes #117777

Assisted-by: Claude:claude-fable-5
Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2026-09-01 21:05:40 -04:00
Krzysztof Chruściński
c452faf42d drivers: serial: nrfx_uarte: Fix case with mixed instance configuration
Compilation was failing when one instance is using interrupt driven
API and another one is using asynchronous API with TIMER byte counting.
Compilation was also failing if instance had timer property in DT but
Kconfig was indicating use of the interrupt driven API.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2026-09-01 15:19:01 +01:00
Zhaoxiang Jin
690e17370e drivers: serial: uart_mcux_lpuart: add PM device support
Add device pm support so the LPUART can be re-initialized
after a low-power state that collapses its power domain
(for example i.MX RT700 deep-sleep-retention), which loses
all peripheral state.

The suspend action saves and masks the enabled interrupts
so a pending interrupt cannot fire its ISR against the
powered-down register bank; the resume action re-initializes
the peripheral and restores those interrupts, and the ISR
bails out while suspended. pm_device_driver_init() establishes
the initial device state.

This relies on the LP_FLEXCOMM parent being resumed first
to re-select the peripheral in the wrapper, which device PM
guarantees via init-priority ordering.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-09-01 11:04:22 +01:00
Anas Nashif
cb3178d8ee drivers: serial: lpc11u6x: use portable IRQ pending API
Replace direct NVIC pending-state calls with k_irq_set_pending()/
k_irq_is_pending()/k_irq_clear_pending(), dropping the dependency on
cmsis_core.h where nothing else needed it.

Assisted-by: Claude:claude-opus-5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2026-08-27 22:12:29 -04:00
Jérôme Pouiller
c3b8b33224 drivers: serial: silabs: drop orphans eusart_silabs_ll2cfg_*()
The functions eusart_silabs_ll2cfg_*() have never been used. Probably the
original author wrote them for the completeness since their
eusart_silabs_cfg2ll counterparts were required.

Orphan function generate warning that could in turn generate error with
-Werror.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2026-08-27 21:24:48 +01:00
Jérôme Pouiller
3ff1816c5f drivers: serial: silabs: drop orphans uart_silabs_ll2cfg_*()
The functions uart_silabs_ll2cfg_*() have never been used. Probably the
original author wrote them for the completeness since their
uart_silabs_cfg2ll counterparts were required.

Orphan function generate warning that could in turn generate error with
-Werror.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2026-08-27 21:24:48 +01:00
Sylvio Alves
dde217c098 drivers: espressif: enable esp32c61 in shared drivers
Add the C61 conditionals to the shared espressif drivers:
gpio, uart, usb-serial, spi, counter, entropy, hwinfo,
pinctrl, watchdog and the timer and clock Kconfig, mostly
mirroring the single-core C5 behavior.

Assisted-by: Claude:opus-4-8
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2026-08-27 21:23:34 +01:00
Måns Ansgariusson
690809ecfc drivers: serial: Update ring_buf usage to new zero-copy API
This commit updates the usage of ring_buf to utilize the new
put_ptr/commit/get_ptr/consume pattern instead of the traditional
claim/finish approach. This change is part of a larger refactor aimed at
streamlining the ring_buf API and improving its efficiency.

Signed-off-by: Måns Ansgariusson <mansgariusson@gmail.com>
2026-08-25 09:00:03 +02:00