Make cc13xx_cc26xx_irq_tx_ready check that the TX Ready interrupt
occurred, instead of checking whether there is some free space in
the UART TX FIFO. This prevents a race condition from occurring in
OpenThread Spinel protocol implementation, when a UART RX interrupt
is received right after otPlatUartSend was called, between the
assignement of 1 to ot_uart.tx_busy and the initialization of
write_length.
Signed-off-by: Pascal Bodin <pbodin@baylibre.com>
Fix race condition between DMA ISR and work queue that caused RX
length underflow when calculating len = counter - offset.
Both mcux_lpuart_async_rx_timeout (work queue) and dma_callback
(ISR) modified rx_dma_params without locking, causing the ISR to
update counter/offset mid-calculation, resulting in integer
underflow and system crash.
Solution: Add irq_lock() protection around all rx_dma_params
accesses in async_evt_rx_rdy(), mcux_lpuart_async_rx_flush(),
and async_evt_rx_buf_release().
Signed-off-by: Holt Sun <holt.sun@nxp.com>
Split error handling in mcux_lpuart_rx_enable() to distinguish
between DMA status query failures (error) and busy status (debug).
- Use LOG_ERR for get_status failures with specific error code
- Use LOG_DBG for busy status (expected condition, valid -EBUSY)
- Improves debuggability by providing clearer diagnostic messages
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The Xen events channel driver consume 72K of RAM, but may not be
required in all use cases.
Added a XEN_EVENTS Kconfig option so that Xen events can be gracefully
disabled if not required. Updated the relevant CMakeLists.txt and
Kconfig files to guard the inclusion of the Xen events driver and its
source files by this option.
Signed-off-by: Grygorii Strashko <grygorii_strashko@epam.com>
Signed-off-by: Svitlana Drozd <svitlana_drozd@epam.com>
When an async transfer finished quickly, the internal state of
the driver could come out of sync with the hardware. The tx/rx
enabled flag and PM lock was taken after starting the DMA
transaction, which caused issues if the DMA complete callback
was called before the flags were updated. Set the flag and take
the PM lock prior to starting the DMA transaction to avoid this.
Also release the PM rx lock upon successful completion of a
transfer. The lock was previously only released when the user
manually called `uart_rx_disable()`.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add a device tree property to request connecting an instance to stdin/out
(on top of the command line option, and the kconfig option).
And clarify that the kconfig option applies to whichever is the
first instance in whatever order the DT logic happens to order them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The UARTE instance must be disabled before the pinctrl state is
updated like it is done other places in this driver.
While the uarte is enabled, it controls the pins, keeping TX high
for example. Trying to apply pinctrl will have no effect other
than enabling pin retention, so the TX pin which should now be low
and configured as disconnected input, stays an output driven high.
Issue was discovered as the suspended UARTE was backpowering
devices connected to it because of the driven output pins.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
This change updates uart_stm32_dma_rx_flush() to detect the wrap case
and emit two contiguous UART_RX_RDY events in order:
- tail: [offset .. buffer_length)
- head: [0 .. counter)
This guarantees that each RX_RDY event satisfies offset + len <=
buffer_length.
Non-cyclic behavior and cyclic non-wrapping cases remain
unchanged.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Commit 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ
settings.") introduced a bug where PL011_SBSA_CONFIG_PORT defines
the IRQ config function as pl011_irq_config_func_sbsa_##n but
IRQ_CONFIG_FUNC_INIT(n) references pl011_irq_config_func_##n,
causing a compilation error when building for boards with SBSA
UART and interrupt support enabled.
Fix by using the correct function name with the _sbsa_ suffix
in the SBSA config port macro.
Fixes: 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ settings.")
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Fixes the Kconfig name of this so that it matches the value from
soc.yml, and deprecates the old name - this is required to support
future build system features. Additionally, it fixes an issue in
Kconfigs of this SoC of duplicating existing symbols
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
In uart_stm32_async_rx_buf_rsp(), when the provided RX buffer is not
located in non-cacheable memory, the function would return -EFAULT
while still holding the IRQ lock acquired at the start of the critical
section. This causes a system deadlock as interrupts remain disabled
indefinitely.
The nocache validation check has been moved outside the critical
section to ensure proper error handling. The check is performed before
acquiring irq_lock(), maintaining the same validation behavior while
preventing the lock from being held during the early error return.
Fixes a bug where async UART RX operations with improperly
placed buffers would hang the system.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
Adds making a peripheral clock connection to the initialiazation for SCB
based drivers. These drivers are the UART/Serial driver, I2C driver, and
SPI driver.
Signed-off-by: John Batch <john.batch@infineon.com>
Add the `DEVICE_API` wrapper to the remaining `uart_driver_api` instances,
ensuring that each driver API is placed in its respective linker section.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
For the base ns16550 spec, supporting the UART interrupt API correctly
is not strictly possible- the IIR register will clear after one read and
not update, so multiple calls to uart_irq_[tx/rx]_ready after
uart_irq_update will return stale data.
The Synopsis DW variant of this IP includes a USR register, which can be
used to correctly identify when the TX FIFO has space for more data and
when the RX FIFO is empty. Use this register when
CONFIG_UART_NS16550_DW8250_DW_APB is set.
Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
This patch just formats the uart_xmc4xxx.c file before the real
patch, otherwise the changes would be hard to read.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
Add clock control and UART support for PSOC 4 family:
- Clock control drivers with PSOC 4 compatibility
- PSOC4xx clock source bindings and definitions
- HF clock divider configuration support
- UART FIFO trigger level configuration for PSOC 4100S Max
series with 8-deep FIFO (RX trigger=7, TX trigger=0)
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
When uart_rx_disable is called, or rx gets otherwise disabled,
UART_RX_DISABLED event should be emitted.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
uart_bcm2711_poll_in() incorrectly returned the received byte
instead of writing it to the provided buffer.
Update the implementation to store the character in *c and
return 0 on success, matching the UART poll_in API.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Add clock configuration step before UART initialization to ensure
proper clock setup. The clock is first disabled, then configured
if supported by the clock controller.
If clock configuration is not supported (ENOTSUP/ENOSYS), the driver
continues with default settings. Other errors are treated as failures
and propagated to the caller.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Allows a mixture of IRQ-enabled and IRQ-disabled nodes.
Enabled nodes are identified by the presence or absence of
the interrupt-names property.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Split DMA status error from busy state handling. Use LOG_DBG for
busy state and LOG_ERR for status query failures. Return -EBUSY
as required by async UART API when transfer is in progress.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
We modified the Microchip MEC UART driver to be HAL
independent and be usuable on all MEC SoCs. The only
hardware difference is an extra register in the MEC174x/5x
family providing TX FIFO full and current byte count.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add uart_configure()/uart_config_get() support to usart_gd32.
Store runtime config in driver data and init it from DT defaults.
Signed-off-by: Aleksandr Senin <al@meshium.net>
The pointer to the clock device can be const, as it does never change at
runtime. This moves the const struct device *clock from data to config
struct and initializes it inside the init macro. The __uart_stm32_get_clock
function is no longer needed and removed.
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
RSR handling is already implemented in pl011_err_check(), which is the
appropriate place to detect, and report receive error conditions.
This also aligns poll_in() behavior with pl011_fifo_read(), which reads
and delivers characters without returning RSR status to the caller.
Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
Until now transmission FIFO was not used.
With this chamge the FIFO will be filled up, until it is full.
Signed-off-by: Daniel Fladerer <d.fladerer@gmx.de>
NO_POSIX_CHEATS was a macro used to avoid including the content of a
header (`posix_cheats.h`) which allowed building applications in the
POSIX architecture without the native simulator, avoiding collisions
between some embedded symbols and those from the host C library.
Support for this way of building, and this header and macro were
removed in e150ffb92c, but these users
were forgotten. This was harmless, but let's just clean it up now.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The current driver implementation only support pooling and
synchronous operations. By adding DMA support the driver will
be able to operate in asynchronous mode which helps to improve
CPU usage and save power.
Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
The z_vrfy_uart_configure function was incorrectly checking for the
existence of the 'config_get' handler instead of 'configure'.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add the clock emablement in the LPUART driver to avoid
depending on the default enablement settings.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Add devicetree properties to control UHCI SLIP encoding/decoding
when using UART with DMA (async API). Both properties default to
disabled to prevent unintended data corruption.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
In async UART mode with DMA, the RX completion callback was incorrectly
relying on rx_counter which is never updated in DMA mode since data
bypasses the UART FIFO via UHCI+GDMA.
Fix by reading the actual transferred byte count from the DMA
descriptor's length field using gdma_ll_rx_get_success_eof_desc_addr().
Direct LL calls are used because this runs in ISR context where
dma_get_status() is not IRAM-safe.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Most of Espressif drivers ISRs are already running in IRAM area, except
those in this PR. Move ISRs accordingly so we avoid any
interrupt miss when cache is disabled.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Removed usart_intenset attribute from conditional compilation
in mcux_flexcomm_data structure since this parameter needs to
be saved/restored independently if the interrupts are enabled
or not based on the PR feedback
Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
