Commit graph

2,173 commits

Author SHA1 Message Date
Marcelo Roberto Jimenez
ebdbab5b52 drivers: serial: uart_shell.c: Enhance the uart shell
This patch enhances the UART shell by:

- Adding a config command to display the UART configuration;
- Displaying the current configuration when the command misses the last
  parameter (usefull for command line editing).

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2026-02-03 12:12:53 +00:00
Krzysztof Chruściński
6e65fbe585 drivers: serial: nrfx_uarte: Refactor byte counting with TIMER
Some time ago a receiver mode for newer SoCs was introduced. It is
using TIMER to count RX bytes via PPI. Due to changes in the system
behavior it is not the same implementation as the one used on
legacy targets (nRF52x, nRF53x and nRF91x). New implementation is
using the Device Tree to assign a TIMER instance and old feature was
using Kconfig which is now obsolete and error prone since it is
easy to get resource usage conflict is some instances are managed
in Device Tree and some in Kconfig.

As a result to reliably receive data without HWFC user had to use
different configuration depending on the target.

Legacy implementation was using nrfx_timer and new one used HAL.

Patch attempts to align better those two similar but different
implementations by:
- deprecating Kconfig symbols for selecting TIMER instance in favor
  of the Device Tree
- extracting common part like PPI initialization and some control
 block fields
- Using TIMER HAL in both implementations.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2026-02-03 12:12:41 +00:00
Krzysztof Chruściński
7979d37f42 drivers: serial: nrfx_uarte: Fix short RX buffers handling
Interrupt handler was handling events in a following order:
ENDRX, RXSTARTED, RXTO. This could lead to error if RX buffer
is short then with high baudrate RXSTARTED for the current
buffer could be handled together with ENDRX and in that case
uart_rx_buf_rsp called from RXSTARTED would return error as
reception is already finished due to handled ENDRX.

Reworking the driver to change that order to RXSTARTED, ENDRX,
RXTO.

Additionally, driver is optimize to only check HW events for
enabled interrupts. To achieve that, RX path interrupts are
all disabled then RX is disabled.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2026-02-03 12:12:41 +00:00
Krzysztof Chruściński
dba9997a50 drivers: serial: nrfx_uarte: Cleanup
Remove parts of implementation which are no longer in use.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2026-02-03 12:12:41 +00:00
Hoang Nguyen
5a9d20b4ed drivers: serial: renesas: Initialize p_reg in extended configuration
Initialize p_reg with the register base address from devicetree.

Signed-off-by: Hoang Nguyen <hoang.nguyen.jx@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2026-02-03 09:29:36 +01:00
Pascal Bodin
01a86ffd18 drivers: serial: uart_cc13xx_cc26xx: make irq_tx_ready check interrupt
Make cc13xx_cc26xx_irq_tx_ready check that the TX Ready interrupt
occurred, instead of checking whether there is some free space in
the UART TX FIFO. This prevents a race condition from occurring in
OpenThread Spinel protocol implementation, when a UART RX interrupt
is received right after otPlatUartSend was called, between the
assignement of 1 to ot_uart.tx_busy and the initialization of
write_length.

Signed-off-by: Pascal Bodin <pbodin@baylibre.com>
2026-02-02 14:43:24 +01:00
Holt Sun
d73e311f4a drivers: serial: uart_mcux_lpuart: fix async RX race condition
Fix race condition between DMA ISR and work queue that caused RX
length underflow when calculating len = counter - offset.

Both mcux_lpuart_async_rx_timeout (work queue) and dma_callback
(ISR) modified rx_dma_params without locking, causing the ISR to
update counter/offset mid-calculation, resulting in integer
underflow and system crash.

Solution: Add irq_lock() protection around all rx_dma_params
accesses in async_evt_rx_rdy(), mcux_lpuart_async_rx_flush(),
and async_evt_rx_buf_release().

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-02-02 12:55:52 +01:00
Holt Sun
b07ed4bf93 drivers: serial: uart_mcux_lpuart: improve rx_enable error reporting
Split error handling in mcux_lpuart_rx_enable() to distinguish
between DMA status query failures (error) and busy status (debug).

- Use LOG_ERR for get_status failures with specific error code
- Use LOG_DBG for busy status (expected condition, valid -EBUSY)
- Improves debuggability by providing clearer diagnostic messages

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-02-02 12:55:52 +01:00
Grygorii Strashko
db1bea3ae2 drivers: xen: add XEN_EVENTS Kconfig option
The Xen events channel driver consume 72K of RAM, but may not be
required in all use cases.

Added a XEN_EVENTS Kconfig option so that Xen events can be gracefully
disabled if not required. Updated the relevant CMakeLists.txt and
Kconfig files to guard the inclusion of the Xen events driver and its
source files by this option.

Signed-off-by: Grygorii Strashko <grygorii_strashko@epam.com>
Signed-off-by: Svitlana Drozd <svitlana_drozd@epam.com>
2026-01-30 16:56:52 -06:00
Aksel Skauge Mellbye
54bc3154e3 drivers: serial: silabs: Fix async race condition
When an async transfer finished quickly, the internal state of
the driver could come out of sync with the hardware. The tx/rx
enabled flag and PM lock was taken after starting the DMA
transaction, which caused issues if the DMA complete callback
was called before the flags were updated. Set the flag and take
the PM lock prior to starting the DMA transaction to avoid this.

Also release the PM rx lock upon successful completion of a
transfer. The lock was previously only released when the user
manually called `uart_rx_disable()`.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2026-01-30 06:00:41 -06:00
Alberto Escolar Piedras
4921a09793 drivers serial native_pty: Add DT property to connect to stdin/out
Add a device tree property to request connecting an instance to stdin/out
(on top of the command line option, and the kconfig option).

And clarify that the kconfig option applies to whichever is the
first instance in whatever order the DT logic happens to order them.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-30 06:00:04 -06:00
Bjarki Arge Andreasen
15d8d12096 drivers: serial: uart_nrfx_uarte: patch disable and pinctrl order
The UARTE instance must be disabled before the pinctrl state is
updated like it is done other places in this driver.

While the uarte is enabled, it controls the pins, keeping TX high
for example. Trying to apply pinctrl will have no effect other
than enabling pin retention, so the TX pin which should now be low
and configured as disconnected input, stays an output driven high.

Issue was discovered as the suspended UARTE was backpowering
devices connected to it because of the driven output pins.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2026-01-30 09:19:03 +01:00
Fabrice DJIATSA
ed7dd4f011 drivers: serial: stm32: split cyclic RX wrap into two contiguous events
This change updates uart_stm32_dma_rx_flush() to detect the wrap case
and emit two contiguous UART_RX_RDY events in order:
- tail: [offset .. buffer_length)
- head: [0 .. counter)
This guarantees that each RX_RDY event satisfies offset + len <=
buffer_length.
Non-cyclic behavior and cyclic non-wrapping cases remain
unchanged.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-30 09:18:02 +01:00
Appana Durga Kedareswara rao
aa6386f2c3 drivers: serial: pl011: fix SBSA IRQ config function reference
Commit 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ
settings.") introduced a bug where PL011_SBSA_CONFIG_PORT defines
the IRQ config function as pl011_irq_config_func_sbsa_##n but
IRQ_CONFIG_FUNC_INIT(n) references pl011_irq_config_func_##n,
causing a compilation error when building for boards with SBSA
UART and interrupt support enabled.

Fix by using the correct function name with the _sbsa_ suffix
in the SBSA config port macro.

Fixes: 45cde341dc ("drivers: serial: pl011: Allows mixed IRQ settings.")

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2026-01-29 16:11:53 -06:00
Jamie McCrae
80f19801b2 soc: sifive: sifive_freedom: Fix SoC Kconfig naming and issues
Fixes the Kconfig name of this so that it matches the value from
soc.yml, and deprecates the old name - this is required to support
future build system features. Additionally, it fixes an issue in
Kconfigs of this SoC of duplicating existing symbols

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-01-29 17:20:11 +01:00
Miika Karanki
3ab167bd72 drivers: serial: uart_stm32: fix IRQ lock not released on error path
In uart_stm32_async_rx_buf_rsp(), when the provided RX buffer is not
located in non-cacheable memory, the function would return -EFAULT
while still holding the IRQ lock acquired at the start of the critical
section. This causes a system deadlock as interrupts remain disabled
indefinitely.

The nocache validation check has been moved outside the critical
section to ensure proper error handling. The check is performed before
acquiring irq_lock(), maintaining the same validation behavior while
preventing the lock from being held during the early error return.

Fixes a bug where async UART RX operations with improperly
placed buffers would hang the system.

Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
2026-01-28 21:58:35 +01:00
Fin Maaß
3c63100522 drivers: serial: litex: fix is pending
include enabled state for the irq
when checking for pending irqs.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2026-01-27 15:20:09 -06:00
John Batch
9fe2e4f596 drivers: infineon: adds clock assignment to serial device init.
Adds making a peripheral clock connection to the initialiazation for SCB
based drivers.  These drivers are the UART/Serial driver, I2C driver, and
SPI driver.

Signed-off-by: John Batch <john.batch@infineon.com>
2026-01-27 08:06:28 +01:00
Pisit Sawangvonganan
24615a4d79 drivers: serial: place API into iterable section
Add the `DEVICE_API` wrapper to the remaining `uart_driver_api` instances,
ensuring that each driver API is placed in its respective linker section.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2026-01-26 14:02:16 -06:00
Daniel DeGrasse
b4cbd206ec drivers: serial: ns16550: support odd parity
Add odd parity support into ns16550 driver.

Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
2026-01-25 14:38:43 +01:00
Daniel DeGrasse
a436c1cc12 drivers: serial: ns16550: support interrupt API correctly for DW IP
For the base ns16550 spec, supporting the UART interrupt API correctly
is not strictly possible- the IIR register will clear after one read and
not update, so multiple calls to uart_irq_[tx/rx]_ready after
uart_irq_update will return stale data.

The Synopsis DW variant of this IP includes a USR register, which can be
used to correctly identify when the TX FIFO has space for more data and
when the RX FIFO is empty. Use this register when
CONFIG_UART_NS16550_DW8250_DW_APB is set.

Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
2026-01-25 14:38:43 +01:00
Daniel DeGrasse
f620006c84 drivers: serial: ns16550: support loopback mode
Add support for loopback mode in ns16550 uart driver, by setting LOOP
bit in MDC register.

Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
2026-01-25 14:38:43 +01:00
Marcelo Roberto Jimenez
62a49211b1 drivers: serial: uart_xmc4xxx: Enable run time configuration
This patch enables run time configuration for the XMC4xxx serial ports.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2026-01-22 14:30:26 -06:00
Marcelo Roberto Jimenez
7744d20840 drivers: serial: uart_xmc4xxx: Run clang-format before applying a patch
This patch just formats the uart_xmc4xxx.c file before the real
patch, otherwise the changes would be hard to read.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2026-01-22 14:30:26 -06:00
Braeden Lane
f68885f1c6 drivers: Add PSOC 4 clock control and serial support
Add clock control and UART support for PSOC 4 family:
- Clock control drivers with PSOC 4 compatibility
- PSOC4xx clock source bindings and definitions
- HF clock divider configuration support
- UART FIFO trigger level configuration for PSOC 4100S Max
  series with 8-deep FIFO (RX trigger=7, TX trigger=0)

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2026-01-22 13:01:21 -05:00
Miika Karanki
c7fb653046 serial: uart_native_pty: send UART_RX_DISABLED event
When uart_rx_disable is called, or rx gets otherwise disabled,
UART_RX_DISABLED event should be emitted.

Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
2026-01-22 12:55:41 -05:00
Muhammad Waleed Badar
1350164d67 drivers: uart: bcm2711: fix poll_in
uart_bcm2711_poll_in() incorrectly returned the received byte
instead of writing it to the provided buffer.

Update the implementation to store the character in *c and
return 0 on success, matching the UART poll_in API.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2026-01-22 12:55:13 -05:00
Albort Xue
65438886e6 drivers: serial: uart_mcux_lpuart: configure clock before initialization
Add clock configuration step before UART initialization to ensure
proper clock setup. The clock is first disabled, then configured
if supported by the clock controller.

If clock configuration is not supported (ENOTSUP/ENOSYS), the driver
continues with default settings. Other errors are treated as failures
and propagated to the caller.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2026-01-21 20:07:26 +01:00
Camille BAUD
18652dea69 drivers: serial: bflb: do not enable rx and err interrupt by default
It breaks things when callback doesnt expect them.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-01-21 20:06:48 +01:00
TOKITA Hiroshi
45cde341dc drivers: serial: pl011: Allows mixed IRQ settings.
Allows a mixture of IRQ-enabled and IRQ-disabled nodes.
Enabled nodes are identified by the presence or absence of
the interrupt-names property.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-20 20:10:42 -05:00
Holt Sun
4138155273 drivers: uart_mcux_lpuart: refine DMA TX busy/error handling
Split DMA status error from busy state handling. Use LOG_DBG for
busy state and LOG_ERR for status query failures. Return -EBUSY
as required by async UART API when transfer is in progress.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-20 15:33:20 +00:00
Scott Worley
c6a959dcc3 drivers: serial: microchip: mec: Common UART driver
We modified the Microchip MEC UART driver to be HAL
independent and be usuable on all MEC SoCs. The only
hardware difference is an extra register in the MEC174x/5x
family providing TX FIFO full and current byte count.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2026-01-16 11:40:38 +00:00
Aleksandr Senin
5dc2385914 drivers: serial: gd32: add UART runtime configure support
Add uart_configure()/uart_config_get() support to usart_gd32.
Store runtime config in driver data and init it from DT defaults.

Signed-off-by: Aleksandr Senin <al@meshium.net>
2026-01-11 13:04:25 +01:00
Thomas Decker
6efbec10fb drivers: serial: uart_stm32: make ptr to clock device const
The pointer to the clock device can be const, as it does never change at
runtime. This moves the const struct device *clock from data to config
struct and initializes it inside the init macro. The __uart_stm32_get_clock
function is no longer needed and removed.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2026-01-09 07:57:04 -06:00
Fabin V Martin
67ddf8db30 drivers: uart: microchip: sercom g1: DMA selection for async mode
Allow user to select DMA in the application.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2026-01-09 10:41:23 +01:00
Muhammad Waleed Badar
f31516d461 drivers: uart: pl011: fix poll_in function
RSR handling is already implemented in pl011_err_check(), which is the
appropriate place to detect, and report receive error conditions.

This also aligns poll_in() behavior with pl011_fifo_read(), which reads
and delivers characters without returning RSR status to the caller.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2026-01-07 14:52:10 -06:00
Daniel Fladerer
a4f75ba4bd drivers: serial: uart_mcux_iuart: Adjust FIFO fill behavior for TX
Until now transmission FIFO was not used.
With this chamge the FIFO will be filled up, until it is full.

Signed-off-by: Daniel Fladerer <d.fladerer@gmx.de>
2026-01-06 13:37:54 +00:00
Thinh Le Cong
23892b038f drivers: serial: fix IAR warning Pe1072 about declaration after a label
Fix Pe1072 warning (declaration after case label) by wrapping with braces

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2026-01-04 14:11:51 +01:00
Alberto Escolar Piedras
a2f45762f1 arch posix: cleanup NATIVE_APPLICATION support remnants
NO_POSIX_CHEATS was a macro used to avoid including the content of a
header (`posix_cheats.h`) which allowed building applications in the
POSIX architecture without the native simulator, avoiding collisions
between some embedded symbols and those from the host C library.

Support for this way of building, and this header and macro were
removed in e150ffb92c, but these users
were forgotten. This was harmless, but let's just clean it up now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-03 10:19:34 +01:00
Qingsong Gou
98742f1b07 drivers: serial: sf32lb: add uart async API support
add uart async API support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Qingsong Gou
355c2f42e8 drivers: serial: sf32lb: add config_get and configure
Add config_get and configure APIs support

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-29 13:05:41 +01:00
Fabin V Martin
cf8d97ab39 drivers: uart: microchip: sercom g1: Add DMA support
The current driver implementation only support pooling and
synchronous operations. By adding DMA support the driver will
be able to operate in asynchronous mode which helps to improve
CPU usage and save power.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00
Benjamin Cabé
af171d4d3b drivers: uart: fix incorrect handler check in uart_configure syscall
The z_vrfy_uart_configure function was incorrectly checking for the
existence of the 'config_get' handler instead of 'configure'.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 14:50:23 +01:00
zjian zhang
14e396a3b1 drivers: serial: add amebad loguart support
loguart driver support for amebad

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
Hou Zhiqiang
03699e24fc drivers: serial: mcux_lpuart: add clock enablement
Add the clock emablement in the LPUART driver to avoid
depending on the default enablement settings.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-12-20 09:19:19 +01:00
Benjamin Cabé
e861b2681d drivers: dts: ti: fix typo in "Texas Instruments" company name
s/Texas Instrument/Texas Instruments/g

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 18:52:58 +00:00
Robert Cheng
5e1d28b49c drivers: serial: focaltech: add ft9001 serial driver
Add the UART driver for the FocalTech FT9001 SoC.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Sylvio Alves
007f4427f3 drivers: serial: esp32: add UHCI SLIP encoding control
Add devicetree properties to control UHCI SLIP encoding/decoding
when using UART with DMA (async API). Both properties default to
disabled to prevent unintended data corruption.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-18 05:35:40 +01:00
Sreeram Tatapudi
0a06f5b91a dts: bindings: Drop cat1 from the infineon binding files
Drop cat1 from the binding files to enable reuse by other
category devices as well.

Fixes #99174

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-17 13:58:09 -05:00
Sylvio Alves
f8d2e00a0e includes: remove duplicated entries in zephyr-tree
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.

Duplicates inside different #ifdef branches are preserved
as they may be intentional.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-17 13:57:38 -05:00