The primary problem was that the callback was being invoked twice,
which broke the tests.
A secondary issue is that when two level tests occur consecutively the
second will fail. Instrumentation confirms that the registers are
being configured correctly, and ip indicates that the condition was
detected, but the interrupt does not occur. Tests pass as long as no
level test precedes the failing test.
It's not clear whether this is an issue with the PLIC, or the GPIO
implementation (hardware or software). As "normal" GPIO applications
appear to work we'll run with it and keep an issue open.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Convert older DT_INST_ macro use in esp32 drivers to the new
include/devicetree.h DT_INST macro APIs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert older DT_INST_ macro use in cc13xx_cc26xx drivers to the new
include/devicetree.h DT_INST macro APIs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert older DT_INST_ macro use in stellaris drivers to the new
include/devicetree.h DT_INST macro APIs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adding a dependency on the GPIO resource in the TI Power module, and
configuring the edge detection on pads as a wakeup source.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This reverts commit 8739517107.
Pull Request #23437 was merged by mistake with an invalid manifest.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Replace all occurences of BUILD_ASSERT_MSG() with BUILD_ASSERT()
as a result of merging BUILD_ASSERT() and BUILD_ASSERT_MSG().
Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
Towards cleaning up (and hopefully removing dts_fixup.h in the near
future). We need to move the handling of different names for the irq
flag propety into the driver and out of dts_fixup.h.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When added SAM4E and SAMV71 platform the huge amount of refactor left
out this two configurations. This add missing configuration for all
supported devices.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Disabling gpio interrupts on the pin prior to changing its interrupt
type to level-based helps prevent spurious interrupts that would be
otherwise observed, if gpio interrupts were originally enabled when
gpio_cc32xx_pin_interrupt_configure() is invoked.
Fixes#22847
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
In the gpio isr, gpio interrupts are disabled when invoking the
registered callbacks. This is unnecessary, and causes a problem if the
callback attempts to disable gpio interrupts by reconfiguring the pin
as in the test gpio_basic_api.
Fixes#22847
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Include gpio_utils.h to fix a build failure:
gpio_pca95xx.c:490:20: warning: implicit declaration of
function 'GPIO_PORT_PIN_MASK_FROM_NGPIOS'
[-Wimplicit-function-declaration]
gpio_pca95xx.c:490:20: error: initializer element is not constant
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_NGPIOS(
DT_INST_##inst##_NXP_PCA95XX_NGPIOS), \
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
The data_first flag was intended to be set when the configuration
requires setting the output value before setting the direction.
Respect the intent.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Same deal as in commit eddd98f811 ("kconfig: Replace some single-symbol
'if's with 'depends on'"), for the remaining cases outside defconfig
files. See that commit for an explanation.
Will do the defconfigs separately in case there are any complaints
there.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Use gpio_pin_t uniformly when passing pin indexes to the driver. Use
gpio_flags_t uniformly when passing flags to the driver. Change name
of pin configuration function in API function table to be consistent
with other API functions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
There is a typedef used to store pin indexes in configuration
structures. For consistency it should also be used to identify pin
indexes in function prototypes.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The only remaining port operations have dedicated API function table
entries. Remove the defines for access op (mode), and remove support
for access op from all implementations.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The last external reference to these was removed when the pin
write/read functions were deprecated. Remove the syscall support, API
function table entries, and implementation from all drivers.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
These have been replaced by the appropriate call to
gpio_pin_interrupt_configure(). While the disable function could be
implemented using the new functionality, the enable function cannot
because the interrupt mode is not available. Consequently we cannot
replace these with equivalent functionality using the legacy API.
Clean up the internal implementation by removing the inaccessible
port-based enable/disable feature, leaving the pin-based capability in
place.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This API will be deprecated in favor of the new API that clearly
specifies whether it works on logical or physical levels.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC series; until aliases for the new properties are
added the code assumes all pins are supported.
Since pin ordinal validation is now done directly in gpio API,
remove checks inside the driver itself.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the hard-coded device-specific pin count to
initialize it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure and use the devicetree GPIO pin counts to initialize
it. Not all aliases appear to be present, but using instances breaks
because the ports used by different boards do not always start with
the first.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. The devicetree binding does not inherit from
gpio-controller, so the required property is not available there. A
hard-coded value of 32 pins has been implemented to make the driver
function.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add the common config structure as a prefix of the driver-specific
config structure. This driver uses fixups to define a common name
based on the SOC; until aliases for the new properties are added the
code assumes all pins are supported.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it. Simplify device initialization by using
instance number as only variation point.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
